+/**
+ * This file implements the node emitter.
+ *
+ * $Id$
+ */
+
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include "irop_t.h"
#include "irargs_t.h"
#include "irprog_t.h"
+#include "iredges_t.h"
-#include "../besched.h"
+#include "../besched_t.h"
#include "../benode_t.h"
#include "ia32_emitter.h"
#include "gen_ia32_emitter.h"
+#include "gen_ia32_regalloc_if.h"
#include "ia32_nodes_attr.h"
#include "ia32_new_nodes.h"
#include "ia32_map_regs.h"
# define obstack_chunk_free free
#endif
+#define BLOCK_PREFIX(x) ".L" x
+
extern int obstack_printf(struct obstack *obst, char *fmt, ...);
#define SNPRINTF_BUF_LEN 128
+/* global arch_env for lc_printf functions */
static const arch_env_t *arch_env = NULL;
-/**
- * Emits registers and/or address mode of a binary operation.
- */
-char *ia32_emit_binop(const ir_node *n) {
- static char *buf = NULL;
-
- /* verify that this function is never called on non-AM supporting operations */
- assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
-
- if (! buf) {
- buf = xcalloc(1, SNPRINTF_BUF_LEN);
- }
- else {
- memset(buf, 0, SNPRINTF_BUF_LEN);
- }
-
- switch(get_ia32_op_type(n)) {
- case ia32_Normal:
- if (get_ia32_cnst(n)) {
- lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, get_ia32_cnst(n));
- }
- else {
- lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S,%4S", n, n);
- }
- break;
- case ia32_AddrModeS:
- lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%4S, %s", n, ia32_emit_am(n));
- break;
- case ia32_AddrModeD:
- if (get_ia32_cnst(n)) {
- lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s, %s", ia32_emit_am(n), get_ia32_cnst(n));
- }
- else {
- lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s, %3S", ia32_emit_am(n), n);
- }
- break;
- default:
- assert(0 && "unsupported op type");
- }
-
- return buf;
-}
-
-/**
- * Emits registers and/or address mode of a unary operation.
- */
-char *ia32_emit_unop(const ir_node *n) {
- static char *buf = NULL;
-
- if (! buf) {
- buf = xcalloc(1, SNPRINTF_BUF_LEN);
- }
- else {
- memset(buf, 0, SNPRINTF_BUF_LEN);
- }
-
- switch(get_ia32_op_type(n)) {
- case ia32_Normal:
- lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D", n);
- break;
- case ia32_am_Dest:
- snprintf(buf, SNPRINTF_BUF_LEN, ia32_emit_am(n));
- break;
- default:
- assert(0 && "unsupported op type");
- }
-
- return buf;
-}
-
-/**
- * Emits adressmode.
- */
-char *ia32_emit_am(const ir_node *n) {
- ia32_am_flavour_t am_flav = get_ia32_am_flavour(n);
- int had_output = 0;
- char *s;
- int size;
- static struct obstack *obst = NULL;
- ir_mode *mode = get_ia32_ls_mode(n);
-
- if (! is_ia32_Lea(n))
- assert(mode && "AM node must have ls_mode attribute set.");
-
- if (! obst) {
- obst = xcalloc(1, sizeof(*obst));
- }
- else {
- obstack_free(obst, NULL);
- }
-
- /* obstack_free with NULL results in an uninitialized obstack */
- obstack_init(obst);
-
- if (mode) {
- switch (get_mode_size_bits(mode)) {
- case 8:
- obstack_printf(obst, "BYTE PTR ");
- break;
- case 16:
- obstack_printf(obst, "WORD PTR ");
- break;
- default:
- break;
- }
- }
-
- obstack_printf(obst, "[");
-
- if (am_flav & ia32_B) {
- lc_eoprintf(ia32_get_arg_env(), obst, "%1S", n);
- had_output = 1;
- }
-
- if (am_flav & ia32_I) {
- if (had_output) {
- obstack_printf(obst, "+");
- }
-
- lc_eoprintf(ia32_get_arg_env(), obst, "%2S", n);
-
- if (am_flav & ia32_S) {
- obstack_printf(obst, "*%d", 1 << get_ia32_am_scale(n));
- }
-
- had_output = 1;
- }
-
- if (am_flav & ia32_O) {
- obstack_printf(obst, get_ia32_am_offs(n));
- }
-
- obstack_printf(obst, "] ");
-
- size = obstack_object_size(obst);
- s = obstack_finish(obst);
- s[size - 1] = '\0';
-
- return s;
-}
-
/*************************************************************
* _ _ __ _ _
* (_) | | / _| | | | |
* |_| |_|
*************************************************************/
+/**
+ * returns true if a node has x87 registers
+ */
+static int has_x87_register(const ir_node *n)
+{
+ return get_irn_op(n)->flags & (irop_flag_machine << 1);
+}
+
/* We always pass the ir_node which is a pointer. */
static int ia32_get_arg_type(const lc_arg_occ_t *occ) {
return lc_arg_type_ptr;
if (in_out == IN_REG) {
reg = get_in_reg(irn, pos);
+
+ if (reg->reg_class == &ia32_reg_classes[CLASS_ia32_vfp]) {
+ /* FIXME: works for binop only */
+ assert(2 <= pos && pos <= 3);
+ reg = get_ia32_attr(irn)->x87[pos - 2];
+ }
}
else {
/* destination address mode nodes don't have outputs */
}
reg = get_out_reg(irn, pos);
+ if (reg->reg_class == &ia32_reg_classes[CLASS_ia32_vfp])
+ reg = get_ia32_attr(irn)->x87[pos + 2];
}
-
return arch_register_get_name(reg);
}
int nr = occ->width - 1;
if (!X)
- return lc_arg_append(app, occ, "(null)", 6);
+ return lc_appendable_snadd(app, "(null)", 6);
buf = get_ia32_reg_name(X, nr, occ->conversion == 'S' ? IN_REG : OUT_REG);
- return lc_arg_append(app, occ, buf, strlen(buf));
+ /* append the stupid % to register names */
+ lc_appendable_chadd(app, '%');
+ return lc_appendable_snadd(app, buf, strlen(buf));
+}
+
+/**
+ * Get the x87 register name for a node.
+ */
+static int ia32_get_x87_name(lc_appendable_t *app,
+ const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
+{
+ const char *buf;
+ ir_node *X = arg->v_ptr;
+ int nr = occ->width - 1;
+ ia32_attr_t *attr;
+
+ if (!X)
+ return lc_appendable_snadd(app, "(null)", 6);
+
+ attr = get_ia32_attr(X);
+ buf = attr->x87[nr]->name;
+ lc_appendable_chadd(app, '%');
+ return lc_appendable_snadd(app, buf, strlen(buf));
}
/**
buf = get_ia32_am_offs(X);
}
- return buf ? lc_arg_append(app, occ, buf, strlen(buf)) : 0;
+ return buf ? lc_appendable_snadd(app, buf, strlen(buf)) : 0;
}
/**
const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
{
ir_node *X = arg->v_ptr;
- ir_mode *mode = is_ia32_Lea(X) ? get_irn_mode(X) : get_ia32_ls_mode(X);
+ ir_mode *mode = get_irn_mode(X);
+
+ if (mode == mode_T) {
+ mode = is_ia32_AddrModeS(X) || is_ia32_AddrModeD(X) ? get_ia32_ls_mode(X) : get_ia32_res_mode(X);
+ }
if (!X)
return lc_arg_append(app, occ, "(null)", 6);
return lc_appendable_chadd(app, get_mode_size_bits(mode) == 32 ? 's' : 'd');
}
else {
-
return lc_appendable_chadd(app, mode_is_signed(mode) ? 's' : 'z');
}
}
static const lc_arg_handler_t ia32_reg_handler = { ia32_get_arg_type, ia32_get_reg_name };
static const lc_arg_handler_t ia32_const_handler = { ia32_get_arg_type, ia32_const_to_str };
static const lc_arg_handler_t ia32_mode_handler = { ia32_get_arg_type, ia32_get_mode_suffix };
+ static const lc_arg_handler_t ia32_x87_handler = { ia32_get_arg_type, ia32_get_x87_name };
if(env == NULL) {
/* extend the firm printer */
lc_arg_register(env, "ia32:cnst", 'C', &ia32_const_handler);
lc_arg_register(env, "ia32:offs", 'O', &ia32_const_handler);
lc_arg_register(env, "ia32:mode", 'M', &ia32_mode_handler);
+ lc_arg_register(env, "ia32:x87", 'X', &ia32_x87_handler);
}
return env;
}
+static char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode, const arch_register_t *reg) {
+ switch(get_mode_size_bits(mode)) {
+ case 8:
+ return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
+ case 16:
+ return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
+ default:
+ return (char *)arch_register_get_name(reg);
+ }
+}
+
+/**
+ * Emits registers and/or address mode of a binary operation.
+ */
+char *ia32_emit_binop(const ir_node *n, ia32_emit_env_t *env) {
+ static char *buf = NULL;
-/*
+ /* verify that this function is never called on non-AM supporting operations */
+ //assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
+
+#define PRODUCES_RESULT(n) \
+ (!(is_ia32_St(n) || \
+ is_ia32_Store8Bit(n) || \
+ is_ia32_CondJmp(n) || \
+ is_ia32_fCondJmp(n) || \
+ is_ia32_SwitchJmp(n)))
+
+ if (! buf) {
+ buf = xcalloc(1, SNPRINTF_BUF_LEN);
+ }
+ else {
+ memset(buf, 0, SNPRINTF_BUF_LEN);
+ }
+
+ switch(get_ia32_op_type(n)) {
+ case ia32_Normal:
+ if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, get_ia32_cnst(n));
+ }
+ else {
+ const arch_register_t *in1 = get_in_reg(n, 2);
+ const arch_register_t *in2 = get_in_reg(n, 3);
+ const arch_register_t *out = PRODUCES_RESULT(n) ? get_out_reg(n, 0) : NULL;
+ const arch_register_t *in;
+ const char *in_name;
+
+ in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
+ out = out ? out : in1;
+ in_name = arch_register_get_name(in);
+
+ if (is_ia32_emit_cl(n)) {
+ assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
+ in_name = "cl";
+ }
+
+ snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s", arch_register_get_name(out), in_name);
+ }
+ break;
+ case ia32_AddrModeS:
+ if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
+ assert(! PRODUCES_RESULT(n) && "Source AM with Const must not produce result");
+ snprintf(buf, SNPRINTF_BUF_LEN, "%s, %s", get_ia32_cnst(n), ia32_emit_am(n, env));
+ }
+ else {
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%4S, %s", n, ia32_emit_am(n, env));
+ }
+ break;
+ case ia32_AddrModeD:
+ if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s,%s%s",
+ ia32_emit_am(n, env),
+ is_ia32_ImmSymConst(n) ? " OFFSET FLAT:" : " ", /* In case of a symconst we must add OFFSET to */
+ get_ia32_cnst(n)); /* tell the assembler to store it's address. */
+ }
+ else {
+ const arch_register_t *in1 = get_in_reg(n, 2);
+ ir_mode *mode = get_ia32_res_mode(n);
+ const char *in_name;
+
+ mode = mode ? mode : get_ia32_ls_mode(n);
+ in_name = ia32_get_reg_name_for_mode(env, mode, in1);
+
+ if (is_ia32_emit_cl(n)) {
+ assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
+ in_name = "cl";
+ }
+
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s, %%%s", ia32_emit_am(n, env), in_name);
+ }
+ break;
+ default:
+ assert(0 && "unsupported op type");
+ }
+
+#undef PRODUCES_RESULT
+
+ return buf;
+}
+
+/**
+ * Emits registers and/or address mode of a binary operation.
+ */
+char *ia32_emit_x87_binop(const ir_node *n, ia32_emit_env_t *env) {
+ static char *buf = NULL;
+
+ /* verify that this function is never called on non-AM supporting operations */
+ //assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
+
+ if (! buf) {
+ buf = xcalloc(1, SNPRINTF_BUF_LEN);
+ }
+ else {
+ memset(buf, 0, SNPRINTF_BUF_LEN);
+ }
+
+ switch(get_ia32_op_type(n)) {
+ case ia32_Normal:
+ if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, get_ia32_cnst(n));
+ }
+ else {
+ ia32_attr_t *attr = get_ia32_attr(n);
+ const arch_register_t *in1 = attr->x87[0];
+ const arch_register_t *in2 = attr->x87[1];
+ const arch_register_t *out = attr->x87[2];
+ const arch_register_t *in;
+ const char *in_name;
+
+ in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
+ out = out ? out : in1;
+ in_name = arch_register_get_name(in);
+
+ snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s", arch_register_get_name(out), in_name);
+ }
+ break;
+ case ia32_AddrModeS:
+ case ia32_AddrModeD:
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s", ia32_emit_am(n, env));
+ break;
+ default:
+ assert(0 && "unsupported op type");
+ }
+
+#undef PRODUCES_RESULT
+
+ return buf;
+}
+
+/**
+ * Emits registers and/or address mode of a unary operation.
+ */
+char *ia32_emit_unop(const ir_node *n, ia32_emit_env_t *env) {
+ static char *buf = NULL;
+
+ if (! buf) {
+ buf = xcalloc(1, SNPRINTF_BUF_LEN);
+ }
+ else {
+ memset(buf, 0, SNPRINTF_BUF_LEN);
+ }
+
+ switch(get_ia32_op_type(n)) {
+ case ia32_Normal:
+ if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%C", n);
+ }
+ else {
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D", n);
+ }
+ break;
+ case ia32_am_Dest:
+ snprintf(buf, SNPRINTF_BUF_LEN, ia32_emit_am(n, env));
+ break;
+ default:
+ assert(0 && "unsupported op type");
+ }
+
+ return buf;
+}
+
+/**
+ * Emits address mode.
+ */
+char *ia32_emit_am(const ir_node *n, ia32_emit_env_t *env) {
+ ia32_am_flavour_t am_flav = get_ia32_am_flavour(n);
+ int had_output = 0;
+ char *s;
+ int size;
+ static struct obstack *obst = NULL;
+ ir_mode *mode = get_ia32_ls_mode(n);
+
+ if (! is_ia32_Lea(n))
+ assert(mode && "AM node must have ls_mode attribute set.");
+
+ if (! obst) {
+ obst = xcalloc(1, sizeof(*obst));
+ }
+ else {
+ obstack_free(obst, NULL);
+ }
+
+ /* obstack_free with NULL results in an uninitialized obstack */
+ obstack_init(obst);
+
+ if (mode) {
+ switch (get_mode_size_bits(mode)) {
+ case 8:
+ obstack_printf(obst, "BYTE PTR ");
+ break;
+ case 16:
+ obstack_printf(obst, "WORD PTR ");
+ break;
+ case 32:
+ obstack_printf(obst, "DWORD PTR ");
+ break;
+ case 64:
+ if (has_x87_register(n))
+ /* ARGHHH: stupid gas x87 wants QWORD PTR but SSE must be WITHOUT */
+ obstack_printf(obst, "QWORD PTR ");
+ break;
+ case 80:
+ case 96:
+ obstack_printf(obst, "XWORD PTR ");
+ break;
+ default:
+ break;
+ }
+ }
+
+ /* emit address mode symconst */
+ if (get_ia32_am_sc(n)) {
+ if (is_ia32_am_sc_sign(n))
+ obstack_printf(obst, "-");
+ obstack_printf(obst, "%s", get_id_str(get_ia32_am_sc(n)));
+ }
+
+ if (am_flav & ia32_B) {
+ obstack_printf(obst, "[");
+ lc_eoprintf(ia32_get_arg_env(), obst, "%1S", n);
+ had_output = 1;
+ }
+
+ if (am_flav & ia32_I) {
+ if (had_output) {
+ obstack_printf(obst, "+");
+ }
+ else {
+ obstack_printf(obst, "[");
+ }
+
+ lc_eoprintf(ia32_get_arg_env(), obst, "%2S", n);
+
+ if (am_flav & ia32_S) {
+ obstack_printf(obst, "*%d", 1 << get_ia32_am_scale(n));
+ }
+
+ had_output = 1;
+ }
+
+ if (am_flav & ia32_O) {
+ s = get_ia32_am_offs(n);
+
+ if (s) {
+ /* omit explicit + if there was no base or index */
+ if (! had_output) {
+ obstack_printf(obst, "[");
+ if (s[0] == '+')
+ s++;
+ }
+
+ obstack_printf(obst, s);
+ had_output = 1;
+ }
+ }
+
+ if (had_output)
+ obstack_printf(obst, "] ");
+
+ size = obstack_object_size(obst);
+ s = obstack_finish(obst);
+ s[size - 1] = '\0';
+
+ return s;
+}
+
+
+
+/**
+ * Formated print of commands and comments.
+ */
+static void ia32_fprintf_format(FILE *F, const ir_node *irn, char *cmd_buf, char *cmnt_buf) {
+ unsigned lineno;
+ const char *name = irn ? be_retrieve_dbg_info(get_irn_dbg_info((ir_node *)irn), &lineno) : NULL;
+
+ if (name)
+ fprintf(F, "\t%-35s %-60s /* %s:%u */\n", cmd_buf, cmnt_buf, name, lineno);
+ else
+ fprintf(F, "\t%-35s %-60s\n", cmd_buf, cmnt_buf);
+}
+
+
+
+/**
* Add a number to a prefix. This number will not be used a second time.
*/
static char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
}
+
/*************************************************
* _ _ _
* (_) | | |
*
*************************************************/
+#undef IA32_DO_EMIT
+#define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
+
/*
* coding of conditions
*/
* positive conditions for unsigned compares
*/
static const struct cmp2conditon_t cmp2condition_u[] = {
- { NULL, pn_Cmp_False }, /* always false */
- { "e", pn_Cmp_Eq }, /* == */
- { "b", pn_Cmp_Lt }, /* < */
- { "be", pn_Cmp_Le }, /* <= */
- { "a", pn_Cmp_Gt }, /* > */
- { "ae", pn_Cmp_Ge }, /* >= */
- { "ne", pn_Cmp_Lg }, /* != */
- { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
- { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
- { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
- { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
- { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
- { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
- { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
- { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
- { NULL, pn_Cmp_True }, /* always true */
+ { NULL, pn_Cmp_False }, /* always false */
+ { "e", pn_Cmp_Eq }, /* == */
+ { "b", pn_Cmp_Lt }, /* < */
+ { "be", pn_Cmp_Le }, /* <= */
+ { "a", pn_Cmp_Gt }, /* > */
+ { "ae", pn_Cmp_Ge }, /* >= */
+ { "ne", pn_Cmp_Lg }, /* != */
+ { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
+ { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
+ { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
+ { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
+ { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
+ { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
+ { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
+ { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
+ { NULL, pn_Cmp_True }, /* always true */
};
/*
return unsigned_cmp ? cmp2condition_u[cmp_code & 7].name : cmp2condition_s[cmp_code & 7].name;
}
+/**
+ * Returns the target block for a control flow node.
+ */
+static ir_node *get_cfop_target_block(const ir_node *irn) {
+ return get_irn_link(irn);
+}
+
/**
* Returns the target label for a control flow node.
*/
static char *get_cfop_target(const ir_node *irn, char *buf) {
- ir_node *bl = get_irn_link(irn);
+ ir_node *bl = get_cfop_target_block(irn);
- snprintf(buf, SNPRINTF_BUF_LEN, "BLOCK_%ld", get_irn_node_nr(bl));
+ snprintf(buf, SNPRINTF_BUF_LEN, BLOCK_PREFIX("%ld"), get_irn_node_nr(bl));
return buf;
}
+/** Return the next block in Block schedule */
+static ir_node *next_blk_sched(const ir_node *block) {
+ return get_irn_link(block);
+}
+
/**
* Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
*/
-static void finish_CondJmp(FILE *F, const ir_node *irn) {
- const ir_node *proj;
+static void finish_CondJmp(FILE *F, const ir_node *irn, ir_mode *mode) {
+ const ir_node *proj1, *proj2 = NULL;
+ const ir_node *block, *next_bl = NULL;
const ir_edge_t *edge;
char buf[SNPRINTF_BUF_LEN];
+ char cmd_buf[SNPRINTF_BUF_LEN];
+ char cmnt_buf[SNPRINTF_BUF_LEN];
+ /* get both Proj's */
edge = get_irn_out_edge_first(irn);
- proj = get_edge_src_irn(edge);
- assert(is_Proj(proj) && "CondJmp with a non-Proj");
+ proj1 = get_edge_src_irn(edge);
+ assert(is_Proj(proj1) && "CondJmp with a non-Proj");
+
+ edge = get_irn_out_edge_next(irn, edge);
+ if (edge) {
+ proj2 = get_edge_src_irn(edge);
+ assert(is_Proj(proj2) && "CondJmp with a non-Proj");
+ }
- if (get_Proj_proj(proj) == 1) {
- fprintf(F, "\tj%s %s\t\t\t/* cmp(a, b) == TRUE */\n",
+ /* for now, the code works for scheduled and non-schedules blocks */
+ block = get_nodes_block(irn);
+ if (proj2) {
+ /* we have a block schedule */
+ next_bl = next_blk_sched(block);
+
+ if (get_cfop_target_block(proj1) == next_bl) {
+ /* exchange both proj's so the second one can be omitted */
+ const ir_node *t = proj1;
+ proj1 = proj2;
+ proj2 = t;
+ }
+ }
+
+ /* the first Proj must always be created */
+ if (get_Proj_proj(proj1) == pn_Cond_true) {
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s",
get_cmp_suffix(get_ia32_pncode(irn), !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
- get_cfop_target(proj, buf));
+ get_cfop_target(proj1, buf));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == TRUE */");
}
else {
- fprintf(F, "\tjn%s %s\t\t\t/* cmp(a, b) == FALSE */\n",
- get_cmp_suffix(get_ia32_pncode(irn), !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
- get_cfop_target(proj, buf));
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s",
+ get_cmp_suffix(get_negated_pnc(get_ia32_pncode(irn), mode),
+ !mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
+ get_cfop_target(proj1, buf));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == FALSE */");
}
+ IA32_DO_EMIT(irn);
- edge = get_irn_out_edge_next(irn, edge);
- if (edge) {
- proj = get_edge_src_irn(edge);
- assert(is_Proj(proj) && "CondJmp with a non-Proj");
- fprintf(F, "\tjmp %s\t\t\t/* otherwise */\n", get_cfop_target(proj, buf));
+ /* the second Proj might be a fallthrough */
+ if (proj2) {
+ if (get_cfop_target_block(proj2) != next_bl) {
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(proj2, buf));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* otherwise */");
+ }
+ else {
+ cmd_buf[0] = '\0';
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrogh %s */", get_cfop_target(proj2, buf));
+ }
+ IA32_DO_EMIT(irn);
}
}
/**
- * Emits code for conditional jump with two variables.
+ * Emits code for conditional jump.
*/
-static void emit_ia32_CondJmp(const ir_node *irn, emit_env_t *env) {
+static void CondJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
FILE *F = env->out;
+ char cmd_buf[SNPRINTF_BUF_LEN];
+ char cmnt_buf[SNPRINTF_BUF_LEN];
+
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cmp %s", ia32_emit_binop(irn, env));
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
+ IA32_DO_EMIT(irn);
+ finish_CondJmp(F, irn, get_ia32_res_mode(irn));
+}
- lc_efprintf(ia32_get_arg_env(), F, "\tcmp %s\t\t\t/* CondJmp(%+F, %+F) */\n",
- ia32_emit_binop(irn), get_irn_n(irn, 0), get_irn_n(irn, 1));
- finish_CondJmp(F, irn);
+/**
+ * Emits code for conditional jump with two variables.
+ */
+static void emit_ia32_CondJmp(const ir_node *irn, ia32_emit_env_t *env) {
+ CondJmp_emitter(irn, env);
}
/**
- * Emits code for conditional jump with immediate.
+ * Emits code for conditional test and jump.
*/
-void emit_ia32_CondJmp_i(const ir_node *irn, emit_env_t *env) {
+static void TestJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
+
+#define IA32_IS_IMMOP (is_ia32_ImmConst(irn) || is_ia32_ImmSymConst(irn))
+
+ FILE *F = env->out;
+ const char *op1 = arch_register_get_name(get_in_reg(irn, 0));
+ const char *op2 = IA32_IS_IMMOP ? get_ia32_cnst(irn) : NULL;
+ char cmd_buf[SNPRINTF_BUF_LEN];
+ char cmnt_buf[SNPRINTF_BUF_LEN];
+
+ if (! op2)
+ op2 = arch_register_get_name(get_in_reg(irn, 1));
+
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "test %%%s,%s%s ", op1, IA32_IS_IMMOP ? " " : " %", op2);
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
+
+ IA32_DO_EMIT(irn);
+ finish_CondJmp(F, irn, get_ia32_res_mode(irn));
+
+#undef IA32_IS_IMMOP
+}
+
+/**
+ * Emits code for conditional test and jump with two variables.
+ */
+static void emit_ia32_TestJmp(const ir_node *irn, ia32_emit_env_t *env) {
+ TestJmp_emitter(irn, env);
+}
+
+static void emit_ia32_CJmp(const ir_node *irn, ia32_emit_env_t *env) {
FILE *F = env->out;
+ char cmd_buf[SNPRINTF_BUF_LEN];
+ char cmnt_buf[SNPRINTF_BUF_LEN];
- lc_efprintf(ia32_get_arg_env(), F, "\tcmp %s\t\t\t/* CondJmp_i(%+F) */\n",
- ia32_emit_binop(irn), get_irn_n(irn, 0));
- finish_CondJmp(F, irn);
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test */", irn);
+ IA32_DO_EMIT(irn);
+ finish_CondJmp(F, irn, get_ia32_res_mode(irn));
}
+static void emit_ia32_CJmpAM(const ir_node *irn, ia32_emit_env_t *env) {
+ FILE *F = env->out;
+ char cmd_buf[SNPRINTF_BUF_LEN];
+ char cmnt_buf[SNPRINTF_BUF_LEN];
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test/cmp */", irn);
+ IA32_DO_EMIT(irn);
+ finish_CondJmp(F, irn, get_ia32_res_mode(irn));
+}
/*********************************************************
* _ _ _
* possible otherwise a cmp-jmp cascade). Port from
* cggg ia32 backend
*/
-void emit_ia32_SwitchJmp(const ir_node *irn, emit_env_t *emit_env) {
+static void emit_ia32_SwitchJmp(const ir_node *irn, ia32_emit_env_t *emit_env) {
unsigned long interval;
char buf[SNPRINTF_BUF_LEN];
int last_value, i, pn, do_jmp_tbl = 1;
const ir_edge_t *edge;
const lc_arg_env_t *env = ia32_get_arg_env();
FILE *F = emit_env->out;
+ char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
/* fill the table structure */
tbl.label = xmalloc(SNPRINTF_BUF_LEN);
if (do_jmp_tbl) {
/* emit the table */
if (tbl.min_value != 0) {
- lc_efprintf(env, F, "\tcmpl %lu, -%d(%1S)\t\t/* first switch value is not 0 */\n",
+ lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "cmpl %lu, -%d(%1S)",
interval, tbl.min_value, irn);
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* first switch value is not 0 */");
+
+ IA32_DO_EMIT(irn);
}
else {
- lc_efprintf(env, F, "\tcmpl %lu, %1S\t\t\t/* compare for switch */\n", interval, irn);
+ lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "cmpl %lu, %1S", interval, irn);
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* compare for switch */");
+
+ IA32_DO_EMIT(irn);
}
- fprintf(F, "\tja %s\t\t\t/* default jump if out of range */\n", get_cfop_target(tbl.defProj, buf));
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "ja %s", get_cfop_target(tbl.defProj, buf));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default jump if out of range */");
+ IA32_DO_EMIT(irn);
if (tbl.num_branches > 1) {
/* create table */
- lc_efprintf(env, F, "\tjmp [%1S*4+%s]\t\t/* get jump table entry as target */\n", irn, tbl.label);
+ lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "jmp [%1S*4+%s]", irn, tbl.label);
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* get jump table entry as target */");
+ IA32_DO_EMIT(irn);
- fprintf(F, "\t.section\t.rodata\t\t/* start jump table */\n");
+ fprintf(F, "\t.section\t.rodata\n");
fprintf(F, "\t.align 4\n");
fprintf(F, "%s:\n", tbl.label);
- fprintf(F, "\t.long %s\t\t\t/* case %d */\n", get_cfop_target(tbl.branches[0].target, buf), tbl.branches[0].value);
+
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[0].target, buf));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */\n", tbl.branches[0].value);
+ IA32_DO_EMIT(irn);
last_value = tbl.branches[0].value;
for (i = 1; i < tbl.num_branches; ++i) {
while (++last_value < tbl.branches[i].value) {
- fprintf(F, "\t.long %s\t\t/* default case */\n", get_cfop_target(tbl.defProj, buf));
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.defProj, buf));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default case */");
+ IA32_DO_EMIT(irn);
}
- fprintf(F, "\t.long %s\t\t\t/* case %d */\n", get_cfop_target(tbl.branches[i].target, buf), last_value);
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[i].target, buf));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", last_value);
+ IA32_DO_EMIT(irn);
}
- fprintf(F, "\t.text\t\t\t\t/* end of jump table */\n");
+ fprintf(F, "\t.text");
}
else {
/* one jump is enough */
- fprintf(F, "\tjmp %s\t\t/* only one case given */\n", get_cfop_target(tbl.branches[0].target, buf));
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(tbl.branches[0].target, buf));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* only one case given */");
+ IA32_DO_EMIT(irn);
}
}
else { // no jump table
for (i = 0; i < tbl.num_branches; ++i) {
- lc_efprintf(env, F, "\tcmpl %d, %1S\t\t\t/* case %d */\n", tbl.branches[i].value, irn, i);
+ lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "cmpl %d, %1S", tbl.branches[i].value, irn);
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", i);
+ IA32_DO_EMIT(irn);
fprintf(F, "\tje %s\n", get_cfop_target(tbl.branches[i].target, buf));
}
- fprintf(F, "\tjmp %s\t\t\t/* default case */\n", get_cfop_target(tbl.defProj, buf));
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(tbl.defProj, buf));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default case */");
+ IA32_DO_EMIT(irn);
}
if (tbl.label)
/**
* Emits code for a unconditional jump.
*/
-void emit_Jmp(const ir_node *irn, emit_env_t *env) {
+static void emit_Jmp(const ir_node *irn, ia32_emit_env_t *env) {
+ ir_node *block, *next_bl;
FILE *F = env->out;
+ char buf[SNPRINTF_BUF_LEN], cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
- char buf[SNPRINTF_BUF_LEN];
- ir_fprintf(F, "\tjmp %s\t\t\t/* Jmp(%+F) */\n", get_cfop_target(irn, buf), get_irn_link(irn));
-}
-
+ /* for now, the code works for scheduled and non-schedules blocks */
+ block = get_nodes_block(irn);
+ /* we have a block schedule */
+ next_bl = next_blk_sched(block);
+ if (get_cfop_target_block(irn) != next_bl) {
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(irn, buf));
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%+F) */", irn, get_cfop_target_block(irn));
+ }
+ else {
+ cmd_buf[0] = '\0';
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrough %s */", get_cfop_target(irn, buf));
+ }
+ IA32_DO_EMIT(irn);
+}
/****************************
* _
/**
* Emits code for a proj -> node
*/
-void emit_Proj(const ir_node *irn, emit_env_t *env) {
+static void emit_Proj(const ir_node *irn, ia32_emit_env_t *env) {
ir_node *pred = get_Proj_pred(irn);
if (get_irn_op(pred) == op_Start) {
* |_| |___/
**********************************/
+/**
+ * Emit movsb/w instructions to make mov count divideable by 4
+ */
static void emit_CopyB_prolog(FILE *F, int rem, int size) {
+ char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
+
fprintf(F, "\t/* memcopy %d bytes*/\n", size);
- fprintf(F, "\tcld\t\t\t\t/* copy direction forward*/\n");
+
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cld");
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* copy direction forward*/");
+ IA32_DO_EMIT(NULL);
switch(rem) {
case 1:
- fprintf(F, "\tmovsb\t\t\t\t/* memcopy remainder 1 */\n");
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 1 */");
break;
case 2:
- fprintf(F, "\tmovsw\t\t\t\t/* memcopy remainder 2 */\n");
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 2 */");
break;
case 3:
- fprintf(F, "\tmovsb\t\t\t\t/* memcopy remainder 3 */\n");
- fprintf(F, "\tmovsw\t\t\t\t/* memcopy remainder 3 */\n");
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
+ IA32_DO_EMIT(NULL);
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
break;
}
+
+ IA32_DO_EMIT(NULL);
}
-void emit_ia32_CopyB(const ir_node *irn, emit_env_t *emit_env) {
+/**
+ * Emit rep movsd instruction for memcopy.
+ */
+static void emit_ia32_CopyB(const ir_node *irn, ia32_emit_env_t *emit_env) {
FILE *F = emit_env->out;
tarval *tv = get_ia32_Immop_tarval(irn);
int rem = get_tarval_long(tv);
int size = get_tarval_long(get_ia32_Immop_tarval(get_irn_n(irn, 2)));
+ char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
emit_CopyB_prolog(F, rem, size);
- fprintf(F, "\trep movsd\t\t\t\t/* memcopy */\n");
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "rep movsd");
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy */");
+ IA32_DO_EMIT(irn);
}
-void emit_ia32_CopyB_i(const ir_node *irn, emit_env_t *emit_env) {
+/**
+ * Emits unrolled memcopy.
+ */
+static void emit_ia32_CopyB_i(const ir_node *irn, ia32_emit_env_t *emit_env) {
tarval *tv = get_ia32_Immop_tarval(irn);
int size = get_tarval_long(tv);
FILE *F = emit_env->out;
+ char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
emit_CopyB_prolog(F, size & 0x3, size);
size >>= 2;
while (size--) {
- fprintf(F, "\tmovsd\t\t\t\t/* memcopy unrolled */\n");
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsd");
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy unrolled */");
+ IA32_DO_EMIT(irn);
}
}
+/***************************
+ * _____
+ * / ____|
+ * | | ___ _ ____ __
+ * | | / _ \| '_ \ \ / /
+ * | |___| (_) | | | \ V /
+ * \_____\___/|_| |_|\_/
+ *
+ ***************************/
+
+/**
+ * Emit code for conversions (I, FP), (FP, I) and (FP, FP).
+ */
+static void emit_ia32_Conv_with_FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
+ FILE *F = emit_env->out;
+ const lc_arg_env_t *env = ia32_get_arg_env();
+ char *from, *to, buf[64];
+ ir_mode *src_mode, *tgt_mode;
+ char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
+
+ src_mode = is_ia32_AddrModeS(irn) ? get_ia32_ls_mode(irn) : get_irn_mode(get_irn_n(irn, 2));
+ tgt_mode = get_ia32_res_mode(irn);
+
+ from = mode_is_float(src_mode) ? (get_mode_size_bits(src_mode) == 32 ? "ss" : "sd") : "si";
+ to = mode_is_float(tgt_mode) ? (get_mode_size_bits(tgt_mode) == 32 ? "ss" : "sd") : "si";
+
+ switch(get_ia32_op_type(irn)) {
+ case ia32_Normal:
+ lc_esnprintf(env, buf, sizeof(buf), "%1D, %3S", irn, irn);
+ break;
+ case ia32_AddrModeS:
+ lc_esnprintf(env, buf, sizeof(buf), "%1D, %s", irn, ia32_emit_am(irn, emit_env));
+ break;
+ default:
+ assert(0 && "unsupported op type for Conv");
+ }
+
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cvt%s2%s %s", from, to, buf);
+ lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%+F, %+F) */", irn, src_mode, tgt_mode);
+ IA32_DO_EMIT(irn);
+}
+
+static void emit_ia32_Conv_I2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
+ emit_ia32_Conv_with_FP(irn, emit_env);
+}
+
+static void emit_ia32_Conv_FP2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
+ emit_ia32_Conv_with_FP(irn, emit_env);
+}
+
+static void emit_ia32_Conv_FP2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
+ emit_ia32_Conv_with_FP(irn, emit_env);
+}
+
+/**
+ * Emits code for an Int conversion.
+ */
+static void emit_ia32_Conv_I2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
+ FILE *F = emit_env->out;
+ const lc_arg_env_t *env = ia32_get_arg_env();
+ char *move_cmd = "movzx";
+ char *conv_cmd = NULL;
+ ir_mode *src_mode, *tgt_mode;
+ int n, m;
+ char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
+ const arch_register_t *in_reg, *out_reg;
+
+ src_mode = is_ia32_AddrModeS(irn) ? get_ia32_ls_mode(irn) : get_irn_mode(get_irn_n(irn, 2));
+ tgt_mode = get_ia32_res_mode(irn);
+
+ n = get_mode_size_bits(src_mode);
+ m = get_mode_size_bits(tgt_mode);
+
+ if (mode_is_signed(n < m ? src_mode : tgt_mode)) {
+ move_cmd = "movsx";
+ if (n == 8 || m == 8)
+ conv_cmd = "cbw";
+ else if (n == 16 || m == 16)
+ conv_cmd = "cwde";
+ else
+ assert(0 && "unsupported Conv_I2I");
+ }
+
+ switch(get_ia32_op_type(irn)) {
+ case ia32_Normal:
+ in_reg = get_in_reg(irn, 2);
+ out_reg = get_out_reg(irn, 0);
+
+ if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
+ REGS_ARE_EQUAL(out_reg, in_reg) &&
+ mode_is_signed(n < m ? src_mode : tgt_mode))
+ {
+ /* argument and result are both in EAX and */
+ /* signedness is ok: -> use converts */
+ lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s", conv_cmd);
+ }
+ else if (REGS_ARE_EQUAL(out_reg, in_reg) &&
+ ! mode_is_signed(n < m ? src_mode : tgt_mode))
+ {
+ /* argument and result are in the same register */
+ /* and signedness is ok: -> use and with mask */
+ int mask = (1 << (n < m ? n : m)) - 1;
+ lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "and %1D, 0x%x", irn, mask);
+ }
+ else {
+ /* use move w/o sign extension */
+ lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %%%s",
+ move_cmd, irn, ia32_get_reg_name_for_mode(emit_env, n < m ? src_mode : tgt_mode, in_reg));
+ }
+
+ break;
+ case ia32_AddrModeS:
+ lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %s",
+ move_cmd, irn, ia32_emit_am(irn, emit_env));
+ break;
+ default:
+ assert(0 && "unsupported op type for Conv");
+ }
+
+ lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%d Bit mode_%F -> %d Bit mode_%F) */",
+ irn, n, src_mode, m, tgt_mode);
+
+ IA32_DO_EMIT(irn);
+}
+
+/**
+ * Emits code for an 8Bit Int conversion.
+ */
+void emit_ia32_Conv_I2I8Bit(const ir_node *irn, ia32_emit_env_t *emit_env) {
+ emit_ia32_Conv_I2I(irn, emit_env);
+}
+
+
/*******************************************
* _ _
* | | | |
*
*******************************************/
-void emit_be_Call(const ir_node *irn, emit_env_t *emit_env) {
+/**
+ * Emits a backend call
+ */
+static void emit_be_Call(const ir_node *irn, ia32_emit_env_t *emit_env) {
FILE *F = emit_env->out;
entity *ent = be_Call_get_entity(irn);
-
- fprintf(F, "\tcall ");
+ char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
if (ent) {
- fprintf(F, "%s", get_entity_name(ent));
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "call %s", get_entity_name(ent));
}
else {
- lc_efprintf(ia32_get_arg_env(), F, "%1D", get_irn_n(irn, be_pos_Call_ptr));
+ lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "%1D", get_irn_n(irn, be_pos_Call_ptr));
}
- ir_fprintf(F, "\t\t\t/* %+F (be_Call) */\n", irn);
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (be_Call) */", irn);
+
+ IA32_DO_EMIT(irn);
}
-void emit_be_IncSP(const ir_node *irn, emit_env_t *emit_env) {
+/**
+ * Emits code to increase stack pointer.
+ */
+static void emit_be_IncSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
FILE *F = emit_env->out;
unsigned offs = be_get_IncSP_offset(irn);
be_stack_dir_t dir = be_get_IncSP_direction(irn);
+ char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
if (offs) {
- lc_efprintf(ia32_get_arg_env(), F, "\tadd %1S,%s%u\t\t\t/* %+F (IncSP) */\n", irn,
- (dir == be_stack_dir_along) ? " -" : " ", offs, irn);
+ lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "add %1S,%s%u", irn,
+ (dir == be_stack_dir_expand) ? " -" : " ", offs);
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (IncSP) */", irn);
}
else {
- fprintf(F, "\t\t\t\t\t/* omitted IncSP with 0 */\n");
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* omitted %+F (IncSP) with 0 */", irn);
}
+
+ IA32_DO_EMIT(irn);
}
-void emit_be_SetSP(const ir_node *irn, emit_env_t *emit_env) {
+/**
+ * Emits code to set stack pointer.
+ */
+static void emit_be_SetSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
FILE *F = emit_env->out;
+ char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
- lc_efprintf(ia32_get_arg_env(), F, "\tmov %1D, %3S\t\t\t/* restore SP */\n", irn, irn);
+ lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %3S", irn, irn);
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (restore SP) */", irn);
+ IA32_DO_EMIT(irn);
}
-void emit_be_Copy(const ir_node *irn, emit_env_t *emit_env) {
+/**
+ * Emits code for Copy.
+ */
+static void emit_be_Copy(const ir_node *irn, ia32_emit_env_t *emit_env) {
FILE *F = emit_env->out;
+ char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
- lc_efprintf(ia32_get_arg_env(), F, "\tmov %1D, %1S\t\t\t/* %+F */\n", irn, irn, irn);
+ if (mode_is_float(get_irn_mode(irn)))
+ lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "movs%M %1D, %1S", irn, irn, irn);
+ else
+ lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %1S", irn, irn);
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
+ IA32_DO_EMIT(irn);
}
-void emit_be_Perm(const ir_node *irn, emit_env_t *emit_env) {
+/**
+ * Emits code for exchange.
+ */
+static void emit_be_Perm(const ir_node *irn, ia32_emit_env_t *emit_env) {
FILE *F = emit_env->out;
+ char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
- lc_efprintf(ia32_get_arg_env(), F, "\txchg %1S, %2S\t\t\t/* %+F(%1A, %2A) */\n", irn, irn, irn);
+ lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xchg %1S, %2S", irn, irn);
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%1A, %2A) */", irn, irn, irn);
+ IA32_DO_EMIT(irn);
}
+
+
/***********************************************************************************
* _ __ _
* (_) / _| | |
/* other ia32 emitter functions */
IA32_EMIT(CondJmp);
+ IA32_EMIT(TestJmp);
+ IA32_EMIT(CJmp);
+ IA32_EMIT(CJmpAM);
IA32_EMIT(SwitchJmp);
IA32_EMIT(CopyB);
IA32_EMIT(CopyB_i);
+ IA32_EMIT(Conv_I2FP);
+ IA32_EMIT(Conv_FP2I);
+ IA32_EMIT(Conv_FP2FP);
+ IA32_EMIT(Conv_I2I);
+ IA32_EMIT(Conv_I2I8Bit);
/* benode emitter */
BE_EMIT(Call);
* Emits code for a node.
*/
static void ia32_emit_node(const ir_node *irn, void *env) {
- emit_env_t *emit_env = env;
+ ia32_emit_env_t *emit_env = env;
firm_dbg_module_t *mod = emit_env->mod;
FILE *F = emit_env->out;
ir_op *op = get_irn_op(irn);
(*emit)(irn, env);
}
else {
- ir_fprintf(F, "\t\t\t\t\t/* %+F */\n", irn);
+ ir_fprintf(F, "\t%35s /* %+F (%+G) */\n", " ", irn, irn);
}
}
if (! is_Block(block))
return;
- fprintf(((emit_env_t *)env)->out, "BLOCK_%ld:\n", get_irn_node_nr(block));
+ fprintf(((ia32_emit_env_t *)env)->out, BLOCK_PREFIX("%ld:\n"), get_irn_node_nr(block));
sched_foreach(block, irn) {
ia32_emit_node(irn, env);
}
}
-
/**
* Emits code for function start.
*/
static void ia32_emit_func_prolog(FILE *F, ir_graph *irg) {
- const char *irg_name = get_entity_name(get_irg_entity(irg));
+ entity *irg_ent = get_irg_entity(irg);
+ const char *irg_name = get_entity_name(irg_ent);
- fprintf(F, "\t.text\n");
- fprintf(F, ".globl %s\n", irg_name);
+ fprintf(F, "\t.section\t.text\n");
+ if (get_entity_visibility(irg_ent) == visibility_external_visible) {
+ fprintf(F, ".globl %s\n", irg_name);
+ }
fprintf(F, "\t.type\t%s, @function\n", irg_name);
fprintf(F, "%s:\n", irg_name);
}
}
/**
+ * Block-walker:
* Sets labels for control flow nodes (jump target)
* TODO: Jump optimization
*/
* Main driver. Emits the code for one routine.
*/
void ia32_gen_routine(FILE *F, ir_graph *irg, const ia32_code_gen_t *cg) {
- emit_env_t emit_env;
+ ia32_emit_env_t emit_env;
+ ir_node *block;
- emit_env.mod = firm_dbg_register("ir.be.codegen.ia32");
emit_env.out = F;
emit_env.arch_env = cg->arch_env;
emit_env.cg = cg;
+ emit_env.isa = (ia32_isa_t *)cg->arch_env->isa;
+ FIRM_DBG_REGISTER(emit_env.mod, "firm.be.ia32.emitter");
/* set the global arch_env (needed by print hooks) */
arch_env = cg->arch_env;
ia32_emit_func_prolog(F, irg);
irg_block_walk_graph(irg, ia32_gen_labels, NULL, &emit_env);
- irg_walk_blkwise_graph(irg, NULL, ia32_gen_block, &emit_env);
+
+ if (cg->opt.extbb && cg->blk_sched) {
+ int i, n = ARR_LEN(cg->blk_sched);
+
+ for (i = 0; i < n;) {
+ ir_node *next_bl;
+
+ block = cg->blk_sched[i];
+ ++i;
+ next_bl = i < n ? cg->blk_sched[i] : NULL;
+
+ /* set here the link. the emitter expects to find the next block here */
+ set_irn_link(block, next_bl);
+ ia32_gen_block(block, &emit_env);
+ }
+ }
+ else {
+ /* "normal" block schedule: Note the get_next_block() returns the NUMBER of the block
+ in the block schedule. As this number should NEVER be equal the next block,
+ we does not need a clear block link here. */
+ irg_walk_blkwise_graph(irg, NULL, ia32_gen_block, &emit_env);
+ }
+
ia32_emit_func_epilog(F, irg);
}
projects / libfirm / blobdiff