/**
- * This file implements the node emitter.
- * @author Christian Wuerdig
- * $Id$
+ * @file
+ * @brief This file implements the node emitter.
+ * @author Christian Wuerdig, Matthias Braun
+ * @version $Id$
*/
-
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include "irargs_t.h"
#include "irprog_t.h"
#include "iredges_t.h"
+#include "execfreq.h"
+#include "error.h"
+#include "raw_bitset.h"
#include "../besched_t.h"
#include "../benode_t.h"
+#include "../beabi.h"
+#include "../be_dbgout.h"
+#include "../beemitter.h"
+#include "../begnuas.h"
+#include "../beirg_t.h"
#include "ia32_emitter.h"
#include "gen_ia32_emitter.h"
#include "ia32_map_regs.h"
#include "bearch_ia32_t.h"
-#define BLOCK_PREFIX(x) ".L" x
-
-#define SNPRINTF_BUF_LEN 128
-
-/* global arch_env for lc_printf functions */
-static const arch_env_t *arch_env = NULL;
-
-/** by default, we generate assembler code for the Linux gas */
-asm_flavour_t asm_flavour = ASM_LINUX_GAS;
-
-/**
- * Switch to a new section
- */
-void ia32_switch_section(FILE *F, section_t sec) {
- static section_t curr_sec = NO_SECTION;
- static const char *text[ASM_MAX][SECTION_MAX] = {
- {
- ".section\t.text", ".section\t.data", ".section\t.rodata", ".section\t.text"
- },
- {
- ".section\t.text", ".section\t.data", ".section .rdata,\"dr\"", ".section\t.text"
- }
- };
-
- if (curr_sec == sec)
- return;
-
- curr_sec = sec;
- switch (sec) {
-
- case NO_SECTION:
- break;
+DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
- case SECTION_TEXT:
- case SECTION_DATA:
- case SECTION_RODATA:
- case SECTION_COMMON:
- fprintf(F, "\t%s\n", text[asm_flavour][sec]);
- }
-}
-
-static void ia32_dump_function_object(FILE *F, const char *name)
-{
- switch (asm_flavour) {
- case ASM_LINUX_GAS:
- fprintf(F, "\t.type\t%s, @function\n", name);
- break;
- case ASM_MINGW_GAS:
- fprintf(F, "\t.def\t%s;\t.scl\t2;\t.type\t32;\t.endef\n", name);
- break;
- }
-}
-
-static void ia32_dump_function_size(FILE *F, const char *name)
-{
- switch (asm_flavour) {
- case ASM_LINUX_GAS:
- fprintf(F, "\t.size\t%s, .-%s\n", name, name);
- break;
- }
-}
-
-/*************************************************************
- * _ _ __ _ _
- * (_) | | / _| | | | |
- * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
- * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
- * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
- * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
- * | | | |
- * |_| |_|
- *************************************************************/
-
-static INLINE int be_is_unknown_reg(const arch_register_t *reg) {
- return \
- REGS_ARE_EQUAL(reg, &ia32_gp_regs[REG_GP_UKNWN]) || \
- REGS_ARE_EQUAL(reg, &ia32_xmm_regs[REG_XMM_UKNWN]) || \
- REGS_ARE_EQUAL(reg, &ia32_vfp_regs[REG_VFP_UKNWN]);
-}
-
-/**
- * returns true if a node has x87 registers
- */
-static INLINE int has_x87_register(const ir_node *n) {
- return is_irn_machine_user(n, 0);
-}
-
-/* We always pass the ir_node which is a pointer. */
-static int ia32_get_arg_type(const lc_arg_occ_t *occ) {
- return lc_arg_type_ptr;
-}
+#define BLOCK_PREFIX ".L"
+#define SNPRINTF_BUF_LEN 128
/**
* Returns the register at in position pos.
*/
-static const arch_register_t *get_in_reg(const ir_node *irn, int pos) {
+static
+const arch_register_t *get_in_reg(ia32_emit_env_t *env, const ir_node *irn,
+ int pos)
+{
+ const arch_env_t *arch_env = env->arch_env;
ir_node *op;
const arch_register_t *reg = NULL;
assert(reg && "no in register found");
- /* in case of unknown: just return a register */
- if (REGS_ARE_EQUAL(reg, &ia32_gp_regs[REG_GP_UKNWN]))
- reg = &ia32_gp_regs[REG_EAX];
- else if (REGS_ARE_EQUAL(reg, &ia32_xmm_regs[REG_XMM_UKNWN]))
- reg = &ia32_xmm_regs[REG_XMM0];
- else if (REGS_ARE_EQUAL(reg, &ia32_vfp_regs[REG_VFP_UKNWN]))
- reg = &ia32_vfp_regs[REG_VF0];
+ /* in case of a joker register: just return a valid register */
+ if (arch_register_type_is(reg, joker)) {
+ const arch_register_req_t *req;
+
+ /* ask for the requirements */
+ req = arch_get_register_req(arch_env, irn, pos);
+
+ if (arch_register_req_is(req, limited)) {
+ /* in case of limited requirements: get the first allowed register */
+ unsigned idx = rbitset_next(req->limited, 0, 1);
+ reg = arch_register_for_index(req->cls, idx);
+ } else {
+ /* otherwise get first register in class */
+ reg = arch_register_for_index(req->cls, 0);
+ }
+ }
return reg;
}
/**
* Returns the register at out position pos.
*/
-static const arch_register_t *get_out_reg(const ir_node *irn, int pos) {
- ir_node *proj;
- const arch_register_t *reg = NULL;
+static
+const arch_register_t *get_out_reg(ia32_emit_env_t *env, const ir_node *irn,
+ int pos)
+{
+ const arch_env_t *arch_env = env->arch_env;
+ ir_node *proj;
+ const arch_register_t *reg = NULL;
/* 1st case: irn is not of mode_T, so it has only */
/* one OUT register -> good */
if (get_irn_mode(irn) != mode_T) {
reg = arch_get_irn_register(arch_env, irn);
- }
- else if (is_ia32_irn(irn)) {
+ } else if (is_ia32_irn(irn)) {
reg = get_ia32_out_reg(irn, pos);
- }
- else {
+ } else {
const ir_edge_t *edge;
foreach_out_edge(irn, edge) {
return reg;
}
-enum io_direction {
- IN_REG,
- OUT_REG
-};
-
/**
- * Returns the name of the in register at position pos.
+ * Returns an ident for the given tarval tv.
*/
-static const char *get_ia32_reg_name(ir_node *irn, int pos, enum io_direction in_out) {
- const arch_register_t *reg;
-
- if (in_out == IN_REG) {
- reg = get_in_reg(irn, pos);
+static
+ident *get_ident_for_tv(tarval *tv) {
+ char buf[256];
+ tarval_snprintf(buf, sizeof(buf), tv);
+ return new_id_from_str(buf);
+}
- if (reg->reg_class == &ia32_reg_classes[CLASS_ia32_vfp]) {
- /* FIXME: works for binop only */
- assert(2 <= pos && pos <= 3);
- reg = get_ia32_attr(irn)->x87[pos - 2];
+/**
+ * Determine the gnu assembler suffix that indicates a mode
+ */
+static
+char get_mode_suffix(const ir_mode *mode) {
+ if(mode_is_float(mode)) {
+ switch(get_mode_size_bits(mode)) {
+ case 32:
+ return 's';
+ case 64:
+ return 'l';
+ case 80:
+ return 't';
}
- }
- else {
- /* destination address mode nodes don't have outputs */
- if (is_ia32_irn(irn) && get_ia32_op_type(irn) == ia32_AddrModeD) {
- return "MEM";
+ } else {
+ assert(mode_is_int(mode) || mode_is_reference(mode));
+ switch(get_mode_size_bits(mode)) {
+ case 64:
+ return 'q';
+ case 32:
+ return 'l';
+ case 16:
+ return 'w';
+ case 8:
+ return 'b';
}
+ }
+ panic("Can't output mode_suffix for %+F\n", mode);
+}
- reg = get_out_reg(irn, pos);
- if (reg->reg_class == &ia32_reg_classes[CLASS_ia32_vfp])
- reg = get_ia32_attr(irn)->x87[pos + 2];
+static
+int produces_result(const ir_node *node) {
+ return !(is_ia32_St(node) ||
+ is_ia32_Store8Bit(node) ||
+ is_ia32_CondJmp(node) ||
+ is_ia32_xCondJmp(node) ||
+ is_ia32_CmpSet(node) ||
+ is_ia32_xCmpSet(node) ||
+ is_ia32_SwitchJmp(node));
+}
+
+static
+const char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode,
+ const arch_register_t *reg) {
+ switch(get_mode_size_bits(mode)) {
+ case 8:
+ return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
+ case 16:
+ return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
+ default:
+ return (char *)arch_register_get_name(reg);
}
- return arch_register_get_name(reg);
}
/**
- * Get the register name for a node.
+ * Add a number to a prefix. This number will not be used a second time.
*/
-static int ia32_get_reg_name(lc_appendable_t *app,
- const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
+static
+char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
+ static unsigned long id = 0;
+ snprintf(buf, buflen, "%s%lu", prefix, ++id);
+ return buf;
+}
+
+/*************************************************************
+ * _ _ __ _ _
+ * (_) | | / _| | | | |
+ * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
+ * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
+ * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
+ * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
+ * | | | |
+ * |_| |_|
+ *************************************************************/
+
+// we have no C++ and can't define an implicit ia32_emit_env_t* cast to
+// be_emit_env_t* so we cheat a bit...
+#define be_emit_char(env,c) be_emit_char(env->emit,c)
+#define be_emit_string(env,s) be_emit_string(env->emit,s)
+#undef be_emit_cstring
+#define be_emit_cstring(env,x) { be_emit_string_len(env->emit, x, sizeof(x)-1); }
+#define be_emit_ident(env,i) be_emit_ident(env->emit,i)
+#define be_emit_write_line(env) be_emit_write_line(env->emit)
+#define be_emit_finish_line_gas(env,n) be_emit_finish_line_gas(env->emit,n)
+#define be_emit_pad_comment(env) be_emit_pad_comment(env->emit)
+
+void ia32_emit_source_register(ia32_emit_env_t *env, const ir_node *node, int pos)
{
- const char *buf;
- ir_node *irn = arg->v_ptr;
- int nr = occ->width - 1;
+ const arch_register_t *reg = get_in_reg(env, node, pos);
+ const char *reg_name = arch_register_get_name(reg);
- if (! irn)
- return lc_appendable_snadd(app, "(null)", 6);
+ assert(pos < get_irn_arity(node));
- buf = get_ia32_reg_name(irn, nr, occ->conversion == 'S' ? IN_REG : OUT_REG);
+ be_emit_char(env, '%');
+ be_emit_string(env, reg_name);
+}
+
+void ia32_emit_dest_register(ia32_emit_env_t *env, const ir_node *node, int pos) {
+ const arch_register_t *reg = get_out_reg(env, node, pos);
+ const char *reg_name = arch_register_get_name(reg);
- /* append the stupid % to register names */
- lc_appendable_chadd(app, '%');
- return lc_appendable_snadd(app, buf, strlen(buf));
+ be_emit_char(env, '%');
+ be_emit_string(env, reg_name);
}
-/**
- * Get the x87 register name for a node.
- */
-static int ia32_get_x87_name(lc_appendable_t *app,
- const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
+void ia32_emit_x87_name(ia32_emit_env_t *env, const ir_node *node, int pos)
{
- const char *buf;
- ir_node *irn = arg->v_ptr;
- int nr = occ->width - 1;
- ia32_attr_t *attr;
-
- if (! irn)
- return lc_appendable_snadd(app, "(null)", 6);
+ ia32_attr_t *attr = get_ia32_attr(node);
- attr = get_ia32_attr(irn);
- buf = attr->x87[nr]->name;
- lc_appendable_chadd(app, '%');
- return lc_appendable_snadd(app, buf, strlen(buf));
+ assert(pos < 3);
+ be_emit_char(env, '%');
+ be_emit_string(env, attr->x87[pos]->name);
}
-/**
- * Returns the tarval, offset or scale of an ia32 as a string.
- */
-static int ia32_const_to_str(lc_appendable_t *app,
- const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
+void ia32_emit_immediate(ia32_emit_env_t *env, const ir_node *node)
{
- const char *buf;
- ir_node *irn = arg->v_ptr;
+ tarval *tv;
+ ir_entity *ent;
+ ident *id;
- if (! irn)
- return lc_arg_append(app, occ, "(null)", 6);
+ be_emit_char(env, '$');
- if (occ->conversion == 'C') {
- buf = get_ia32_cnst(irn);
- }
- else { /* 'O' */
- buf = get_ia32_am_offs(irn);
+ switch(get_ia32_immop_type(node)) {
+ case ia32_ImmConst:
+ tv = get_ia32_Immop_tarval(node);
+ id = get_ident_for_tv(tv);
+ break;
+ case ia32_ImmSymConst:
+ ent = get_ia32_Immop_symconst(node);
+ mark_entity_visited(ent);
+ id = get_entity_ld_ident(ent);
+ break;
+ default:
+ assert(0);
+ be_emit_string(env, "BAD");
+ return;
}
- return buf ? lc_appendable_snadd(app, buf, strlen(buf)) : 0;
+ be_emit_ident(env, id);
}
-/**
- * Determines the SSE suffix depending on the mode.
- */
-static int ia32_get_mode_suffix(lc_appendable_t *app,
- const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
+void ia32_emit_mode_suffix(ia32_emit_env_t *env, const ir_mode *mode)
+{
+ be_emit_char(env, get_mode_suffix(mode));
+}
+
+void ia32_emit_x87_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
{
- ir_node *irn = arg->v_ptr;
- ir_mode *mode = get_irn_mode(irn);
+ ir_mode *mode = get_ia32_ls_mode(node);
+ if(mode != NULL)
+ ia32_emit_mode_suffix(env, mode);
+}
- if (mode == mode_T) {
- mode = (is_ia32_Ld(irn) || is_ia32_St(irn)) ? get_ia32_ls_mode(irn) : get_ia32_res_mode(irn);
+static
+char get_xmm_mode_suffix(ir_mode *mode)
+{
+ assert(mode_is_float(mode));
+ switch(get_mode_size_bits(mode)) {
+ case 32:
+ return 's';
+ case 64:
+ return 'd';
+ default:
+ assert(0);
}
+ return '%';
+}
- if (! irn)
- return lc_arg_append(app, occ, "(null)", 6);
+void ia32_emit_xmm_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
+{
+ ir_mode *mode = get_ia32_ls_mode(node);
+ assert(mode != NULL);
+ be_emit_char(env, 's');
+ be_emit_char(env, get_xmm_mode_suffix(mode));
+}
- if (mode_is_float(mode)) {
- return lc_appendable_chadd(app, get_mode_size_bits(mode) == 32 ? 's' : 'd');
- }
- else {
- return lc_appendable_chadd(app, mode_is_signed(mode) ? 's' : 'z');
- }
+void ia32_emit_xmm_mode_suffix_s(ia32_emit_env_t *env, const ir_node *node)
+{
+ ir_mode *mode = get_ia32_ls_mode(node);
+ assert(mode != NULL);
+ be_emit_char(env, get_xmm_mode_suffix(mode));
}
-/**
- * Return the ia32 printf arg environment.
- * We use the firm environment with some additional handlers.
- */
-const lc_arg_env_t *ia32_get_arg_env(void) {
- static lc_arg_env_t *env = NULL;
-
- static const lc_arg_handler_t ia32_reg_handler = { ia32_get_arg_type, ia32_get_reg_name };
- static const lc_arg_handler_t ia32_const_handler = { ia32_get_arg_type, ia32_const_to_str };
- static const lc_arg_handler_t ia32_mode_handler = { ia32_get_arg_type, ia32_get_mode_suffix };
- static const lc_arg_handler_t ia32_x87_handler = { ia32_get_arg_type, ia32_get_x87_name };
-
- if(env == NULL) {
- /* extend the firm printer */
- env = firm_get_arg_env();
-
- lc_arg_register(env, "ia32:sreg", 'S', &ia32_reg_handler);
- lc_arg_register(env, "ia32:dreg", 'D', &ia32_reg_handler);
- lc_arg_register(env, "ia32:cnst", 'C', &ia32_const_handler);
- lc_arg_register(env, "ia32:offs", 'O', &ia32_const_handler);
- lc_arg_register(env, "ia32:mode", 'M', &ia32_mode_handler);
- lc_arg_register(env, "ia32:x87", 'X', &ia32_x87_handler);
+void ia32_emit_extend_suffix(ia32_emit_env_t *env, const ir_mode *mode)
+{
+ if(get_mode_size_bits(mode) == 32)
+ return;
+ if(mode_is_signed(mode)) {
+ be_emit_char(env, 's');
+ } else {
+ be_emit_char(env, 'z');
}
+}
- return env;
+static
+void ia32_emit_function_object(ia32_emit_env_t *env, const char *name)
+{
+ switch (be_gas_flavour) {
+ case GAS_FLAVOUR_NORMAL:
+ be_emit_cstring(env, "\t.type\t");
+ be_emit_string(env, name);
+ be_emit_cstring(env, ", @function\n");
+ be_emit_write_line(env);
+ break;
+ case GAS_FLAVOUR_MINGW:
+ be_emit_cstring(env, "\t.def\t");
+ be_emit_string(env, name);
+ be_emit_cstring(env, ";\t.scl\t2;\t.type\t32;\t.endef\n");
+ be_emit_write_line(env);
+ break;
+ default:
+ break;
+ }
}
-static const char *ia32_get_reg_name_for_mode(ia32_emit_env_t *env, ir_mode *mode, const arch_register_t *reg) {
- switch(get_mode_size_bits(mode)) {
- case 8:
- return ia32_get_mapped_reg_name(env->isa->regs_8bit, reg);
- case 16:
- return ia32_get_mapped_reg_name(env->isa->regs_16bit, reg);
- default:
- return (char *)arch_register_get_name(reg);
+static
+void ia32_emit_function_size(ia32_emit_env_t *env, const char *name)
+{
+ switch (be_gas_flavour) {
+ case GAS_FLAVOUR_NORMAL:
+ be_emit_cstring(env, "\t.size\t");
+ be_emit_string(env, name);
+ be_emit_cstring(env, ", .-");
+ be_emit_string(env, name);
+ be_emit_char(env, '\n');
+ be_emit_write_line(env);
+ break;
+ default:
+ break;
}
}
+
+
/**
* Emits registers and/or address mode of a binary operation.
*/
-const char *ia32_emit_binop(const ir_node *n, ia32_emit_env_t *env) {
- static char *buf = NULL;
-
- /* verify that this function is never called on non-AM supporting operations */
- //assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
-
-#define PRODUCES_RESULT(n) \
- (!(is_ia32_St(n) || \
- is_ia32_Store8Bit(n) || \
- is_ia32_CondJmp(n) || \
- is_ia32_xCondJmp(n) || \
- is_ia32_CmpSet(n) || \
- is_ia32_xCmpSet(n) || \
- is_ia32_SwitchJmp(n)))
-
- if (! buf) {
- buf = xcalloc(1, SNPRINTF_BUF_LEN);
- }
- else {
- memset(buf, 0, SNPRINTF_BUF_LEN);
- }
-
- switch(get_ia32_op_type(n)) {
+void ia32_emit_binop(ia32_emit_env_t *env, const ir_node *node) {
+ switch(get_ia32_op_type(node)) {
case ia32_Normal:
- if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
- lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, get_ia32_cnst(n));
- }
- else {
- const arch_register_t *in1 = get_in_reg(n, 2);
- const arch_register_t *in2 = get_in_reg(n, 3);
- const arch_register_t *out = PRODUCES_RESULT(n) ? get_out_reg(n, 0) : NULL;
+ if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
+ ia32_emit_immediate(env, node);
+ be_emit_cstring(env, ", ");
+ ia32_emit_source_register(env, node, 2);
+ } else {
+ const arch_register_t *in1 = get_in_reg(env, node, 2);
+ const arch_register_t *in2 = get_in_reg(env, node, 3);
+ const arch_register_t *out = produces_result(node) ? get_out_reg(env, node, 0) : NULL;
const arch_register_t *in;
const char *in_name;
out = out ? out : in1;
in_name = arch_register_get_name(in);
- if (is_ia32_emit_cl(n)) {
+ if (is_ia32_emit_cl(node)) {
assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
in_name = "cl";
}
- snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s", arch_register_get_name(out), in_name);
+ be_emit_char(env, '%');
+ be_emit_string(env, in_name);
+ be_emit_cstring(env, ", %");
+ be_emit_string(env, arch_register_get_name(out));
}
break;
case ia32_AddrModeS:
- if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
- assert(! PRODUCES_RESULT(n) && "Source AM with Const must not produce result");
- snprintf(buf, SNPRINTF_BUF_LEN, "%s, %s", get_ia32_cnst(n), ia32_emit_am(n, env));
- }
- else {
- if (PRODUCES_RESULT(n)) {
- lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D, %s", n, ia32_emit_am(n, env));
- }
- else {
- lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, ia32_emit_am(n, env));
- }
+ ia32_emit_am(env, node);
+ be_emit_cstring(env, ", ");
+ if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
+ assert(!produces_result(node) && "Source AM with Const must not produce result");
+ ia32_emit_immediate(env, node);
+ } else if (produces_result(node)) {
+ ia32_emit_dest_register(env, node, 0);
+ } else {
+ ia32_emit_source_register(env, node, 2);
}
break;
case ia32_AddrModeD:
- if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
- lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s,%s%s",
- ia32_emit_am(n, env),
- is_ia32_ImmSymConst(n) ? " OFFSET FLAT:" : " ", /* In case of a symconst we must add OFFSET to */
- get_ia32_cnst(n)); /* tell the assembler to store it's address. */
- }
- else {
- const arch_register_t *in1 = get_in_reg(n, 2);
- ir_mode *mode = get_ia32_res_mode(n);
- const char *in_name;
+ if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
+ ia32_emit_immediate(env, node);
+ be_emit_cstring(env, ", ");
+ ia32_emit_am(env, node);
+ } else {
+ const arch_register_t *in1 = get_in_reg(env, node,
+ get_irn_arity(node) == 5 ? 3 : 2);
+ ir_mode *mode = get_ia32_ls_mode(node);
+ const char *in_name;
- mode = mode ? mode : get_ia32_ls_mode(n);
in_name = ia32_get_reg_name_for_mode(env, mode, in1);
- if (is_ia32_emit_cl(n)) {
+ if (is_ia32_emit_cl(node)) {
assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
in_name = "cl";
}
- lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s, %%%s", ia32_emit_am(n, env), in_name);
+ be_emit_char(env, '%');
+ be_emit_string(env, in_name);
+ be_emit_cstring(env, ", ");
+ ia32_emit_am(env, node);
}
break;
default:
assert(0 && "unsupported op type");
}
-
-#undef PRODUCES_RESULT
-
- return buf;
-}
-
-/**
- * Returns the xxx PTR string for a given mode
- *
- * @param mode the mode
- * @param x87_insn if non-zero returns the string for a x87 instruction
- * else for a SSE instruction
- */
-static const char *pointer_size(ir_mode *mode, int x87_insn)
-{
- if (mode) {
- switch (get_mode_size_bits(mode)) {
- case 8: return "BYTE PTR";
- case 16: return "WORD PTR";
- case 32: return "DWORD PTR";
- case 64:
- if (x87_insn)
- return "QWORD PTR";
- return NULL;
- case 80:
- case 96: return "XWORD PTR";
- default: return NULL;
- }
- }
- return NULL;
}
/**
* Emits registers and/or address mode of a binary operation.
*/
-const char *ia32_emit_x87_binop(const ir_node *n, ia32_emit_env_t *env) {
- static char *buf = NULL;
-
- /* verify that this function is never called on non-AM supporting operations */
- //assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
-
- if (! buf) {
- buf = xcalloc(1, SNPRINTF_BUF_LEN);
- }
- else {
- memset(buf, 0, SNPRINTF_BUF_LEN);
- }
-
- switch(get_ia32_op_type(n)) {
+void ia32_emit_x87_binop(ia32_emit_env_t *env, const ir_node *node) {
+ switch(get_ia32_op_type(node)) {
case ia32_Normal:
- if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
- ir_mode *mode = get_ia32_ls_mode(n);
- const char *p = pointer_size(mode, 1);
- lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s %s", p, get_ia32_cnst(n));
- }
- else {
- ia32_attr_t *attr = get_ia32_attr(n);
+ if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
+ // should not happen...
+ assert(0);
+ } else {
+ ia32_attr_t *attr = get_ia32_attr(node);
const arch_register_t *in1 = attr->x87[0];
const arch_register_t *in2 = attr->x87[1];
const arch_register_t *out = attr->x87[2];
const arch_register_t *in;
- const char *in_name;
- in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
- out = out ? out : in1;
- in_name = arch_register_get_name(in);
+ in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
+ out = out ? out : in1;
- snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s", arch_register_get_name(out), in_name);
+ be_emit_char(env, '%');
+ be_emit_string(env, arch_register_get_name(in));
+ be_emit_cstring(env, ", %");
+ be_emit_string(env, arch_register_get_name(out));
}
break;
case ia32_AddrModeS:
case ia32_AddrModeD:
- lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s", ia32_emit_am(n, env));
+ ia32_emit_am(env, node);
break;
default:
assert(0 && "unsupported op type");
}
-
- return buf;
}
/**
* Emits registers and/or address mode of a unary operation.
*/
-const char *ia32_emit_unop(const ir_node *n, ia32_emit_env_t *env) {
- static char *buf = NULL;
-
- if (! buf) {
- buf = xcalloc(1, SNPRINTF_BUF_LEN);
- }
- else {
- memset(buf, 0, SNPRINTF_BUF_LEN);
- }
-
- switch(get_ia32_op_type(n)) {
+void ia32_emit_unop(ia32_emit_env_t *env, const ir_node *node) {
+ switch(get_ia32_op_type(node)) {
case ia32_Normal:
- if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
- lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%C", n);
- }
- else {
- if (is_ia32_MulS(n) || is_ia32_Mulh(n)) {
- /* MulS and Mulh implicitly multiply by EAX */
- lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%4S", n);
+ if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
+ ia32_emit_immediate(env, node);
+ } else {
+ if (is_ia32_Mul(node) || is_ia32_IMul1OP(node)) {
+ ia32_emit_source_register(env, node, 3);
+ } else if(is_ia32_IDiv(node) || is_ia32_Div(node)) {
+ ia32_emit_source_register(env, node, 4);
+ } else if(is_ia32_Push(node)) {
+ ia32_emit_source_register(env, node, 2);
+ } else if(is_ia32_Pop(node)) {
+ ia32_emit_dest_register(env, node, 1);
+ } else {
+ ia32_emit_dest_register(env, node, 0);
}
- else
- lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D", n);
}
break;
+ case ia32_AddrModeS:
case ia32_AddrModeD:
- snprintf(buf, SNPRINTF_BUF_LEN, "%s", ia32_emit_am(n, env));
+ ia32_emit_am(env, node);
break;
default:
assert(0 && "unsupported op type");
}
-
- return buf;
}
/**
* Emits address mode.
*/
-const char *ia32_emit_am(const ir_node *n, ia32_emit_env_t *env) {
- ia32_am_flavour_t am_flav = get_ia32_am_flavour(n);
- int had_output = 0;
- char *s;
- const char *p;
- int size;
- static struct obstack *obst = NULL;
- ir_mode *mode = get_ia32_ls_mode(n);
-
- if (! is_ia32_Lea(n))
- assert(mode && "AM node must have ls_mode attribute set.");
-
- if (! obst) {
- obst = xcalloc(1, sizeof(*obst));
- }
- else {
- obstack_free(obst, NULL);
- }
-
- /* obstack_free with NULL results in an uninitialized obstack */
- obstack_init(obst);
-
- p = pointer_size(mode, has_x87_register(n));
- if (p)
- obstack_printf(obst, "%s ", p);
-
- /* emit address mode symconst */
- if (get_ia32_am_sc(n)) {
- if (is_ia32_am_sc_sign(n))
- obstack_printf(obst, "-");
- obstack_printf(obst, "%s", get_id_str(get_ia32_am_sc(n)));
- }
-
- if (am_flav & ia32_B) {
- obstack_printf(obst, "[");
- lc_eoprintf(ia32_get_arg_env(), obst, "%1S", n);
- had_output = 1;
+void ia32_emit_am(ia32_emit_env_t *env, const ir_node *node) {
+ ia32_am_flavour_t am_flav = get_ia32_am_flavour(node);
+ ir_entity *ent = get_ia32_am_sc(node);
+ int offs = get_ia32_am_offs_int(node);
+
+ /* just to be sure... */
+ assert(!is_ia32_use_frame(node) || get_ia32_frame_ent(node) != NULL);
+
+ /* emit offset */
+ if (ent != NULL) {
+ ident *id;
+
+ mark_entity_visited(ent);
+ id = get_entity_ld_ident(ent);
+ if (is_ia32_am_sc_sign(node))
+ be_emit_char(env, '-');
+ be_emit_ident(env, id);
+
+ if(get_entity_owner(ent) == get_tls_type()) {
+ if (get_entity_visibility(ent) == visibility_external_allocated) {
+ be_emit_cstring(env, "@INDNTPOFF");
+ } else {
+ be_emit_cstring(env, "@NTPOFF");
+ }
+ }
}
- if (am_flav & ia32_I) {
- if (had_output) {
- obstack_printf(obst, "+");
- }
- else {
- obstack_printf(obst, "[");
+ if(offs != 0) {
+ if(ent != NULL) {
+ be_emit_irprintf(env->emit, "%+d", offs);
+ } else {
+ be_emit_irprintf(env->emit, "%d", offs);
}
+ }
- lc_eoprintf(ia32_get_arg_env(), obst, "%2S", n);
+ if (am_flav & (ia32_B | ia32_I)) {
+ be_emit_char(env, '(');
- if (am_flav & ia32_S) {
- obstack_printf(obst, "*%d", 1 << get_ia32_am_scale(n));
+ /* emit base */
+ if (am_flav & ia32_B) {
+ ia32_emit_source_register(env, node, 0);
}
- had_output = 1;
- }
-
- if (am_flav & ia32_O) {
- s = get_ia32_am_offs(n);
+ /* emit index + scale */
+ if (am_flav & ia32_I) {
+ be_emit_char(env, ',');
+ ia32_emit_source_register(env, node, 1);
- if (s) {
- /* omit explicit + if there was no base or index */
- if (! had_output) {
- obstack_printf(obst, "[");
- if (s[0] == '+')
- s++;
+ if (am_flav & ia32_S) {
+ be_emit_irprintf(env->emit, ",%d", 1 << get_ia32_am_scale(node));
}
-
- obstack_printf(obst, s);
- had_output = 1;
}
+ be_emit_char(env, ')');
}
-
- if (had_output)
- obstack_printf(obst, "] ");
-
- size = obstack_object_size(obst);
- s = obstack_finish(obst);
- s[size - 1] = '\0';
-
- return s;
-}
-
-/**
- * emit an address
- */
-const char *ia32_emit_adr(const ir_node *irn, ia32_emit_env_t *env)
-{
- static char buf[SNPRINTF_BUF_LEN];
- ir_mode *mode = get_ia32_ls_mode(irn);
- const char *adr = get_ia32_cnst(irn);
- const char *pref = pointer_size(mode, has_x87_register(irn));
-
- snprintf(buf, SNPRINTF_BUF_LEN, "%s %s", pref ? pref : "", adr);
- return buf;
-}
-
-/**
- * Formated print of commands and comments.
- */
-static void ia32_fprintf_format(FILE *F, const ir_node *irn, char *cmd_buf, char *cmnt_buf) {
- unsigned lineno;
- const char *name = irn ? be_retrieve_dbg_info(get_irn_dbg_info((ir_node *)irn), &lineno) : NULL;
-
- if (name)
- fprintf(F, "\t%-35s %-60s /* %s:%u */\n", cmd_buf, cmnt_buf, name, lineno);
- else
- fprintf(F, "\t%-35s %-60s\n", cmd_buf, cmnt_buf);
}
-
-
-/**
- * Add a number to a prefix. This number will not be used a second time.
- */
-static char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
- static unsigned long id = 0;
- snprintf(buf, buflen, "%s%lu", prefix, ++id);
- return buf;
-}
-
-
-
/*************************************************
* _ _ _
* (_) | | |
/*
* positive conditions for signed compares
*/
-static const struct cmp2conditon_t cmp2condition_s[] = {
- { NULL, pn_Cmp_False }, /* always false */
- { "e", pn_Cmp_Eq }, /* == */
- { "l", pn_Cmp_Lt }, /* < */
- { "le", pn_Cmp_Le }, /* <= */
- { "g", pn_Cmp_Gt }, /* > */
- { "ge", pn_Cmp_Ge }, /* >= */
- { "ne", pn_Cmp_Lg }, /* != */
- { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
- { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
- { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
- { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
- { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
- { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
- { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
- { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
- { NULL, pn_Cmp_True }, /* always true */
+static
+const struct cmp2conditon_t cmp2condition_s[] = {
+ { NULL, pn_Cmp_False }, /* always false */
+ { "e", pn_Cmp_Eq }, /* == */
+ { "l", pn_Cmp_Lt }, /* < */
+ { "le", pn_Cmp_Le }, /* <= */
+ { "g", pn_Cmp_Gt }, /* > */
+ { "ge", pn_Cmp_Ge }, /* >= */
+ { "ne", pn_Cmp_Lg }, /* != */
+ { NULL, pn_Cmp_Leg}, /* Floating point: ordered */
+ { NULL, pn_Cmp_Uo }, /* Floating point: unordered */
+ { "e", pn_Cmp_Ue }, /* Floating point: unordered or == */
+ { "b", pn_Cmp_Ul }, /* Floating point: unordered or < */
+ { "be", pn_Cmp_Ule }, /* Floating point: unordered or <= */
+ { "a", pn_Cmp_Ug }, /* Floating point: unordered or > */
+ { "ae", pn_Cmp_Uge }, /* Floating point: unordered or >= */
+ { "ne", pn_Cmp_Ne }, /* Floating point: unordered or != */
+ { NULL, pn_Cmp_True }, /* always true */
};
/*
* positive conditions for unsigned compares
*/
-static const struct cmp2conditon_t cmp2condition_u[] = {
+static
+const struct cmp2conditon_t cmp2condition_u[] = {
{ NULL, pn_Cmp_False }, /* always false */
{ "e", pn_Cmp_Eq }, /* == */
{ "b", pn_Cmp_Lt }, /* < */
{ "a", pn_Cmp_Gt }, /* > */
{ "ae", pn_Cmp_Ge }, /* >= */
{ "ne", pn_Cmp_Lg }, /* != */
- { "ordered", pn_Cmp_Leg }, /* Floating point: ordered */
- { "unordered", pn_Cmp_Uo }, /* FLoting point: unordered */
- { "unordered or ==", pn_Cmp_Ue }, /* Floating point: unordered or == */
- { "unordered or <", pn_Cmp_Ul }, /* Floating point: unordered or < */
- { "unordered or <=", pn_Cmp_Ule }, /* Floating point: unordered or <= */
- { "unordered or >", pn_Cmp_Ug }, /* Floating point: unordered or > */
- { "unordered or >=", pn_Cmp_Uge }, /* Floating point: unordered or >= */
- { "unordered or !=", pn_Cmp_Ne }, /* Floating point: unordered or != */
{ NULL, pn_Cmp_True }, /* always true */
};
/*
* returns the condition code
*/
-static const char *get_cmp_suffix(int cmp_code, int unsigned_cmp)
+static
+const char *get_cmp_suffix(int cmp_code)
{
- assert(cmp2condition_s[cmp_code].num == cmp_code);
- assert(cmp2condition_u[cmp_code].num == cmp_code);
+ assert( (cmp2condition_s[cmp_code & 15].num) == (cmp_code & 15));
+ assert( (cmp2condition_u[cmp_code & 7].num) == (cmp_code & 7));
+
+ if((cmp_code & ia32_pn_Cmp_Unsigned)) {
+ return cmp2condition_u[cmp_code & 7].name;
+ } else {
+ return cmp2condition_s[cmp_code & 15].name;
+ }
+}
- return unsigned_cmp ? cmp2condition_u[cmp_code & 7].name : cmp2condition_s[cmp_code & 7].name;
+void ia32_emit_cmp_suffix(ia32_emit_env_t *env, long pnc)
+{
+ be_emit_string(env, get_cmp_suffix(pnc));
}
+
/**
* Returns the target block for a control flow node.
*/
-static ir_node *get_cfop_target_block(const ir_node *irn) {
+static
+ir_node *get_cfop_target_block(const ir_node *irn) {
return get_irn_link(irn);
}
/**
* Returns the target label for a control flow node.
*/
-static char *get_cfop_target(const ir_node *irn, char *buf) {
- ir_node *bl = get_cfop_target_block(irn);
+void ia32_emit_cfop_target(ia32_emit_env_t * env, const ir_node *node) {
+ ir_node *block = get_cfop_target_block(node);
- snprintf(buf, SNPRINTF_BUF_LEN, BLOCK_PREFIX("%ld"), get_irn_node_nr(bl));
- return buf;
+ be_emit_cstring(env, BLOCK_PREFIX);
+ be_emit_irprintf(env->emit, "%d", get_irn_node_nr(block));
}
/** Return the next block in Block schedule */
/**
* Returns the Proj with projection number proj and NOT mode_M
*/
-static ir_node *get_proj(const ir_node *irn, long proj) {
+static
+ir_node *get_proj(const ir_node *node, long proj) {
const ir_edge_t *edge;
ir_node *src;
- assert(get_irn_mode(irn) == mode_T && "expected mode_T node");
+ assert(get_irn_mode(node) == mode_T && "expected mode_T node");
- foreach_out_edge(irn, edge) {
+ foreach_out_edge(node, edge) {
src = get_edge_src_irn(edge);
assert(is_Proj(src) && "Proj expected");
/**
* Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
*/
-static void finish_CondJmp(FILE *F, const ir_node *irn, ir_mode *mode) {
- const ir_node *proj1, *proj2 = NULL;
- const ir_node *block, *next_bl = NULL;
- char buf[SNPRINTF_BUF_LEN];
- char cmd_buf[SNPRINTF_BUF_LEN];
- char cmnt_buf[SNPRINTF_BUF_LEN];
+static
+void finish_CondJmp(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode,
+ long pnc) {
+ const ir_node *proj_true;
+ const ir_node *proj_false;
+ const ir_node *block;
+ const ir_node *next_block;
+ int flipped = 0;
/* get both Proj's */
- proj1 = get_proj(irn, pn_Cond_true);
- assert(proj1 && "CondJmp without true Proj");
+ proj_true = get_proj(node, pn_Cond_true);
+ assert(proj_true && "CondJmp without true Proj");
- proj2 = get_proj(irn, pn_Cond_false);
- assert(proj2 && "CondJmp without false Proj");
+ proj_false = get_proj(node, pn_Cond_false);
+ assert(proj_false && "CondJmp without false Proj");
/* for now, the code works for scheduled and non-schedules blocks */
- block = get_nodes_block(irn);
+ block = get_nodes_block(node);
/* we have a block schedule */
- next_bl = next_blk_sched(block);
+ next_block = next_blk_sched(block);
- if (get_cfop_target_block(proj1) == next_bl) {
+ if (get_cfop_target_block(proj_true) == next_block) {
/* exchange both proj's so the second one can be omitted */
- const ir_node *t = proj1;
- proj1 = proj2;
- proj2 = t;
- }
+ const ir_node *t = proj_true;
- /* the first Proj must always be created */
- if (get_Proj_proj(proj1) == pn_Cond_true) {
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s",
- get_cmp_suffix(get_ia32_pncode(irn), ! mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
- get_cfop_target(proj1, buf));
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == TRUE */");
+ proj_true = proj_false;
+ proj_false = t;
+ flipped = 1;
+ pnc = get_negated_pnc(pnc, mode);
}
- else {
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "j%s %s",
- get_cmp_suffix(get_negated_pnc(get_ia32_pncode(irn), mode),
- ! mode_is_signed(get_irn_mode(get_irn_n(irn, 0)))),
- get_cfop_target(proj1, buf));
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* cmp(a, b) == FALSE */");
+
+ /* in case of unordered compare, check for parity */
+ if (pnc & pn_Cmp_Uo) {
+ be_emit_cstring(env, "\tjp ");
+ ia32_emit_cfop_target(env, proj_true);
+ be_emit_finish_line_gas(env, proj_true);
}
- IA32_DO_EMIT(irn);
+
+ be_emit_cstring(env, "\tj");
+ ia32_emit_cmp_suffix(env, pnc);
+ be_emit_char(env, ' ');
+ ia32_emit_cfop_target(env, proj_true);
+ be_emit_finish_line_gas(env, proj_true);
/* the second Proj might be a fallthrough */
- if (get_cfop_target_block(proj2) != next_bl) {
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(proj2, buf));
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* otherwise */");
- }
- else {
- cmd_buf[0] = '\0';
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrough %s */", get_cfop_target(proj2, buf));
+ if (get_cfop_target_block(proj_false) != next_block) {
+ be_emit_cstring(env, "\tjmp ");
+ ia32_emit_cfop_target(env, proj_false);
+ be_emit_finish_line_gas(env, proj_false);
+ } else {
+ be_emit_cstring(env, "\t/* fallthrough to");
+ ia32_emit_cfop_target(env, proj_false);
+ be_emit_cstring(env, " */");
+ be_emit_finish_line_gas(env, proj_false);
}
- IA32_DO_EMIT(irn);
}
/**
* Emits code for conditional jump.
*/
-static void CondJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
- FILE *F = env->out;
- char cmd_buf[SNPRINTF_BUF_LEN];
- char cmnt_buf[SNPRINTF_BUF_LEN];
+static
+void CondJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
+ be_emit_cstring(env, "\tcmp ");
+ ia32_emit_binop(env, node);
+ be_emit_finish_line_gas(env, node);
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cmp %s", ia32_emit_binop(irn, env));
- lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
- IA32_DO_EMIT(irn);
- finish_CondJmp(F, irn, get_ia32_res_mode(irn));
+ finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
}
/**
* Emits code for conditional jump with two variables.
*/
-static void emit_ia32_CondJmp(const ir_node *irn, ia32_emit_env_t *env) {
- CondJmp_emitter(irn, env);
+static
+void emit_ia32_CondJmp(ia32_emit_env_t *env, const ir_node *node) {
+ CondJmp_emitter(env, node);
}
/**
* Emits code for conditional test and jump.
*/
-static void TestJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
-
-#define IA32_IS_IMMOP (is_ia32_ImmConst(irn) || is_ia32_ImmSymConst(irn))
-
- FILE *F = env->out;
- const char *op1 = arch_register_get_name(get_in_reg(irn, 0));
- const char *op2 = IA32_IS_IMMOP ? get_ia32_cnst(irn) : NULL;
- char cmd_buf[SNPRINTF_BUF_LEN];
- char cmnt_buf[SNPRINTF_BUF_LEN];
-
- if (! op2)
- op2 = arch_register_get_name(get_in_reg(irn, 1));
-
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "test %%%s,%s%s ", op1, IA32_IS_IMMOP ? " " : " %", op2);
- lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
-
- IA32_DO_EMIT(irn);
- finish_CondJmp(F, irn, get_ia32_res_mode(irn));
-
-#undef IA32_IS_IMMOP
+static
+void TestJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
+ if(is_ia32_ImmSymConst(node) || is_ia32_ImmConst(node)) {
+ be_emit_cstring(env, "\ttest ");
+ ia32_emit_immediate(env, node);
+ be_emit_cstring(env, ", ");
+ ia32_emit_source_register(env, node, 0);
+ be_emit_finish_line_gas(env, node);
+ } else {
+ be_emit_cstring(env, "\ttest ");
+ ia32_emit_source_register(env, node, 1);
+ be_emit_cstring(env, ", ");
+ ia32_emit_source_register(env, node, 0);
+ be_emit_finish_line_gas(env, node);
+ }
+ finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
}
/**
* Emits code for conditional test and jump with two variables.
*/
-static void emit_ia32_TestJmp(const ir_node *irn, ia32_emit_env_t *env) {
- TestJmp_emitter(irn, env);
+static
+void emit_ia32_TestJmp(ia32_emit_env_t *env, const ir_node *node) {
+ TestJmp_emitter(env, node);
}
-static void emit_ia32_CJmp(const ir_node *irn, ia32_emit_env_t *env) {
- FILE *F = env->out;
- char cmd_buf[SNPRINTF_BUF_LEN];
- char cmnt_buf[SNPRINTF_BUF_LEN];
+static
+void emit_ia32_CJmp(ia32_emit_env_t *env, const ir_node *node) {
+ be_emit_cstring(env, "/* omitted redundant test */");
+ be_emit_finish_line_gas(env, node);
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
- lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test */", irn);
- IA32_DO_EMIT(irn);
- finish_CondJmp(F, irn, get_ia32_res_mode(irn));
+ finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
}
-static void emit_ia32_CJmpAM(const ir_node *irn, ia32_emit_env_t *env) {
- FILE *F = env->out;
- char cmd_buf[SNPRINTF_BUF_LEN];
- char cmnt_buf[SNPRINTF_BUF_LEN];
+static
+void emit_ia32_CJmpAM(ia32_emit_env_t *env, const ir_node *node) {
+ be_emit_cstring(env, "/* omitted redundant test/cmp */");
+ be_emit_finish_line_gas(env, node);
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
- lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test/cmp */", irn);
- IA32_DO_EMIT(irn);
- finish_CondJmp(F, irn, get_ia32_res_mode(irn));
+ finish_CondJmp(env, node, mode_Is, get_ia32_pncode(node));
}
/**
* Emits code for conditional SSE floating point jump with two variables.
*/
-static void emit_ia32_xCondJmp(ir_node *irn, ia32_emit_env_t *env) {
- FILE *F = env->out;
- char cmd_buf[SNPRINTF_BUF_LEN];
- char cmnt_buf[SNPRINTF_BUF_LEN];
-
- lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "ucomis%M %s", irn, ia32_emit_binop(irn, env));
- lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
- IA32_DO_EMIT(irn);
- finish_CondJmp(F, irn, get_ia32_res_mode(irn));
+static
+void emit_ia32_xCondJmp(ia32_emit_env_t *env, const ir_node *node) {
+ be_emit_cstring(env, "\tucomi");
+ ia32_emit_xmm_mode_suffix(env, node);
+ be_emit_char(env, ' ');
+ ia32_emit_binop(env, node);
+ be_emit_finish_line_gas(env, node);
+ finish_CondJmp(env, node, mode_F, get_ia32_pncode(node));
}
/**
* Emits code for conditional x87 floating point jump with two variables.
*/
-static void emit_ia32_x87CondJmp(ir_node *irn, ia32_emit_env_t *env) {
- FILE *F = env->out;
- char cmd_buf[SNPRINTF_BUF_LEN];
- char cmnt_buf[SNPRINTF_BUF_LEN];
- ia32_attr_t *attr = get_ia32_attr(irn);
+static
+void emit_ia32_x87CondJmp(ia32_emit_env_t *env, const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
const char *reg = attr->x87[1]->name;
- const char *instr = "fcom";
- int reverse = 0;
+ long pnc = get_ia32_pncode(node);
- switch (get_ia32_pncode(irn)) {
+ switch (get_ia32_irn_opcode(node)) {
case iro_ia32_fcomrJmp:
- reverse = 1;
+ pnc = get_inversed_pnc(pnc);
+ reg = attr->x87[0]->name;
case iro_ia32_fcomJmp:
default:
- instr = "fucom";
+ be_emit_cstring(env, "\tfucom ");
break;
case iro_ia32_fcomrpJmp:
- reverse = 1;
+ pnc = get_inversed_pnc(pnc);
+ reg = attr->x87[0]->name;
case iro_ia32_fcompJmp:
- instr = "fucomp";
+ be_emit_cstring(env, "\tfucomp ");
break;
case iro_ia32_fcomrppJmp:
- reverse = 1;
+ pnc = get_inversed_pnc(pnc);
case iro_ia32_fcomppJmp:
- instr = "fucompp";
+ be_emit_cstring(env, "\tfucompp ");
reg = "";
break;
}
- if (reverse)
- set_ia32_pncode(irn, (long)get_negated_pnc(get_ia32_pncode(irn), mode_Is));
+ if(reg[0] != '\0') {
+ be_emit_char(env, '%');
+ be_emit_string(env, reg);
+ }
+ be_emit_finish_line_gas(env, node);
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "%s %%%s", instr, reg);
- lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
- IA32_DO_EMIT(irn);
- lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "fnstsw %%ax", irn);
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* Store x87 FPU Control Word */");
- IA32_DO_EMIT(irn);
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "sahf");
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* Store ah into flags */");
- IA32_DO_EMIT(irn);
+ be_emit_cstring(env, "\tfnstsw %ax");
+ be_emit_finish_line_gas(env, node);
+ be_emit_cstring(env, "\tsahf");
+ be_emit_finish_line_gas(env, node);
- finish_CondJmp(F, irn, mode_Is);
+ finish_CondJmp(env, node, mode_E, pnc);
}
-static void CMov_emitter(ir_node *irn, ia32_emit_env_t *env) {
- FILE *F = env->out;
- const lc_arg_env_t *arg_env = ia32_get_arg_env();
- const char *cmp_suffix = get_cmp_suffix(get_ia32_pncode(irn), ! mode_is_signed(get_irn_mode(get_irn_n(irn, 0))));
- int is_PsiCondCMov = is_ia32_PsiCondCMov(irn);
-
- char cmd_buf[SNPRINTF_BUF_LEN];
- char cmnt_buf[SNPRINTF_BUF_LEN];
+static
+void CMov_emitter(ia32_emit_env_t *env, const ir_node *node) {
+ long pnc = get_ia32_pncode(node);
+ int is_PsiCondCMov = is_ia32_PsiCondCMov(node);
+ int idx_left = 2 - is_PsiCondCMov;
+ int idx_right = 3 - is_PsiCondCMov;
const arch_register_t *in1, *in2, *out;
- out = arch_get_irn_register(env->arch_env, irn);
- in1 = arch_get_irn_register(env->arch_env, get_irn_n(irn, 2 - is_PsiCondCMov));
- in2 = arch_get_irn_register(env->arch_env, get_irn_n(irn, 3 - is_PsiCondCMov));
+ out = arch_get_irn_register(env->arch_env, node);
+ in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_left));
+ in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_right));
/* we have to emit the cmp first, because the destination register */
/* could be one of the compare registers */
- if (is_ia32_CmpCMov(irn)) {
- lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %1S, %2S", irn, irn);
- }
- else if (is_ia32_xCmpCMov(irn)) {
- lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "ucomis%M %1S, %2S", get_irn_n(irn, 0), irn, irn);
- }
- else if (is_PsiCondCMov) {
+ if (is_ia32_CmpCMov(node)) {
+ be_emit_cstring(env, "\tcmp ");
+ ia32_emit_source_register(env, node, 1);
+ be_emit_cstring(env, ", ");
+ ia32_emit_source_register(env, node, 0);
+ } else if (is_ia32_xCmpCMov(node)) {
+ be_emit_cstring(env, "\tucomis");
+ ia32_emit_mode_suffix(env, get_irn_mode(node));
+ be_emit_char(env, ' ');
+ ia32_emit_source_register(env, node, 1);
+ be_emit_cstring(env, ", ");
+ ia32_emit_source_register(env, node, 0);
+ } else if (is_PsiCondCMov) {
/* omit compare because flags are already set by And/Or */
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
- }
- else {
+ be_emit_cstring(env, "\ttest ");
+ ia32_emit_source_register(env, node, 0);
+ be_emit_cstring(env, ", ");
+ ia32_emit_source_register(env, node, 0);
+ } else {
assert(0 && "unsupported CMov");
}
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* Psi condition */" );
- IA32_DO_EMIT(irn);
+ be_emit_finish_line_gas(env, node);
if (REGS_ARE_EQUAL(out, in2)) {
/* best case: default in == out -> do nothing */
- }
- else if (REGS_ARE_EQUAL(out, in1)) {
+ } else if (REGS_ARE_EQUAL(out, in1)) {
+ ir_node *n = (ir_node*) node;
/* true in == out -> need complement compare and exchange true and default in */
- ir_node *t = get_irn_n(irn, 2);
- set_irn_n(irn, 2, get_irn_n(irn, 3));
- set_irn_n(irn, 3, t);
-
- cmp_suffix = get_cmp_suffix(get_inversed_pnc(get_ia32_pncode(irn)), ! mode_is_signed(get_irn_mode(get_irn_n(irn, 0))));
+ ir_node *t = get_irn_n(n, idx_left);
+ set_irn_n(n, idx_left, get_irn_n(n, idx_right));
+ set_irn_n(n, idx_right, t);
- }
- else {
+ pnc = get_negated_pnc(pnc, get_irn_mode(node));
+ } else {
/* out is different from in: need copy default -> out */
- lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %4S", irn, irn);
- lc_esnprintf(arg_env, cmnt_buf, SNPRINTF_BUF_LEN, "/* copy default -> out */" );
- IA32_DO_EMIT(irn);
+ if (is_PsiCondCMov) {
+ be_emit_cstring(env, "\tmovl ");
+ ia32_emit_dest_register(env, node, 2);
+ be_emit_cstring(env, ", ");
+ ia32_emit_dest_register(env, node, 0);
+ } else {
+ be_emit_cstring(env, "\tmovl ");
+ ia32_emit_source_register(env, node, 3);
+ be_emit_cstring(env, ", ");
+ ia32_emit_dest_register(env, node, 0);
+ }
+ be_emit_finish_line_gas(env, node);
}
- lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmov%s %1D, %3S", cmp_suffix, irn, irn);
- lc_esnprintf(arg_env, cmnt_buf, SNPRINTF_BUF_LEN, "/* condition is true case */" );
- IA32_DO_EMIT(irn);
+ if (is_PsiCondCMov) {
+ be_emit_cstring(env, "\tcmov");
+ ia32_emit_cmp_suffix(env, pnc);
+ be_emit_cstring(env, "l ");
+ ia32_emit_source_register(env, node, 1);
+ be_emit_cstring(env, ", ");
+ ia32_emit_dest_register(env, node, 0);
+ } else {
+ be_emit_cstring(env, "\tcmov");
+ ia32_emit_cmp_suffix(env, pnc);
+ be_emit_cstring(env, "l ");
+ ia32_emit_source_register(env, node, 2);
+ be_emit_cstring(env, ", ");
+ ia32_emit_dest_register(env, node, 0);
+ }
+ be_emit_finish_line_gas(env, node);
}
-static void emit_ia32_CmpCMov(ir_node *irn, ia32_emit_env_t *env) {
- CMov_emitter(irn, env);
+static
+void emit_ia32_CmpCMov(ia32_emit_env_t *env, const ir_node *node) {
+ CMov_emitter(env, node);
}
-static void emit_ia32_PsiCondCMov(ir_node *irn, ia32_emit_env_t *env) {
- CMov_emitter(irn, env);
+static
+void emit_ia32_PsiCondCMov(ia32_emit_env_t *env, const ir_node *node) {
+ CMov_emitter(env, node);
}
-static void emit_ia32_xCmpCMov(ir_node *irn, ia32_emit_env_t *env) {
- CMov_emitter(irn, env);
+static
+void emit_ia32_xCmpCMov(ia32_emit_env_t *env, const ir_node *node) {
+ CMov_emitter(env, node);
}
-static void Set_emitter(ir_node *irn, ia32_emit_env_t *env) {
- FILE *F = env->out;
- const lc_arg_env_t *arg_env = ia32_get_arg_env();
- const char *cmp_suffix = get_cmp_suffix(get_ia32_pncode(irn), ! mode_is_signed(get_irn_mode(get_irn_n(irn, 0))));
- const char *instr = "xor";
+static
+void Set_emitter(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode) {
+ int pnc = get_ia32_pncode(node);
const char *reg8bit;
-
- char cmd_buf[SNPRINTF_BUF_LEN];
- char cmnt_buf[SNPRINTF_BUF_LEN];
const arch_register_t *out;
- out = arch_get_irn_register(env->arch_env, irn);
+ out = arch_get_irn_register(env->arch_env, node);
reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out);
- if (env->isa->opt_arch == arch_pentium_4) {
- /* P4 prefers sub r, r, others xor r, r */
- instr = "sub";
- }
-
- /* in case of a PsiCondSet use mov because it doesn't affect the eflags */
- if (is_ia32_PsiCondSet(irn)) {
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "mov %%%s, 0", arch_register_get_name(out));
- }
- else {
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "%s %%%s, %%%s", instr, arch_register_get_name(out), arch_register_get_name(out));
- }
-
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* clear target as set modifies only lower 8 bit */");
- IA32_DO_EMIT(irn);
-
- if (is_ia32_CmpSet(irn)) {
- lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %s", ia32_emit_binop(irn, env));
- }
- else if (is_ia32_xCmpSet(irn)) {
- lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "ucomis%M %s", get_irn_n(irn, 0), ia32_emit_binop(irn, env));
- }
- else if (is_ia32_PsiCondSet(irn)) {
- /* omit compare because flags are already set by And/Or */
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
- }
- else {
+ if (is_ia32_CmpSet(node)) {
+ be_emit_cstring(env, "\tcmp ");
+ ia32_emit_binop(env, node);
+ } else if (is_ia32_xCmpSet(node)) {
+ be_emit_cstring(env, "\tucomis");
+ ia32_emit_mode_suffix(env, get_irn_mode(get_irn_n(node, 2)));
+ be_emit_char(env, ' ');
+ ia32_emit_binop(env, node);
+ } else if (is_ia32_PsiCondSet(node)) {
+ be_emit_cstring(env, "\tcmp $0, ");
+ ia32_emit_source_register(env, node, 0);
+ } else {
assert(0 && "unsupported Set");
}
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* calculate Psi condition */" );
- IA32_DO_EMIT(irn);
+ be_emit_finish_line_gas(env, node);
+
+ /* use mov to clear target because it doesn't affect the eflags */
+ be_emit_cstring(env, "\tmovl $0, %");
+ be_emit_string(env, arch_register_get_name(out));
+ be_emit_finish_line_gas(env, node);
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "set%s %%%s", cmp_suffix, reg8bit);
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* set 1 iff true, 0 otherweise */" );
- IA32_DO_EMIT(irn);
+ be_emit_cstring(env, "\tset");
+ ia32_emit_cmp_suffix(env, pnc);
+ be_emit_cstring(env, " %");
+ be_emit_string(env, reg8bit);
+ be_emit_finish_line_gas(env, node);
}
-static void emit_ia32_CmpSet(ir_node *irn, ia32_emit_env_t *env) {
- Set_emitter(irn, env);
+static
+void emit_ia32_CmpSet(ia32_emit_env_t *env, const ir_node *node) {
+ Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
}
-static void emit_ia32_PsiCondSet(ir_node *irn, ia32_emit_env_t *env) {
- Set_emitter(irn, env);
+static
+void emit_ia32_PsiCondSet(ia32_emit_env_t *env, const ir_node *node) {
+ Set_emitter(env, node, get_irn_mode(get_irn_n(node, 0)));
}
-static void emit_ia32_xCmpSet(ir_node *irn, ia32_emit_env_t *env) {
- Set_emitter(irn, env);
+static
+void emit_ia32_xCmpSet(ia32_emit_env_t *env, const ir_node *node) {
+ Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
}
-static void emit_ia32_xCmp(ir_node *irn, ia32_emit_env_t *env) {
- FILE *F = env->out;
- const lc_arg_env_t *arg_env = ia32_get_arg_env();
- int sse_pnc = -1;
- char cmd_buf[SNPRINTF_BUF_LEN];
- char cmnt_buf[SNPRINTF_BUF_LEN];
+static
+void emit_ia32_xCmp(ia32_emit_env_t *env, const ir_node *node) {
+ int sse_pnc = -1;
+ long pnc = get_ia32_pncode(node);
+ long unord = pnc & pn_Cmp_Uo;
- switch (get_ia32_pncode(irn)) {
+ assert( (pnc & ia32_pn_Cmp_Unsigned) == 0);
+
+ switch (pnc) {
case pn_Cmp_Leg: /* odered */
sse_pnc = 7;
break;
case pn_Cmp_Uo: /* unordered */
sse_pnc = 3;
break;
- case pn_Cmp_Ue: /* == */
+ case pn_Cmp_Ue:
+ case pn_Cmp_Eq: /* == */
sse_pnc = 0;
break;
- case pn_Cmp_Ul: /* < */
+ case pn_Cmp_Ul:
+ case pn_Cmp_Lt: /* < */
sse_pnc = 1;
break;
- case pn_Cmp_Ule: /* <= */
+ case pn_Cmp_Ule:
+ case pn_Cmp_Le: /* <= */
sse_pnc = 2;
break;
- case pn_Cmp_Ug: /* > */
+ case pn_Cmp_Ug:
+ case pn_Cmp_Gt: /* > */
sse_pnc = 6;
break;
- case pn_Cmp_Uge: /* >= */
+ case pn_Cmp_Uge:
+ case pn_Cmp_Ge: /* >= */
sse_pnc = 5;
break;
- case pn_Cmp_Ne: /* != */
+ case pn_Cmp_Ne:
+ case pn_Cmp_Lg: /* != */
sse_pnc = 4;
break;
}
- assert(sse_pnc >= 0 && "unsupported floating point compare");
+ assert(sse_pnc >= 0 && "unsupported compare");
+
+ if (unord && sse_pnc != 3) {
+ /*
+ We need a separate compare against unordered.
+ Quick and Dirty solution:
+ - get some memory on stack
+ - compare
+ - store result
+ - compare
+ - and result and stored result
+ - cleanup stack
+ */
+ be_emit_cstring(env, "\tsubl $8, %esp");
+ be_emit_finish_line_gas(env, node);
+
+ be_emit_cstring(env, "\tcmpsd $3, ");
+ ia32_emit_binop(env, node);
+ be_emit_finish_line_gas(env, node);
+
+ be_emit_cstring(env, "\tmovsd ");
+ ia32_emit_dest_register(env, node, 0);
+ be_emit_cstring(env, ", (%esp)");
+ be_emit_finish_line_gas(env, node);
+ }
+
+ be_emit_cstring(env, "\tcmpsd ");
+ be_emit_irprintf(env->emit, "%d, ", sse_pnc);
+ ia32_emit_binop(env, node);
+ be_emit_finish_line_gas(env, node);
+
+ if (unord && sse_pnc != 3) {
+ be_emit_cstring(env, "\tandpd (%esp), ");
+ ia32_emit_dest_register(env, node, 0);
+ be_emit_finish_line_gas(env, node);
- lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmps%M %s, %d", irn, ia32_emit_binop(irn, env), sse_pnc);
- lc_esnprintf(arg_env, cmnt_buf, SNPRINTF_BUF_LEN, "/* SSE compare with result in %1D */", irn);
- IA32_DO_EMIT(irn);
+ be_emit_cstring(env, "\taddl $8, %esp");
+ be_emit_finish_line_gas(env, node);
+ }
}
/*********************************************************
/**
* Compare two variables of type branch_t. Used to sort all switch cases
*/
-static int ia32_cmp_branch_t(const void *a, const void *b) {
+static
+int ia32_cmp_branch_t(const void *a, const void *b) {
branch_t *b1 = (branch_t *)a;
branch_t *b2 = (branch_t *)b;
* possible otherwise a cmp-jmp cascade). Port from
* cggg ia32 backend
*/
-static void emit_ia32_SwitchJmp(const ir_node *irn, ia32_emit_env_t *emit_env) {
+static
+void emit_ia32_SwitchJmp(ia32_emit_env_t *env, const ir_node *node) {
unsigned long interval;
- char buf[SNPRINTF_BUF_LEN];
- int last_value, i, pn;
+ int last_value, i;
+ long pnc;
jmp_tbl_t tbl;
ir_node *proj;
const ir_edge_t *edge;
- const lc_arg_env_t *env = ia32_get_arg_env();
- FILE *F = emit_env->out;
- char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
/* fill the table structure */
tbl.label = xmalloc(SNPRINTF_BUF_LEN);
- tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, "JMPTBL_");
+ tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_");
tbl.defProj = NULL;
- tbl.num_branches = get_irn_n_edges(irn);
+ tbl.num_branches = get_irn_n_edges(node);
tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
tbl.min_value = INT_MAX;
tbl.max_value = INT_MIN;
i = 0;
/* go over all proj's and collect them */
- foreach_out_edge(irn, edge) {
+ foreach_out_edge(node, edge) {
proj = get_edge_src_irn(edge);
assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
- pn = get_Proj_proj(proj);
+ pnc = get_Proj_proj(proj);
/* create branch entry */
tbl.branches[i].target = proj;
- tbl.branches[i].value = pn;
+ tbl.branches[i].value = pnc;
- tbl.min_value = pn < tbl.min_value ? pn : tbl.min_value;
- tbl.max_value = pn > tbl.max_value ? pn : tbl.max_value;
+ tbl.min_value = pnc < tbl.min_value ? pnc : tbl.min_value;
+ tbl.max_value = pnc > tbl.max_value ? pnc : tbl.max_value;
/* check for default proj */
- if (pn == get_ia32_pncode(irn)) {
+ if (pnc == get_ia32_pncode(node)) {
assert(tbl.defProj == NULL && "found two defProjs at SwitchJmp");
tbl.defProj = proj;
}
interval = tbl.max_value - tbl.min_value;
/* emit the table */
- lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %1S, %u", irn, interval);
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* compare for switch */");
- IA32_DO_EMIT(irn);
+ be_emit_cstring(env, "\tcmpl $");
+ be_emit_irprintf(env->emit, "%u, ", interval);
+ ia32_emit_source_register(env, node, 0);
+ be_emit_finish_line_gas(env, node);
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "ja %s", get_cfop_target(tbl.defProj, buf));
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default jump if out of range */");
- IA32_DO_EMIT(irn);
+ be_emit_cstring(env, "\tja ");
+ ia32_emit_cfop_target(env, tbl.defProj);
+ be_emit_finish_line_gas(env, node);
if (tbl.num_branches > 1) {
/* create table */
+ be_emit_cstring(env, "\tjmp *");
+ be_emit_string(env, tbl.label);
+ be_emit_cstring(env, "(,");
+ ia32_emit_source_register(env, node, 0);
+ be_emit_cstring(env, ",4)");
+ be_emit_finish_line_gas(env, node);
- lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "jmp %s[%1S*4]", tbl.label, irn);
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* get jump table entry as target */");
- IA32_DO_EMIT(irn);
-
- ia32_switch_section(F, SECTION_RODATA);
- fprintf(F, "\t.align 4\n");
+ be_gas_emit_switch_section(env->emit, GAS_SECTION_RODATA);
+ be_emit_cstring(env, "\t.align 4\n");
+ be_emit_write_line(env);
- fprintf(F, "%s:\n", tbl.label);
+ be_emit_string(env, tbl.label);
+ be_emit_cstring(env, ":\n");
+ be_emit_write_line(env);
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[0].target, buf));
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", tbl.branches[0].value);
- IA32_DO_EMIT(irn);
+ be_emit_cstring(env, ".long ");
+ ia32_emit_cfop_target(env, tbl.branches[0].target);
+ be_emit_finish_line_gas(env, NULL);
last_value = tbl.branches[0].value;
for (i = 1; i < tbl.num_branches; ++i) {
while (++last_value < tbl.branches[i].value) {
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.defProj, buf));
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default case */");
- IA32_DO_EMIT(irn);
+ be_emit_cstring(env, ".long ");
+ ia32_emit_cfop_target(env, tbl.defProj);
+ be_emit_finish_line_gas(env, NULL);
}
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[i].target, buf));
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", last_value);
- IA32_DO_EMIT(irn);
+ be_emit_cstring(env, ".long ");
+ ia32_emit_cfop_target(env, tbl.branches[i].target);
+ be_emit_finish_line_gas(env, NULL);
}
- ia32_switch_section(F, SECTION_TEXT);
- }
- else {
+ be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
+ } else {
/* one jump is enough */
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(tbl.branches[0].target, buf));
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* only one case given */");
- IA32_DO_EMIT(irn);
+ be_emit_cstring(env, "\tjmp ");
+ ia32_emit_cfop_target(env, tbl.branches[0].target);
+ be_emit_finish_line_gas(env, node);
}
if (tbl.label)
/**
* Emits code for a unconditional jump.
*/
-static void emit_Jmp(const ir_node *irn, ia32_emit_env_t *env) {
- ir_node *block, *next_bl;
- FILE *F = env->out;
- char buf[SNPRINTF_BUF_LEN], cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
+static
+void emit_Jmp(ia32_emit_env_t *env, const ir_node *node) {
+ ir_node *block, *next_block;
/* for now, the code works for scheduled and non-schedules blocks */
- block = get_nodes_block(irn);
+ block = get_nodes_block(node);
/* we have a block schedule */
- next_bl = next_blk_sched(block);
- if (get_cfop_target_block(irn) != next_bl) {
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(irn, buf));
- lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%+F) */", irn, get_cfop_target_block(irn));
- }
- else {
- cmd_buf[0] = '\0';
- lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrough %s */", get_cfop_target(irn, buf));
- }
- IA32_DO_EMIT(irn);
-}
-
-/****************************
- * _
- * (_)
- * _ __ _ __ ___ _ ___
- * | '_ \| '__/ _ \| |/ __|
- * | |_) | | | (_) | |\__ \
- * | .__/|_| \___/| ||___/
- * | | _/ |
- * |_| |__/
- ****************************/
-
-/**
- * Emits code for a proj -> node
- */
-static void emit_Proj(const ir_node *irn, ia32_emit_env_t *env) {
- ir_node *pred = get_Proj_pred(irn);
-
- if (get_irn_op(pred) == op_Start) {
- switch(get_Proj_proj(irn)) {
- case pn_Start_X_initial_exec:
- emit_Jmp(irn, env);
- break;
- default:
- break;
- }
+ next_block = next_blk_sched(block);
+ if (get_cfop_target_block(node) != next_block) {
+ be_emit_cstring(env, "\tjmp ");
+ ia32_emit_cfop_target(env, node);
+ } else {
+ be_emit_cstring(env, "\t/* fallthrough to ");
+ ia32_emit_cfop_target(env, node);
+ be_emit_cstring(env, " */");
}
+ be_emit_finish_line_gas(env, node);
}
/**********************************
/**
* Emit movsb/w instructions to make mov count divideable by 4
*/
-static void emit_CopyB_prolog(FILE *F, int rem, int size) {
- char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
-
- fprintf(F, "\t/* memcopy %d bytes */\n", size);
-
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cld");
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* copy direction forward */");
+static
+void emit_CopyB_prolog(ia32_emit_env_t *env, int rem) {
+ be_emit_cstring(env, "\tcld");
+ be_emit_finish_line_gas(env, NULL);
switch(rem) {
- case 1:
- IA32_DO_EMIT(NULL);
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 1 */");
- break;
- case 2:
- IA32_DO_EMIT(NULL);
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 2 */");
- break;
- case 3:
- IA32_DO_EMIT(NULL);
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsb");
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
- IA32_DO_EMIT(NULL);
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsw");
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy remainder 3 */");
- break;
+ case 1:
+ be_emit_cstring(env, "\tmovsb");
+ be_emit_finish_line_gas(env, NULL);
+ break;
+ case 2:
+ be_emit_cstring(env, "\tmovsw");
+ be_emit_finish_line_gas(env, NULL);
+ break;
+ case 3:
+ be_emit_cstring(env, "\tmovsb");
+ be_emit_finish_line_gas(env, NULL);
+ be_emit_cstring(env, "\tmovsw");
+ be_emit_finish_line_gas(env, NULL);
+ break;
}
-
- IA32_DO_EMIT(NULL);
}
/**
* Emit rep movsd instruction for memcopy.
*/
-static void emit_ia32_CopyB(const ir_node *irn, ia32_emit_env_t *emit_env) {
- FILE *F = emit_env->out;
- tarval *tv = get_ia32_Immop_tarval(irn);
- int rem = get_tarval_long(tv);
- ir_node *size_node = get_irn_n(irn, 2);
- int size;
- char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
+static
+void emit_ia32_CopyB(ia32_emit_env_t *env, const ir_node *node) {
+ tarval *tv = get_ia32_Immop_tarval(node);
+ int rem = get_tarval_long(tv);
- /* beware: size_node could be a be_Copy to fulfill constraints for ecx */
- size_node = be_is_Copy(size_node) ? be_get_Copy_op(size_node) : size_node;
- size = get_tarval_long(get_ia32_Immop_tarval(size_node));
+ emit_CopyB_prolog(env, rem);
- emit_CopyB_prolog(F, rem, size);
-
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "rep movsd");
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy */");
- IA32_DO_EMIT(irn);
+ be_emit_cstring(env, "\trep movsd");
+ be_emit_finish_line_gas(env, node);
}
/**
* Emits unrolled memcopy.
*/
-static void emit_ia32_CopyB_i(const ir_node *irn, ia32_emit_env_t *emit_env) {
- tarval *tv = get_ia32_Immop_tarval(irn);
+static
+void emit_ia32_CopyB_i(ia32_emit_env_t *env, const ir_node *node) {
+ tarval *tv = get_ia32_Immop_tarval(node);
int size = get_tarval_long(tv);
- FILE *F = emit_env->out;
- char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
- emit_CopyB_prolog(F, size & 0x3, size);
+ emit_CopyB_prolog(env, size & 0x3);
size >>= 2;
while (size--) {
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "movsd");
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* memcopy unrolled */");
- IA32_DO_EMIT(irn);
+ be_emit_cstring(env, "\tmovsd");
+ be_emit_finish_line_gas(env, NULL);
}
}
/**
* Emit code for conversions (I, FP), (FP, I) and (FP, FP).
*/
-static void emit_ia32_Conv_with_FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
- FILE *F = emit_env->out;
- const lc_arg_env_t *env = ia32_get_arg_env();
- ir_mode *src_mode = get_ia32_src_mode(irn);
- ir_mode *tgt_mode = get_ia32_tgt_mode(irn);
- char *from, *to, buf[64];
- char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
-
- from = mode_is_float(src_mode) ? (get_mode_size_bits(src_mode) == 32 ? "ss" : "sd") : "si";
- to = mode_is_float(tgt_mode) ? (get_mode_size_bits(tgt_mode) == 32 ? "ss" : "sd") : "si";
-
- switch(get_ia32_op_type(irn)) {
+static
+void emit_ia32_Conv_with_FP(ia32_emit_env_t *env, const ir_node *node) {
+ ir_mode *ls_mode = get_ia32_ls_mode(node);
+ int ls_bits = get_mode_size_bits(ls_mode);
+
+ be_emit_cstring(env, "\tcvt");
+
+ if(is_ia32_Conv_I2FP(node)) {
+ if(ls_bits == 32) {
+ be_emit_cstring(env, "si2ss");
+ } else {
+ be_emit_cstring(env, "si2sd");
+ }
+ } else if(is_ia32_Conv_FP2I(node)) {
+ if(ls_bits == 32) {
+ be_emit_cstring(env, "ss2si");
+ } else {
+ be_emit_cstring(env, "sd2si");
+ }
+ } else {
+ assert(is_ia32_Conv_FP2FP(node));
+ if(ls_bits == 32) {
+ be_emit_cstring(env, "sd2ss");
+ } else {
+ be_emit_cstring(env, "ss2sd");
+ }
+ }
+ be_emit_char(env, ' ');
+
+ switch(get_ia32_op_type(node)) {
case ia32_Normal:
- lc_esnprintf(env, buf, sizeof(buf), "%1D, %3S", irn, irn);
+ ia32_emit_source_register(env, node, 2);
+ be_emit_cstring(env, ", ");
+ ia32_emit_dest_register(env, node, 0);
break;
case ia32_AddrModeS:
- lc_esnprintf(env, buf, sizeof(buf), "%1D, %s", irn, ia32_emit_am(irn, emit_env));
+ ia32_emit_dest_register(env, node, 0);
+ be_emit_cstring(env, ", ");
+ ia32_emit_am(env, node);
break;
default:
assert(0 && "unsupported op type for Conv");
}
-
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cvt%s2%s %s", from, to, buf);
- lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%+F, %+F) */", irn, src_mode, tgt_mode);
- IA32_DO_EMIT(irn);
+ be_emit_finish_line_gas(env, node);
}
-static void emit_ia32_Conv_I2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
- emit_ia32_Conv_with_FP(irn, emit_env);
+static
+void emit_ia32_Conv_I2FP(ia32_emit_env_t *env, const ir_node *node) {
+ emit_ia32_Conv_with_FP(env, node);
}
-static void emit_ia32_Conv_FP2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
- emit_ia32_Conv_with_FP(irn, emit_env);
+static
+void emit_ia32_Conv_FP2I(ia32_emit_env_t *env, const ir_node *node) {
+ emit_ia32_Conv_with_FP(env, node);
}
-static void emit_ia32_Conv_FP2FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
- emit_ia32_Conv_with_FP(irn, emit_env);
+static
+void emit_ia32_Conv_FP2FP(ia32_emit_env_t *env, const ir_node *node) {
+ emit_ia32_Conv_with_FP(env, node);
}
/**
* Emits code for an Int conversion.
*/
-static void emit_ia32_Conv_I2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
- FILE *F = emit_env->out;
- const lc_arg_env_t *env = ia32_get_arg_env();
- char *move_cmd = "movzx";
- char *conv_cmd = NULL;
- ir_mode *src_mode = get_ia32_src_mode(irn);
- ir_mode *tgt_mode = get_ia32_tgt_mode(irn);
- int n, m;
- char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
+static
+void emit_ia32_Conv_I2I(ia32_emit_env_t *env, const ir_node *node) {
+ const char *sign_suffix;
+ ir_mode *smaller_mode = get_ia32_ls_mode(node);
+ int smaller_bits = get_mode_size_bits(smaller_mode);
+ int signed_mode;
const arch_register_t *in_reg, *out_reg;
- n = get_mode_size_bits(src_mode);
- m = get_mode_size_bits(tgt_mode);
-
- if (mode_is_signed(n < m ? src_mode : tgt_mode)) {
- move_cmd = "movsx";
- if (n == 8 || m == 8)
- conv_cmd = "cbw";
- else if (n == 16 || m == 16)
- conv_cmd = "cwde";
- else
- assert(0 && "unsupported Conv_I2I");
+ assert(!mode_is_float(smaller_mode));
+ assert(smaller_bits == 8 || smaller_bits == 16 || smaller_bits == 32);
+
+ signed_mode = mode_is_signed(smaller_mode);
+ if(smaller_bits == 32) {
+ // this should not happen as it's no convert
+ assert(0);
+ sign_suffix = "";
+ } else {
+ sign_suffix = signed_mode ? "s" : "z";
}
- switch(get_ia32_op_type(irn)) {
+ switch(get_ia32_op_type(node)) {
case ia32_Normal:
- in_reg = get_in_reg(irn, 2);
- out_reg = get_out_reg(irn, 0);
+ in_reg = get_in_reg(env, node, 2);
+ out_reg = get_out_reg(env, node, 0);
if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
REGS_ARE_EQUAL(out_reg, in_reg) &&
- mode_is_signed(n < m ? src_mode : tgt_mode))
+ signed_mode)
{
/* argument and result are both in EAX and */
/* signedness is ok: -> use converts */
- lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s", conv_cmd);
- }
- else if (REGS_ARE_EQUAL(out_reg, in_reg) &&
- ! mode_is_signed(n < m ? src_mode : tgt_mode))
- {
+ if (smaller_bits == 8) {
+ be_emit_cstring(env, "\tcbtw");
+ } else if (smaller_bits == 16) {
+ be_emit_cstring(env, "\tcwtl");
+ } else {
+ assert(0);
+ }
+ } else if (REGS_ARE_EQUAL(out_reg, in_reg) && !signed_mode) {
/* argument and result are in the same register */
/* and signedness is ok: -> use and with mask */
- int mask = (1 << (n < m ? n : m)) - 1;
- lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "and %1D, 0x%x", irn, mask);
+ int mask = (1 << smaller_bits) - 1;
+ be_emit_cstring(env, "\tandl $0x");
+ be_emit_irprintf(env->emit, "%x, ", mask);
+ ia32_emit_dest_register(env, node, 0);
+ } else {
+ const char *sreg = ia32_get_reg_name_for_mode(env, smaller_mode, in_reg);
+
+ be_emit_cstring(env, "\tmov");
+ be_emit_string(env, sign_suffix);
+ ia32_emit_mode_suffix(env, smaller_mode);
+ be_emit_cstring(env, "l %");
+ be_emit_string(env, sreg);
+ be_emit_cstring(env, ", ");
+ ia32_emit_dest_register(env, node, 0);
}
- else {
- /* use move w/o sign extension */
- lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %%%s",
- move_cmd, irn, ia32_get_reg_name_for_mode(emit_env, n < m ? src_mode : tgt_mode, in_reg));
- }
-
break;
- case ia32_AddrModeS:
- lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "%s %1D, %s",
- move_cmd, irn, ia32_emit_am(irn, emit_env));
+ case ia32_AddrModeS: {
+ be_emit_cstring(env, "\tmov");
+ be_emit_string(env, sign_suffix);
+ ia32_emit_mode_suffix(env, smaller_mode);
+ be_emit_cstring(env, "l %");
+ ia32_emit_am(env, node);
+ be_emit_cstring(env, ", ");
+ ia32_emit_dest_register(env, node, 0);
break;
+ }
default:
assert(0 && "unsupported op type for Conv");
}
-
- lc_esnprintf(env, cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%d Bit mode_%F -> %d Bit mode_%F) */",
- irn, n, src_mode, m, tgt_mode);
-
- IA32_DO_EMIT(irn);
+ be_emit_finish_line_gas(env, node);
}
/**
* Emits code for an 8Bit Int conversion.
*/
-void emit_ia32_Conv_I2I8Bit(const ir_node *irn, ia32_emit_env_t *emit_env) {
- emit_ia32_Conv_I2I(irn, emit_env);
+void emit_ia32_Conv_I2I8Bit(ia32_emit_env_t *env, const ir_node *node) {
+ emit_ia32_Conv_I2I(env, node);
}
/**
* Emits a backend call
*/
-static void emit_be_Call(const ir_node *irn, ia32_emit_env_t *emit_env) {
- FILE *F = emit_env->out;
- entity *ent = be_Call_get_entity(irn);
- char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
+static
+void emit_be_Call(ia32_emit_env_t *env, const ir_node *node) {
+ ir_entity *ent = be_Call_get_entity(node);
+ be_emit_cstring(env, "\tcall ");
if (ent) {
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "call %s", get_entity_ld_name(ent));
- }
- else {
- lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "%1D", get_irn_n(irn, be_pos_Call_ptr));
+ mark_entity_visited(ent);
+ be_emit_string(env, get_entity_ld_name(ent));
+ } else {
+ be_emit_char(env, '*');
+ ia32_emit_dest_register(env, get_irn_n(node, be_pos_Call_ptr), 0);
}
-
- lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (be_Call) */", irn);
-
- IA32_DO_EMIT(irn);
+ be_emit_finish_line_gas(env, node);
}
/**
* Emits code to increase stack pointer.
*/
-static void emit_be_IncSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
- FILE *F = emit_env->out;
- unsigned offs = be_get_IncSP_offset(irn);
- be_stack_dir_t dir = be_get_IncSP_direction(irn);
- char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
-
- if (offs) {
- if (dir == be_stack_dir_expand)
- lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "sub %1S, %u", irn, offs);
- else
- lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "add %1S, %u", irn, offs);
- lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (IncSP) */", irn);
- }
- else {
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
- lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* omitted %+F (IncSP) with 0 */", irn);
- }
+static
+void emit_be_IncSP(ia32_emit_env_t *env, const ir_node *node) {
+ int offs = be_get_IncSP_offset(node);
+
+ if (offs == 0)
+ return;
- IA32_DO_EMIT(irn);
+ if (offs > 0) {
+ be_emit_cstring(env, "\tsubl $");
+ be_emit_irprintf(env->emit, "%u, ", offs);
+ ia32_emit_source_register(env, node, 0);
+ } else {
+ be_emit_cstring(env, "\taddl $");
+ be_emit_irprintf(env->emit, "%u, ", -offs);
+ ia32_emit_source_register(env, node, 0);
+ }
+ be_emit_finish_line_gas(env, node);
}
/**
* Emits code to set stack pointer.
*/
-static void emit_be_SetSP(const ir_node *irn, ia32_emit_env_t *emit_env) {
- FILE *F = emit_env->out;
- char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
-
- lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %3S", irn, irn);
- lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (restore SP) */", irn);
- IA32_DO_EMIT(irn);
+static
+void emit_be_SetSP(ia32_emit_env_t *env, const ir_node *node) {
+ be_emit_cstring(env, "\tmovl ");
+ ia32_emit_source_register(env, node, 2);
+ be_emit_cstring(env, ", ");
+ ia32_emit_dest_register(env, node, 0);
+ be_emit_finish_line_gas(env, node);
}
/**
* Emits code for Copy/CopyKeep.
*/
-static void Copy_emitter(const ir_node *irn, ir_node *op, ia32_emit_env_t *emit_env) {
- FILE *F = emit_env->out;
- const arch_env_t *aenv = emit_env->arch_env;
- char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
+static
+void Copy_emitter(ia32_emit_env_t *env, const ir_node *node, const ir_node *op)
+{
+ const arch_env_t *aenv = env->arch_env;
+ ir_mode *mode;
- if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, irn), arch_get_irn_register(aenv, op)) ||
- be_is_unknown_reg(arch_get_irn_register(aenv, op)))
+ if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, node), arch_get_irn_register(aenv, op)) ||
+ arch_register_type_is(arch_get_irn_register(aenv, op), virtual))
return;
- if (mode_is_float(get_irn_mode(irn)))
- lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "movs%M %1D, %1S", irn, irn, irn);
- else
- lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %1D, %1S", irn, irn);
- lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
- IA32_DO_EMIT(irn);
+ mode = get_irn_mode(node);
+ if (mode == mode_LLu) {
+ be_emit_cstring(env, "\tmovsd ");
+ ia32_emit_source_register(env, node, 0);
+ be_emit_cstring(env, ", ");
+ ia32_emit_dest_register(env, node, 0);
+ } else {
+ be_emit_cstring(env, "\tmovl ");
+ ia32_emit_source_register(env, node, 0);
+ be_emit_cstring(env, ", ");
+ ia32_emit_dest_register(env, node, 0);
+ }
+ be_emit_finish_line_gas(env, node);
}
-static void emit_be_Copy(const ir_node *irn, ia32_emit_env_t *emit_env) {
- Copy_emitter(irn, be_get_Copy_op(irn), emit_env);
+static
+void emit_be_Copy(ia32_emit_env_t *env, const ir_node *node) {
+ Copy_emitter(env, node, be_get_Copy_op(node));
}
-static void emit_be_CopyKeep(const ir_node *irn, ia32_emit_env_t *emit_env) {
- Copy_emitter(irn, be_get_CopyKeep_op(irn), emit_env);
+static
+void emit_be_CopyKeep(ia32_emit_env_t *env, const ir_node *node) {
+ Copy_emitter(env, node, be_get_CopyKeep_op(node));
}
/**
* Emits code for exchange.
*/
-static void emit_be_Perm(const ir_node *irn, ia32_emit_env_t *emit_env) {
- FILE *F = emit_env->out;
- char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
-
- lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "xchg %1S, %2S", irn, irn);
- lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F(%1A, %2A) */", irn, irn, irn);
- IA32_DO_EMIT(irn);
+static
+void emit_be_Perm(ia32_emit_env_t *env, const ir_node *node) {
+ const arch_register_t *in1, *in2;
+ const arch_register_class_t *cls1, *cls2;
+
+ in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 0));
+ in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 1));
+
+ cls1 = arch_register_get_class(in1);
+ cls2 = arch_register_get_class(in2);
+
+ assert(cls1 == cls2 && "Register class mismatch at Perm");
+
+ if (cls1 == &ia32_reg_classes[CLASS_ia32_gp]) {
+ be_emit_cstring(env, "\txchg ");
+ ia32_emit_source_register(env, node, 1);
+ be_emit_cstring(env, ", ");
+ ia32_emit_source_register(env, node, 0);
+ be_emit_finish_line_gas(env, node);
+ } else if (cls1 == &ia32_reg_classes[CLASS_ia32_xmm]) {
+ be_emit_cstring(env, "\txorpd ");
+ ia32_emit_source_register(env, node, 1);
+ be_emit_cstring(env, ", ");
+ ia32_emit_source_register(env, node, 0);
+ be_emit_finish_line_gas(env, NULL);
+
+ be_emit_cstring(env, "\txorpd ");
+ ia32_emit_source_register(env, node, 0);
+ be_emit_cstring(env, ", ");
+ ia32_emit_source_register(env, node, 1);
+ be_emit_finish_line_gas(env, NULL);
+
+ be_emit_cstring(env, "\txorpd ");
+ ia32_emit_source_register(env, node, 1);
+ be_emit_cstring(env, ", ");
+ ia32_emit_source_register(env, node, 0);
+ be_emit_finish_line_gas(env, node);
+ } else if (cls1 == &ia32_reg_classes[CLASS_ia32_vfp]) {
+ /* is a NOP */
+ } else if (cls1 == &ia32_reg_classes[CLASS_ia32_st]) {
+ /* is a NOP */
+ }
}
/**
* Emits code for Constant loading.
*/
-static void emit_ia32_Const(const ir_node *n, ia32_emit_env_t *env) {
- FILE *F = env->out;
- char cmd_buf[256], cmnt_buf[256];
- const lc_arg_env_t *arg_env = ia32_get_arg_env();
-
- if (get_ia32_Immop_tarval(n) == get_tarval_null(get_irn_mode(n))) {
- const char *instr = "xor";
- if (env->isa->opt_arch == arch_pentium_4) {
- /* P4 prefers sub r, r, others xor r, r */
- instr = "sub";
- }
- lc_esnprintf(arg_env, cmd_buf, 256, "%s %1D, %1D ", instr, n, n);
- lc_esnprintf(arg_env, cmnt_buf, 256, "/* optimized mov 0 to register */");
- }
- else {
- if (get_ia32_op_type(n) == ia32_SymConst) {
- lc_esnprintf(arg_env, cmd_buf, 256, "mov %1D, OFFSET FLAT:%C ", n, n);
- lc_esnprintf(arg_env, cmnt_buf, 256, "/* Move address of SymConst into register */");
- }
- else {
- lc_esnprintf(arg_env, cmd_buf, 256, "mov %1D, %C ", n, n);
- lc_esnprintf(arg_env, cmnt_buf, 256, "/* Mov Const into register */");
+static
+void emit_ia32_Const(ia32_emit_env_t *env, const ir_node *node) {
+ ia32_immop_type_t imm_tp = get_ia32_immop_type(node);
+
+ if (imm_tp == ia32_ImmSymConst) {
+ be_emit_cstring(env, "\tmovl ");
+ ia32_emit_immediate(env, node);
+ be_emit_cstring(env, ", ");
+ ia32_emit_dest_register(env, node, 0);
+ } else {
+ tarval *tv = get_ia32_Immop_tarval(node);
+ assert(get_irn_mode(node) == mode_Iu);
+ /* beware: in some rare cases mode is mode_b which has no tarval_null() */
+ if (tarval_is_null(tv)) {
+ if (env->isa->opt_arch == arch_pentium_4) {
+ /* P4 prefers sub r, r, others xor r, r */
+ be_emit_cstring(env, "\tsubl ");
+ } else {
+ be_emit_cstring(env, "\txorl ");
+ }
+ ia32_emit_dest_register(env, node, 0);
+ be_emit_cstring(env, ", ");
+ ia32_emit_dest_register(env, node, 0);
+ } else {
+ be_emit_cstring(env, "\tmovl ");
+ ia32_emit_immediate(env, node);
+ be_emit_cstring(env, ", ");
+ ia32_emit_dest_register(env, node, 0);
}
- }
- lc_efprintf(arg_env, F, "\t%-35s %-60s /* %+F (%+G) */\n", cmd_buf, cmnt_buf, n, n);
+ }
+ be_emit_finish_line_gas(env, node);
}
-static void emit_be_Return(const ir_node *n, ia32_emit_env_t *env) {
- FILE *F = env->out;
- const lc_arg_env_t *arg_env = ia32_get_arg_env();
+/**
+ * Emits code to load the TLS base
+ */
+static
+void emit_ia32_LdTls(ia32_emit_env_t *env, const ir_node *node) {
+ be_emit_cstring(env, "\tmovl %gs:0, ");
+ ia32_emit_dest_register(env, node, 0);
+ be_emit_finish_line_gas(env, node);
+}
- lc_efprintf(arg_env, F, "\t%-35s %-60s /* %+F (%+G) */\n", "ret", "/* be_Return */", n, n);
+static
+void emit_be_Return(ia32_emit_env_t *env, const ir_node *node) {
+ be_emit_cstring(env, "\tret");
+ be_emit_finish_line_gas(env, node);
}
+static
+void emit_Nothing(ia32_emit_env_t *env, const ir_node *node) {
+}
/***********************************************************************************
* Enters the emitter functions for handled nodes into the generic
* pointer of an opcode.
*/
-static void ia32_register_emitters(void) {
+static
+void ia32_register_emitters(void) {
#define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
#define IA32_EMIT(a) IA32_EMIT2(a,a)
#define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
+#define IGN(a) op_##a->ops.generic = (op_func)emit_Nothing
#define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
+#define BE_IGN(a) op_be_##a->ops.generic = (op_func)emit_Nothing
/* first clear the generic function pointer for all ops */
clear_irp_opcodes_generic_func();
IA32_EMIT(Conv_I2I);
IA32_EMIT(Conv_I2I8Bit);
IA32_EMIT(Const);
+ IA32_EMIT(LdTls);
IA32_EMIT(xCmp);
IA32_EMIT(xCmpSet);
IA32_EMIT(xCmpCMov);
BE_EMIT(Perm);
BE_EMIT(Return);
+ BE_IGN(RegParams);
+ BE_IGN(Barrier);
+ BE_IGN(Keep);
+
/* firm emitter */
EMIT(Jmp);
- EMIT(Proj);
+ IGN(Proj);
+ IGN(Phi);
+ IGN(Start);
#undef BE_EMIT
#undef EMIT
+#undef IGN
#undef IA32_EMIT2
#undef IA32_EMIT
}
+static const char *last_name = NULL;
+static unsigned last_line = -1;
+static unsigned num = -1;
+
+/**
+ * Emit the debug support for node node.
+ */
+static
+void ia32_emit_dbg(ia32_emit_env_t *env, const ir_node *node) {
+ dbg_info *db = get_irn_dbg_info(node);
+ unsigned lineno;
+ const char *fname = be_retrieve_dbg_info(db, &lineno);
+
+ if (! env->cg->birg->main_env->options->stabs_debug_support)
+ return;
+
+ if (fname) {
+ if (last_name != fname) {
+ last_line = -1;
+ be_dbg_include_begin(env->cg->birg->main_env->db_handle, fname);
+ last_name = fname;
+ }
+ if (last_line != lineno) {
+ char name[64];
+
+ snprintf(name, sizeof(name), ".LM%u", ++num);
+ last_line = lineno;
+ be_dbg_line(env->cg->birg->main_env->db_handle, lineno, name);
+ be_emit_string(env, name);
+ be_emit_cstring(env, ":\n");
+ be_emit_write_line(env);
+ }
+ }
+}
+
+typedef void (*emit_func_ptr) (ia32_emit_env_t *, const ir_node *);
+
/**
* Emits code for a node.
*/
-static void ia32_emit_node(const ir_node *irn, void *env) {
- ia32_emit_env_t *emit_env = env;
- FILE *F = emit_env->out;
- ir_op *op = get_irn_op(irn);
- DEBUG_ONLY(firm_dbg_module_t *mod = emit_env->mod;)
+static
+void ia32_emit_node(ia32_emit_env_t *env, const ir_node *node) {
+ ir_op *op = get_irn_op(node);
- DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
+ DBG((dbg, LEVEL_1, "emitting code for %+F\n", node));
if (op->ops.generic) {
- void (*emit)(const ir_node *, void *) = (void (*)(const ir_node *, void *))op->ops.generic;
- (*emit)(irn, env);
- }
- else {
- ir_fprintf(F, "\t%35s /* %+F (%+G) */\n", " ", irn, irn);
+ emit_func_ptr func = (emit_func_ptr) op->ops.generic;
+ ia32_emit_dbg(env, node);
+ (*func) (env, node);
+ } else {
+ emit_Nothing(env, node);
+ ir_fprintf(stderr, "Warning: No emit handler for node %+F (%+G)\n", node, node);
}
}
/**
* Emits gas alignment directives
*/
-static void ia32_emit_alignment(FILE *F, unsigned align, unsigned skip) {
- fprintf(F, "\t.p2align %u,,%u\n", align, skip);
+static
+void ia32_emit_alignment(ia32_emit_env_t *env, unsigned align, unsigned skip) {
+ be_emit_cstring(env, "\t.p2align ");
+ be_emit_irprintf(env->emit, "%u,,%u\n", align, skip);
+ be_emit_write_line(env);
}
/**
* Emits gas alignment directives for Functions depended on cpu architecture.
*/
-static void ia32_emit_align_func(FILE *F, cpu_support cpu) {
- unsigned align; unsigned maximum_skip;
-
- /* gcc doesn't emit alignment for p4 ?*/
- if (cpu == arch_pentium_4)
- return;
+static
+void ia32_emit_align_func(ia32_emit_env_t *env, cpu_support cpu) {
+ unsigned align;
+ unsigned maximum_skip;
switch (cpu) {
case arch_i386:
- align = 2; maximum_skip = 3;
+ align = 2;
break;
case arch_i486:
- align = 4; maximum_skip = 15;
+ align = 4;
break;
case arch_k6:
- align = 5; maximum_skip = 31;
+ align = 5;
break;
default:
- align = 4; maximum_skip = 15;
+ align = 4;
}
- ia32_emit_alignment(F, align, maximum_skip);
+ maximum_skip = (1 << align) - 1;
+ ia32_emit_alignment(env, align, maximum_skip);
}
/**
* Emits gas alignment directives for Labels depended on cpu architecture.
*/
-static void ia32_emit_align_label(FILE *F, cpu_support cpu) {
+static
+void ia32_emit_align_label(ia32_emit_env_t *env, cpu_support cpu) {
unsigned align; unsigned maximum_skip;
- /* gcc doesn't emit alignment for p4 ?*/
- if (cpu == arch_pentium_4)
- return;
-
switch (cpu) {
case arch_i386:
- align = 2; maximum_skip = 3;
+ align = 2;
break;
case arch_i486:
- align = 4; maximum_skip = 15;
+ align = 4;
break;
case arch_k6:
- align = 5; maximum_skip = 7;
+ align = 5;
break;
default:
- align = 4; maximum_skip = 7;
+ align = 4;
}
- ia32_emit_alignment(F, align, maximum_skip);
+ maximum_skip = (1 << align) - 1;
+ ia32_emit_alignment(env, align, maximum_skip);
+}
+
+static
+int is_first_loop_block(ia32_emit_env_t *env, ir_node *block, ir_node *prev_block) {
+ ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
+ double block_freq, prev_freq;
+ static const double DELTA = .0001;
+ cpu_support cpu = env->isa->opt_arch;
+
+ if(exec_freq == NULL)
+ return 0;
+ if(cpu == arch_i386 || cpu == arch_i486)
+ return 0;
+
+ block_freq = get_block_execfreq(exec_freq, block);
+ prev_freq = get_block_execfreq(exec_freq, prev_block);
+
+ if(block_freq < DELTA || prev_freq < DELTA)
+ return 0;
+
+ block_freq /= prev_freq;
+
+ switch (cpu) {
+ case arch_athlon:
+ case arch_athlon_64:
+ case arch_k6:
+ return block_freq > 3;
+ default:
+ break;
+ }
+
+ return block_freq > 2;
}
/**
* Walks over the nodes in a block connected by scheduling edges
* and emits code for each node.
*/
-static void ia32_gen_block(ir_node *block, void *env) {
- ia32_emit_env_t *emit_env = env;
- const ir_node *irn;
- int need_label = block != get_irg_start_block(get_irn_irg(block));
+static
+void ia32_gen_block(ia32_emit_env_t *env, ir_node *block, ir_node *last_block) {
+ ir_graph *irg = get_irn_irg(block);
+ ir_node *start_block = get_irg_start_block(irg);
+ int need_label = 1;
+ const ir_node *node;
+ int i;
- if (! is_Block(block))
- return;
+ assert(is_Block(block));
+
+ if (block == start_block)
+ need_label = 0;
+
+ if (need_label && get_irn_arity(block) == 1) {
+ ir_node *pred_block = get_Block_cfgpred_block(block, 0);
- if (need_label && (emit_env->cg->opt & IA32_OPT_EXTBB)) {
- /* if the extended block scheduler is used, only leader blocks need
- labels. */
- need_label = (block == get_extbb_leader(get_nodes_extbb(block)));
+ if (pred_block == last_block && get_irn_n_edges_kind(pred_block, EDGE_KIND_BLOCK) <= 2)
+ need_label = 0;
+ }
+
+ /* special case: if one of our cfg preds is a switch-jmp we need a label, */
+ /* otherwise there might be jump table entries jumping to */
+ /* non-existent (omitted) labels */
+ for (i = get_Block_n_cfgpreds(block) - 1; i >= 0; --i) {
+ ir_node *pred = get_Block_cfgpred(block, i);
+
+ if (is_Proj(pred)) {
+ assert(get_irn_mode(pred) == mode_X);
+ if (is_ia32_SwitchJmp(get_Proj_pred(pred))) {
+ need_label = 1;
+ break;
+ }
+ }
}
if (need_label) {
- ia32_emit_align_label(emit_env->out, emit_env->isa->opt_arch);
- fprintf(emit_env->out, BLOCK_PREFIX("%ld:\n"), get_irn_node_nr(block));
+ int i, arity;
+ int align = 1;
+ ir_exec_freq *exec_freq = env->cg->birg->exec_freq;
+
+ /* align the loop headers */
+ if (! is_first_loop_block(env, block, last_block)) {
+ /* align blocks where the previous block has no fallthrough */
+ arity = get_irn_arity(block);
+
+ for (i = 0; i < arity; ++i) {
+ ir_node *predblock = get_Block_cfgpred_block(block, i);
+
+ if (predblock == last_block) {
+ align = 0;
+ break;
+ }
+ }
+ }
+
+ if (align)
+ ia32_emit_align_label(env, env->isa->opt_arch);
+
+ be_emit_cstring(env, BLOCK_PREFIX);
+ be_emit_irprintf(env->emit, "%d:", get_irn_node_nr(block));
+ be_emit_pad_comment(env);
+ be_emit_cstring(env, " /* preds:");
+
+ /* emit list of pred blocks in comment */
+ arity = get_irn_arity(block);
+ for (i = 0; i < arity; ++i) {
+ ir_node *predblock = get_Block_cfgpred_block(block, i);
+ be_emit_irprintf(env->emit, " %d", get_irn_node_nr(predblock));
+ }
+
+ if (exec_freq != NULL) {
+ be_emit_irprintf(env->emit, " freq: %f", get_block_execfreq(exec_freq, block));
+ }
+ be_emit_cstring(env, " */\n");
+ be_emit_write_line(env);
}
- sched_foreach(block, irn) {
- ia32_emit_node(irn, env);
+ /* emit the contents of the block */
+ ia32_emit_dbg(env, block);
+ sched_foreach(block, node) {
+ ia32_emit_node(env, node);
}
}
/**
* Emits code for function start.
*/
-static void ia32_emit_func_prolog(FILE *F, ir_graph *irg, cpu_support cpu) {
- entity *irg_ent = get_irg_entity(irg);
+static
+void ia32_emit_func_prolog(ia32_emit_env_t *env, ir_graph *irg) {
+ ir_entity *irg_ent = get_irg_entity(irg);
const char *irg_name = get_entity_ld_name(irg_ent);
+ cpu_support cpu = env->isa->opt_arch;
+ const be_irg_t *birg = env->cg->birg;
- fprintf(F, "\n");
- ia32_switch_section(F, SECTION_TEXT);
- ia32_emit_align_func(F, cpu);
+ be_emit_write_line(env);
+ be_gas_emit_switch_section(env->emit, GAS_SECTION_TEXT);
+ be_dbg_method_begin(birg->main_env->db_handle, irg_ent, be_abi_get_stack_layout(birg->abi));
+ ia32_emit_align_func(env, cpu);
if (get_entity_visibility(irg_ent) == visibility_external_visible) {
- fprintf(F, ".globl %s\n", irg_name);
+ be_emit_cstring(env, ".global ");
+ be_emit_string(env, irg_name);
+ be_emit_char(env, '\n');
+ be_emit_write_line(env);
}
- ia32_dump_function_object(F, irg_name);
- fprintf(F, "%s:\n", irg_name);
+ ia32_emit_function_object(env, irg_name);
+ be_emit_string(env, irg_name);
+ be_emit_cstring(env, ":\n");
+ be_emit_write_line(env);
}
/**
* Emits code for function end
*/
-static void ia32_emit_func_epilog(FILE *F, ir_graph *irg) {
+static
+void ia32_emit_func_epilog(ia32_emit_env_t *env, ir_graph *irg) {
const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
+ const be_irg_t *birg = env->cg->birg;
- ia32_dump_function_size(F, irg_name);
- fprintf(F, "\n");
+ ia32_emit_function_size(env, irg_name);
+ be_dbg_method_end(birg->main_env->db_handle);
+ be_emit_char(env, '\n');
+ be_emit_write_line(env);
}
/**
* Block-walker:
* Sets labels for control flow nodes (jump target)
- * TODO: Jump optimization
*/
-static void ia32_gen_labels(ir_node *block, void *env) {
+static
+void ia32_gen_labels(ir_node *block, void *data) {
ir_node *pred;
int n = get_Block_n_cfgpreds(block);
/**
* Main driver. Emits the code for one routine.
*/
-void ia32_gen_routine(FILE *F, ir_graph *irg, const ia32_code_gen_t *cg) {
- ia32_emit_env_t emit_env;
+void ia32_gen_routine(ia32_code_gen_t *cg, ir_graph *irg) {
+ ia32_emit_env_t env;
ir_node *block;
+ ir_node *last_block = NULL;
+ int i, n;
- emit_env.out = F;
- emit_env.arch_env = cg->arch_env;
- emit_env.cg = cg;
- emit_env.isa = (ia32_isa_t *)cg->arch_env->isa;
- FIRM_DBG_REGISTER(emit_env.mod, "firm.be.ia32.emitter");
-
- /* set the global arch_env (needed by print hooks) */
- arch_env = cg->arch_env;
+ env.isa = (ia32_isa_t *)cg->arch_env->isa;
+ env.emit = &env.isa->emit;
+ env.arch_env = cg->arch_env;
+ env.cg = cg;
ia32_register_emitters();
- ia32_emit_func_prolog(F, irg, emit_env.isa->opt_arch);
- irg_block_walk_graph(irg, ia32_gen_labels, NULL, &emit_env);
+ ia32_emit_func_prolog(&env, irg);
+ irg_block_walk_graph(irg, ia32_gen_labels, NULL, &env);
- if ((cg->opt & IA32_OPT_EXTBB) && cg->blk_sched) {
- int i, n = ARR_LEN(cg->blk_sched);
+ n = ARR_LEN(cg->blk_sched);
+ for (i = 0; i < n;) {
+ ir_node *next_bl;
- for (i = 0; i < n;) {
- ir_node *next_bl;
+ block = cg->blk_sched[i];
+ ++i;
+ next_bl = i < n ? cg->blk_sched[i] : NULL;
- block = cg->blk_sched[i];
- ++i;
- next_bl = i < n ? cg->blk_sched[i] : NULL;
-
- /* set here the link. the emitter expects to find the next block here */
- set_irn_link(block, next_bl);
- ia32_gen_block(block, &emit_env);
- }
- }
- else {
- /* "normal" block schedule: Note the get_next_block() returns the NUMBER of the block
- in the block schedule. As this number should NEVER be equal the next block,
- we does not need a clear block link here. */
- irg_walk_blkwise_graph(irg, NULL, ia32_gen_block, &emit_env);
+ /* set here the link. the emitter expects to find the next block here */
+ set_irn_link(block, next_bl);
+ ia32_gen_block(&env, block, last_block);
+ last_block = block;
}
- ia32_emit_func_epilog(F, irg);
+ ia32_emit_func_epilog(&env, irg);
+}
+
+void ia32_init_emitter(void)
+{
+ FIRM_DBG_REGISTER(dbg, "firm.be.ia32.emitter");
}
projects / libfirm / blobdiff