switch(get_ia32_op_type(n)) {
case ia32_Normal:
- if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
+ if (is_ia32_ImmConst(n)) {
lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, get_ia32_cnst(n));
}
+ else if (is_ia32_ImmSymConst(n)) {
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, OFFSET FLAT:%s", n, get_ia32_cnst(n));
+ }
else {
const arch_register_t *in1 = get_in_reg(n, 2);
const arch_register_t *in2 = get_in_reg(n, 3);
get_ia32_cnst(n)); /* tell the assembler to store it's address. */
}
else {
- const arch_register_t *in1 = get_in_reg(n, 2);
- ir_mode *mode = get_ia32_res_mode(n);
- const char *in_name;
+ const arch_register_t *in1 = get_in_reg(n, get_irn_arity(n) == 5 ? 3 : 2);
+ ir_mode *mode = get_ia32_res_mode(n);
+ const char *in_name;
mode = mode ? mode : get_ia32_ls_mode(n);
in_name = ia32_get_reg_name_for_mode(env, mode, in1);
case ia32_AddrModeD:
snprintf(buf, SNPRINTF_BUF_LEN, "%s", ia32_emit_am(n, env));
break;
+ case ia32_AddrModeS:
+ /*
+ Mulh is emitted via emit_unop
+ imul [MEM] means EDX:EAX <- EAX * [MEM]
+ */
+ assert((is_ia32_Mulh(n) || is_ia32_MulS(n)) && "Only MulS and Mulh can have AM source as unop");
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s", ia32_emit_am(n, env));
+ break;
default:
assert(0 && "unsupported op type");
}
int had_output = 0;
char *s;
const char *p;
- int size;
static struct obstack *obst = NULL;
ir_mode *mode = get_ia32_ls_mode(n);
if (had_output)
obstack_printf(obst, "] ");
- size = obstack_object_size(obst);
- s = obstack_finish(obst);
- s[size - 1] = '\0';
+ obstack_1grow(obst, '\0');
+ s = obstack_finish(obst);
return s;
}
instr = "sub";
}
- /* in case of a PsiCondSet use mov because it doesn't affect the eflags */
- if (is_ia32_PsiCondSet(irn)) {
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "mov %%%s, 0", arch_register_get_name(out));
- }
- else {
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "%s %%%s, %%%s", instr, arch_register_get_name(out), arch_register_get_name(out));
- }
-
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* clear target as set modifies only lower 8 bit */");
- IA32_DO_EMIT(irn);
-
if (is_ia32_CmpSet(irn)) {
lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %s", ia32_emit_binop(irn, env));
}
snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* calculate Psi condition */" );
IA32_DO_EMIT(irn);
+ /* use mov to clear target because it doesn't affect the eflags */
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "mov %%%s, 0", arch_register_get_name(out));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* clear target as set modifies only lower 8 bit */");
+ IA32_DO_EMIT(irn);
+
snprintf(cmd_buf, SNPRINTF_BUF_LEN, "set%s %%%s", cmp_suffix, reg8bit);
snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* set 1 iff true, 0 otherweise */" );
IA32_DO_EMIT(irn);
/* fill the table structure */
tbl.label = xmalloc(SNPRINTF_BUF_LEN);
- tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, "JMPTBL_");
+ tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_");
tbl.defProj = NULL;
tbl.num_branches = get_irn_n_edges(irn);
tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
/**
* Emit movsb/w instructions to make mov count divideable by 4
*/
-static void emit_CopyB_prolog(FILE *F, ir_node *irn, int rem) {
+static void emit_CopyB_prolog(FILE *F, const ir_node *irn, int rem) {
char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
ir_fprintf(F, "\t/* memcopy prolog %+F */\n", irn);