case 'e': /* not available in 32 bit mode */
panic("unsupported asm constraint '%c' found in (%+F)",
*c, current_ir_graph);
- break;
default:
panic("unknown asm constraint '%c' found in (%+F)", *c,
current_ir_graph);
- break;
}
++c;
}
const ir_asm_constraint *in_constraints;
const ir_asm_constraint *out_constraints;
ident **clobbers;
- int clobbers_flags = 0;
unsigned clobber_bits[N_IA32_CLASSES];
int out_size;
backend_info_t *info;
memset(&clobber_bits, 0, sizeof(clobber_bits));
- /* workaround for lots of buggy code out there as most people think volatile
- * asm is enough for everything and forget the flags (linux kernel, etc.)
- */
- if (get_irn_pinned(node) == op_pin_state_pinned) {
- clobbers_flags = 1;
- }
-
arity = get_irn_arity(node);
in = ALLOCANZ(ir_node*, arity);
if (strcmp(c, "memory") == 0)
continue;
if (strcmp(c, "cc") == 0) {
- clobbers_flags = 1;
continue;
}
for (out_idx = 0; out_idx < n_out_constraints; ++out_idx) {
const ir_asm_constraint *constraint = &out_constraints[out_idx];
const char *c = get_id_str(constraint->constraint);
- unsigned pos = constraint->pos;
+ unsigned pos = constraint->pos;
constraint_t parsed_constraint;
const arch_register_req_t *req;
out_reg_reqs, out_idx);
out_reg_reqs[out_idx] = req;
+ /* multiple constraints for same pos. This can happen for example when
+ * a =A constraint gets lowered to two constraints: =a and =d for the
+ * same pos */
+ if (register_map[pos].valid)
+ continue;
+
register_map[pos].use_input = 0;
register_map[pos].valid = 1;
register_map[pos].memory = 0;
}
if (input == NULL) {
- ir_node *pred = get_irn_n(node, i);
input = get_new_node(pred);
if (parsed_constraint.cls == NULL
/* count inputs which are real values (and not memory) */
value_arity = 0;
for (i = 0; i < arity; ++i) {
- ir_node *in = get_irn_n(node, i);
- if (get_irn_mode(in) == mode_M)
+ ir_node *node_in = get_irn_n(node, i);
+ if (get_irn_mode(node_in) == mode_M)
continue;
++value_arity;
}
int o;
bitset_t *used_ins = bitset_alloca(arity);
for (o = 0; o < out_arity; ++o) {
- int i;
const arch_register_req_t *outreq = out_reg_reqs[o];
if (outreq->cls == NULL) {
++arity;
}
} else {
- int i;
bitset_t *used_outs = bitset_alloca(out_arity);
int orig_out_arity = out_arity;
for (i = 0; i < arity; ++i) {
ir_node *res = NULL;
dbg_info *dbgi = get_irn_dbg_info(node);
int size = get_type_size_bytes(get_CopyB_type(node));
+ int throws_exception = ir_throws_exception(node);
int rem;
/* If we have to copy more than 32 bytes, we use REP MOVSx and */
}
res = new_bd_ia32_CopyB_i(dbgi, block, new_dst, new_src, new_mem, size);
}
+ ir_set_throws_exception(res, throws_exception);
SET_IA32_ORIG_NODE(res, node);
ir_node *ia32_gen_Proj_tls(ir_node *node)
{
ir_node *block = get_new_node(get_nodes_block(node));
- ir_node *res = NULL;
-
- res = new_bd_ia32_LdTls(NULL, block, mode_Iu);
-
+ ir_node *res = new_bd_ia32_LdTls(NULL, block);
return res;
}
ir_node *ia32_try_create_Immediate(ir_node *node, char immediate_constraint_type)
{
- long val = 0;
- ir_entity *symconst_ent = NULL;
- ir_mode *mode;
- ir_node *cnst = NULL;
- ir_node *symconst = NULL;
- ir_node *new_node;
+ long val = 0;
+ ir_entity *symconst_ent = NULL;
+ ir_mode *mode;
+ ir_node *cnst = NULL;
+ ir_node *symconst = NULL;
+ ir_node *new_node;
mode = get_irn_mode(node);
if (!mode_is_int(mode) && !mode_is_reference(mode)) {
if (is_Const(node)) {
cnst = node;
symconst = NULL;
- } else if (is_Global(node)) {
+ } else if (is_SymConst_addr_ent(node)
+ && get_entity_owner(get_SymConst_entity(node)) != get_tls_type()) {
cnst = NULL;
symconst = node;
} else if (is_Add(node)) {
ir_node *left = get_Add_left(node);
ir_node *right = get_Add_right(node);
- if (is_Const(left) && is_Global(right)) {
+ if (is_Const(left) && is_SymConst_addr_ent(right)) {
cnst = left;
symconst = right;
- } else if (is_Global(left) && is_Const(right)) {
+ } else if (is_SymConst_addr_ent(left) && is_Const(right)) {
cnst = right;
symconst = left;
}