Use be_emit_irprintf("%T", x) instead of be_emit_tarval().
[libfirm] / ir / be / ia32 / ia32_common_transform.c
index 5b22768..61b9a0e 100644 (file)
@@ -22,7 +22,6 @@
  * @brief       This file implements the common parts of IR transformation from
  *              firm into ia32-Firm.
  * @author      Matthias Braun, Sebastian Buchwald
- * @version     $Id: ia32_common_transform.c 21012 2008-08-06 13:35:17Z beck $
  */
 #include "config.h"
 
@@ -33,9 +32,9 @@
 #include "bitset.h"
 #include "heights.h"
 
-#include "../betranshlp.h"
-#include "../beirg.h"
-#include "../beabi.h"
+#include "betranshlp.h"
+#include "beirg.h"
+#include "beabi.h"
 
 #include "ia32_architecture.h"
 #include "ia32_common_transform.h"
@@ -44,7 +43,7 @@
 #include "gen_ia32_new_nodes.h"
 #include "gen_ia32_regalloc_if.h"
 
-ir_heights_t *heights = NULL;
+ir_heights_t *ia32_heights = NULL;
 
 static int check_immediate_constraint(long val, char immediate_constraint_type)
 {
@@ -64,30 +63,19 @@ static int check_immediate_constraint(long val, char immediate_constraint_type)
        }
 }
 
-/**
- * Get a primitive type for a mode with alignment 16.
- */
-static ir_type *ia32_get_prim_type(pmap *types, ir_mode *mode)
+ir_type *ia32_get_prim_type(const ir_mode *mode)
 {
-       ir_type *res = (ir_type*)pmap_get(types, mode);
-       if (res != NULL)
-               return res;
-
-       res = new_type_primitive(mode);
-       if (get_mode_size_bits(mode) >= 80) {
-               set_type_alignment_bytes(res, 16);
+       if (mode == ia32_mode_E) {
+               return ia32_type_E;
+       } else {
+               return get_type_for_mode(mode);
        }
-       pmap_insert(types, mode, res);
-       return res;
 }
 
-ir_entity *create_float_const_entity(ir_node *cnst)
+ir_entity *ia32_create_float_const_entity(ia32_isa_t *isa, ir_tarval *tv,
+                                          ident *name)
 {
-       ir_graph         *irg      = get_irn_irg(cnst);
-       const arch_env_t *arch_env = be_get_irg_arch_env(irg);
-       ia32_isa_t       *isa      = (ia32_isa_t*) arch_env;
-       ir_tarval        *tv       = get_Const_tarval(cnst);
-       ir_entity        *res      = (ir_entity*)pmap_get(isa->tv_ent, tv);
+       ir_entity        *res = (ir_entity*)pmap_get(isa->tv_ent, tv);
        ir_initializer_t *initializer;
        ir_mode          *mode;
        ir_type          *tp;
@@ -112,8 +100,11 @@ ir_entity *create_float_const_entity(ir_node *cnst)
                }
        }
 
-       tp  = ia32_get_prim_type(isa->types, mode);
-       res = new_entity(get_glob_type(), id_unique("C%u"), tp);
+       if (name == NULL)
+               name = id_unique("C%u");
+
+       tp  = ia32_get_prim_type(mode);
+       res = new_entity(get_glob_type(), name, tp);
        set_entity_ld_ident(res, get_entity_ident(res));
        set_entity_visibility(res, ir_visibility_private);
        add_entity_linkage(res, IR_LINKAGE_CONSTANT);
@@ -130,7 +121,7 @@ ir_node *ia32_create_Immediate(ir_entity *symconst, int symconst_sign, long val)
        ir_graph *irg         = current_ir_graph;
        ir_node  *start_block = get_irg_start_block(irg);
        ir_node  *immediate   = new_bd_ia32_Immediate(NULL, start_block, symconst,
-                       symconst_sign, no_pic_adjust, val);
+                       symconst_sign, ia32_no_pic_adjust, val);
        arch_set_irn_register(immediate, &ia32_registers[REG_GP_NOREG]);
 
        return immediate;
@@ -164,7 +155,7 @@ const arch_register_t *ia32_get_clobber_register(const char *clobber)
 
 int ia32_mode_needs_gp_reg(ir_mode *mode)
 {
-       if (mode == mode_fpcw)
+       if (mode == ia32_mode_fpcw)
                return 0;
        if (get_mode_size_bits(mode) > 32)
                return 0;
@@ -172,7 +163,7 @@ int ia32_mode_needs_gp_reg(ir_mode *mode)
 }
 
 static void parse_asm_constraints(constraint_t *constraint, const char *c,
-                           int is_output)
+                                  bool is_output)
 {
        char                         immediate_type     = '\0';
        unsigned                     limited            = 0;
@@ -371,11 +362,9 @@ static void parse_asm_constraints(constraint_t *constraint, const char *c,
                case 'e': /* not available in 32 bit mode */
                        panic("unsupported asm constraint '%c' found in (%+F)",
                              *c, current_ir_graph);
-                       break;
                default:
                        panic("unknown asm constraint '%c' found in (%+F)", *c,
                              current_ir_graph);
-                       break;
                }
                ++c;
        }
@@ -425,19 +414,19 @@ static inline ir_node *get_new_node(ir_node *node)
 #endif
 }
 
-ir_node *gen_ASM(ir_node *node)
+ir_node *ia32_gen_ASM(ir_node *node)
 {
        ir_node                    *block     = get_nodes_block(node);
        ir_node                    *new_block = get_new_node(block);
        dbg_info                   *dbgi      = get_irn_dbg_info(node);
-       int                         i, arity;
-       int                         value_arity;
-       int                         out_idx;
+       int                         arity;
+       size_t                      value_arity;
+       size_t                      out_idx;
        ir_node                   **in;
        ir_node                    *new_node;
-       int                         out_arity;
-       int                         n_out_constraints;
-       int                         n_clobbers;
+       size_t                      out_arity;
+       size_t                      n_out_constraints;
+       size_t                      n_clobbers;
        const arch_register_req_t **out_reg_reqs;
        const arch_register_req_t **in_reg_reqs;
        ia32_asm_reg_t             *register_map;
@@ -446,37 +435,31 @@ ir_node *gen_ASM(ir_node *node)
        const ir_asm_constraint    *in_constraints;
        const ir_asm_constraint    *out_constraints;
        ident                     **clobbers;
-       int                         clobbers_flags = 0;
        unsigned                    clobber_bits[N_IA32_CLASSES];
-       int                         out_size;
+       size_t                      out_size;
        backend_info_t             *info;
+       int                         i;
+       size_t                      c;
+       size_t                      o;
 
        memset(&clobber_bits, 0, sizeof(clobber_bits));
 
-       /* workaround for lots of buggy code out there as most people think volatile
-        * asm is enough for everything and forget the flags (linux kernel, etc.)
-        */
-       if (get_irn_pinned(node) == op_pin_state_pinned) {
-               clobbers_flags = 1;
-       }
-
        arity = get_irn_arity(node);
        in    = ALLOCANZ(ir_node*, arity);
 
        clobbers   = get_ASM_clobbers(node);
        n_clobbers = 0;
-       for (i = 0; i < get_ASM_n_clobbers(node); ++i) {
+       for (c = 0; c < get_ASM_n_clobbers(node); ++c) {
                const arch_register_req_t *req;
-               const char                *c = get_id_str(clobbers[i]);
+               const char                *clobber = get_id_str(clobbers[c]);
 
-               if (strcmp(c, "memory") == 0)
+               if (strcmp(clobber, "memory") == 0)
                        continue;
-               if (strcmp(c, "cc") == 0) {
-                       clobbers_flags = 1;
+               if (strcmp(clobber, "cc") == 0) {
                        continue;
                }
 
-               req = parse_clobber(c);
+               req = ia32_parse_clobber(clobber);
                clobber_bits[req->cls->index] |= *req->limited;
 
                n_clobbers++;
@@ -505,21 +488,27 @@ ir_node *gen_ASM(ir_node *node)
        memset(register_map, 0, reg_map_size * sizeof(register_map[0]));
 
        /* construct output constraints */
-       out_size = out_arity + 1;
+       out_size     = out_arity + 1;
        out_reg_reqs = OALLOCN(obst, const arch_register_req_t*, out_size);
 
        for (out_idx = 0; out_idx < n_out_constraints; ++out_idx) {
                const ir_asm_constraint   *constraint = &out_constraints[out_idx];
                const char                *c       = get_id_str(constraint->constraint);
-               unsigned                   pos        = constraint->pos;
+               unsigned                   pos     = constraint->pos;
                constraint_t               parsed_constraint;
                const arch_register_req_t *req;
 
-               parse_asm_constraints(&parsed_constraint, c, 1);
-               req = make_register_req(&parsed_constraint, n_out_constraints,
-                                       out_reg_reqs, out_idx);
+               parse_asm_constraints(&parsed_constraint, c, true);
+               req = ia32_make_register_req(&parsed_constraint, n_out_constraints,
+                                            out_reg_reqs, out_idx);
                out_reg_reqs[out_idx] = req;
 
+               /* multiple constraints for same pos. This can happen for example when
+                * a =A constraint gets lowered to two constraints: =a and =d for the
+                * same pos */
+               if (register_map[pos].valid)
+                       continue;
+
                register_map[pos].use_input = 0;
                register_map[pos].valid     = 1;
                register_map[pos].memory    = 0;
@@ -541,7 +530,7 @@ ir_node *gen_ASM(ir_node *node)
                constraint_t               parsed_constraint;
                const arch_register_req_t *req;
 
-               parse_asm_constraints(&parsed_constraint, c, 0);
+               parse_asm_constraints(&parsed_constraint, c, false);
                if (parsed_constraint.cls != NULL) {
                        r_clobber_bits = clobber_bits[parsed_constraint.cls->index];
                        if (r_clobber_bits != 0) {
@@ -555,17 +544,16 @@ ir_node *gen_ASM(ir_node *node)
                        }
                }
 
-               req = make_register_req(&parsed_constraint, n_out_constraints,
+               req = ia32_make_register_req(&parsed_constraint, n_out_constraints,
                                        out_reg_reqs, i);
                in_reg_reqs[i] = req;
 
                if (parsed_constraint.immediate_type != '\0') {
                        char imm_type = parsed_constraint.immediate_type;
-                       input = try_create_Immediate(pred, imm_type);
+                       input = ia32_try_create_Immediate(pred, imm_type);
                }
 
                if (input == NULL) {
-                       ir_node *pred = get_irn_n(node, i);
                        input = get_new_node(pred);
 
                        if (parsed_constraint.cls == NULL
@@ -585,14 +573,14 @@ ir_node *gen_ASM(ir_node *node)
        }
 
        /* parse clobbers */
-       for (i = 0; i < get_ASM_n_clobbers(node); ++i) {
-               const char                *c = get_id_str(clobbers[i]);
+       for (c = 0; c < get_ASM_n_clobbers(node); ++c) {
+               const char                *clobber = get_id_str(clobbers[c]);
                const arch_register_req_t *req;
 
-               if (strcmp(c, "memory") == 0 || strcmp(c, "cc") == 0)
+               if (strcmp(clobber, "memory") == 0 || strcmp(clobber, "cc") == 0)
                        continue;
 
-               req = parse_clobber(c);
+               req = ia32_parse_clobber(clobber);
                out_reg_reqs[out_idx] = req;
                ++out_idx;
        }
@@ -600,8 +588,8 @@ ir_node *gen_ASM(ir_node *node)
        /* count inputs which are real values (and not memory) */
        value_arity = 0;
        for (i = 0; i < arity; ++i) {
-               ir_node *in = get_irn_n(node, i);
-               if (get_irn_mode(in) == mode_M)
+               ir_node *node_in = get_irn_n(node, i);
+               if (get_irn_mode(node_in) == mode_M)
                        continue;
                ++value_arity;
        }
@@ -621,10 +609,9 @@ ir_node *gen_ASM(ir_node *node)
        if (out_arity <= value_arity) {
                int       orig_arity = arity;
                int       in_size    = arity;
-               int       o;
-               bitset_t *used_ins = bitset_alloca(arity);
+               bitset_t *used_ins   = bitset_alloca(arity);
+               size_t    o;
                for (o = 0; o < out_arity; ++o) {
-                       int   i;
                        const arch_register_req_t *outreq = out_reg_reqs[o];
 
                        if (outreq->cls == NULL) {
@@ -665,16 +652,14 @@ ir_node *gen_ASM(ir_node *node)
                        assert(outreq->type & arch_register_req_type_limited);
                        in_reg_reqs[arity] = outreq;
                        in[arity]          = new_bd_ia32_ProduceVal(NULL, block);
-                       be_dep_on_frame(in[arity]);
                        ++arity;
                }
        } else {
-               int       i;
-               bitset_t *used_outs = bitset_alloca(out_arity);
-               int       orig_out_arity = out_arity;
+               bitset_t *used_outs      = bitset_alloca(out_arity);
+               size_t    orig_out_arity = out_arity;
                for (i = 0; i < arity; ++i) {
-                       int   o;
                        const arch_register_req_t *inreq = in_reg_reqs[i];
+                       size_t                     o;
 
                        if (inreq->cls == NULL) {
                                continue;
@@ -732,21 +717,18 @@ ir_node *gen_ASM(ir_node *node)
        new_node = new_bd_ia32_Asm(dbgi, new_block, arity, in, out_arity,
                                   get_ASM_text(node), register_map);
 
-       if (arity == 0)
-               be_dep_on_frame(new_node);
-
        info = be_get_info(new_node);
-       for (i = 0; i < out_arity; ++i) {
-               info->out_infos[i].req = out_reg_reqs[i];
+       for (o = 0; o < out_arity; ++o) {
+               info->out_infos[o].req = out_reg_reqs[o];
        }
-       arch_set_in_register_reqs(new_node, in_reg_reqs);
+       arch_set_irn_register_reqs_in(new_node, in_reg_reqs);
 
        SET_IA32_ORIG_NODE(new_node, node);
 
        return new_node;
 }
 
-ir_node *gen_CopyB(ir_node *node)
+ir_node *ia32_gen_CopyB(ir_node *node)
 {
        ir_node  *block    = get_new_node(get_nodes_block(node));
        ir_node  *src      = get_CopyB_src(node);
@@ -758,6 +740,7 @@ ir_node *gen_CopyB(ir_node *node)
        ir_node  *res      = NULL;
        dbg_info *dbgi     = get_irn_dbg_info(node);
        int      size      = get_type_size_bytes(get_CopyB_type(node));
+       int      throws_exception = ir_throws_exception(node);
        int      rem;
 
        /* If we have to copy more than 32 bytes, we use REP MOVSx and */
@@ -767,7 +750,6 @@ ir_node *gen_CopyB(ir_node *node)
                size >>= 2;
 
                res = new_bd_ia32_Const(dbgi, block, NULL, 0, 0, size);
-               be_dep_on_frame(res);
 
                res = new_bd_ia32_CopyB(dbgi, block, new_dst, new_src, res, new_mem, rem);
        } else {
@@ -777,23 +759,21 @@ ir_node *gen_CopyB(ir_node *node)
                }
                res = new_bd_ia32_CopyB_i(dbgi, block, new_dst, new_src, new_mem, size);
        }
+       ir_set_throws_exception(res, throws_exception);
 
        SET_IA32_ORIG_NODE(res, node);
 
        return res;
 }
 
-ir_node *gen_Proj_tls(ir_node *node)
+ir_node *ia32_gen_Proj_tls(ir_node *node)
 {
        ir_node *block = get_new_node(get_nodes_block(node));
-       ir_node *res   = NULL;
-
-       res = new_bd_ia32_LdTls(NULL, block, mode_Iu);
-
+       ir_node *res   = new_bd_ia32_LdTls(NULL, block);
        return res;
 }
 
-ir_node *gen_Unknown(ir_node *node)
+ir_node *ia32_gen_Unknown(ir_node *node)
 {
        ir_mode  *mode  = get_irn_mode(node);
        ir_graph *irg   = current_ir_graph;
@@ -813,11 +793,10 @@ ir_node *gen_Unknown(ir_node *node)
                panic("unsupported Unknown-Mode");
        }
 
-       be_dep_on_frame(res);
        return res;
 }
 
-const arch_register_req_t *make_register_req(const constraint_t *constraint,
+const arch_register_req_t *ia32_make_register_req(const constraint_t *constraint,
                int n_outs, const arch_register_req_t **out_reqs, int pos)
 {
        struct obstack      *obst    = get_irg_obstack(current_ir_graph);
@@ -871,7 +850,7 @@ const arch_register_req_t *make_register_req(const constraint_t *constraint,
        return req;
 }
 
-const arch_register_req_t *parse_clobber(const char *clobber)
+const arch_register_req_t *ia32_parse_clobber(const char *clobber)
 {
        struct obstack        *obst = get_irg_obstack(current_ir_graph);
        const arch_register_t *reg  = ia32_get_clobber_register(clobber);
@@ -897,7 +876,7 @@ const arch_register_req_t *parse_clobber(const char *clobber)
 }
 
 
-int prevents_AM(ir_node *const block, ir_node *const am_candidate,
+int ia32_prevents_AM(ir_node *const block, ir_node *const am_candidate,
                        ir_node *const other)
 {
        if (get_nodes_block(other) != block)
@@ -916,7 +895,7 @@ int prevents_AM(ir_node *const block, ir_node *const am_candidate,
                        if (is_Proj(pred) && get_Proj_pred(pred) == am_candidate)
                                continue;
 
-                       if (!heights_reachable_in_block(heights, pred, am_candidate))
+                       if (!heights_reachable_in_block(ia32_heights, pred, am_candidate))
                                continue;
 
                        return 1;
@@ -928,21 +907,21 @@ int prevents_AM(ir_node *const block, ir_node *const am_candidate,
                if (is_Proj(other) && get_Proj_pred(other) == am_candidate)
                        return 0;
 
-               if (!heights_reachable_in_block(heights, other, am_candidate))
+               if (!heights_reachable_in_block(ia32_heights, other, am_candidate))
                        return 0;
 
                return 1;
        }
 }
 
-ir_node *try_create_Immediate(ir_node *node, char immediate_constraint_type)
+ir_node *ia32_try_create_Immediate(ir_node *node, char immediate_constraint_type)
 {
-       long         val = 0;
-       ir_entity   *symconst_ent  = NULL;
-       ir_mode     *mode;
-       ir_node     *cnst          = NULL;
-       ir_node     *symconst      = NULL;
-       ir_node     *new_node;
+       long       val = 0;
+       ir_entity *symconst_ent  = NULL;
+       ir_mode   *mode;
+       ir_node   *cnst          = NULL;
+       ir_node   *symconst      = NULL;
+       ir_node   *new_node;
 
        mode = get_irn_mode(node);
        if (!mode_is_int(mode) && !mode_is_reference(mode)) {
@@ -952,16 +931,17 @@ ir_node *try_create_Immediate(ir_node *node, char immediate_constraint_type)
        if (is_Const(node)) {
                cnst     = node;
                symconst = NULL;
-       } else if (is_Global(node)) {
+       } else if (is_SymConst_addr_ent(node)
+                       && get_entity_owner(get_SymConst_entity(node)) != get_tls_type()) {
                cnst     = NULL;
                symconst = node;
        } else if (is_Add(node)) {
                ir_node *left  = get_Add_left(node);
                ir_node *right = get_Add_right(node);
-               if (is_Const(left) && is_Global(right)) {
+               if (is_Const(left) && is_SymConst_addr_ent(right)) {
                        cnst     = left;
                        symconst = right;
-               } else if (is_Global(left) && is_Const(right)) {
+               } else if (is_SymConst_addr_ent(left) && is_Const(right)) {
                        cnst     = right;
                        symconst = left;
                }
@@ -986,7 +966,7 @@ ir_node *try_create_Immediate(ir_node *node, char immediate_constraint_type)
                        return NULL;
                }
 
-               symconst_ent = get_Global_entity(symconst);
+               symconst_ent = get_SymConst_entity(symconst);
        }
        if (cnst == NULL && symconst == NULL)
                return NULL;