convert bitfield initializer tarvals before using them

[libfirm] / ir / be / ia32 / ia32_common_transform.c

diff --git a/ir/be/ia32/ia32_common_transform.c b/ir/be/ia32/ia32_common_transform.c
index 658d393..3aff738 100644 (file)
--- a/ir/be/ia32/ia32_common_transform.c
+++ b/ir/be/ia32/ia32_common_transform.c
@@ -226,7 +226,6 @@ int ia32_mode_needs_gp_reg(ir_mode *mode) {
 static void parse_asm_constraints(constraint_t *constraint, const char *c,
                            int is_output)
 {
-       asm_constraint_flags_t       flags              = 0;
        char                         immediate_type     = '\0';
        unsigned                     limited            = 0;
        const arch_register_class_t *cls                = NULL;
@@ -254,15 +253,9 @@ static void parse_asm_constraints(constraint_t *constraint, const char *c,
                case '\n':
                        break;
 
-               case '=':
-                       flags |= ASM_CONSTRAINT_FLAG_MODIFIER_WRITE
-                               | ASM_CONSTRAINT_FLAG_MODIFIER_NO_READ;
-                       break;
-
-               case '+':
-                       flags |= ASM_CONSTRAINT_FLAG_MODIFIER_WRITE
-                               | ASM_CONSTRAINT_FLAG_MODIFIER_READ;
-                       break;
+               /* Skip out/in-out marker */
+               case '=': break;
+               case '+': break;
 
                case '*':
                        ++c;
@@ -491,6 +484,7 @@ ir_node *gen_ASM(ir_node *node)
 
 #ifdef FIRM_GRGEN_BE
        case TRANSFORMER_PBQP:
+       case TRANSFORMER_RAND:
                new_block = get_nodes_block(node);
                break;
 #endif
@@ -620,6 +614,7 @@ ir_node *gen_ASM(ir_node *node)
 
 #ifdef FIRM_GRGEN_BE
                        case TRANSFORMER_PBQP:
+                       case TRANSFORMER_RAND:
                                input = get_irn_n(node, i);
                                break;
 #endif
@@ -659,6 +654,12 @@ ir_node *gen_ASM(ir_node *node)
        new_node = new_rd_ia32_Asm(dbgi, irg, new_block, arity, in, out_arity,
                                   get_ASM_text(node), register_map);
 
+       /* Prevent the ASM node from being scheduled before the Barrier, if it has
+        * no inputs */
+       if (arity == 0 && get_irg_start_block(irg) == new_block) {
+               add_irn_dep(new_node, get_irg_frame(irg));
+       }
+
        set_ia32_out_req_all(new_node, out_reg_reqs);
        set_ia32_in_req_all(new_node, in_reg_reqs);
 
@@ -694,6 +695,7 @@ ir_node *gen_CopyB(ir_node *node) {
 
 #ifdef FIRM_GRGEN_BE
                case TRANSFORMER_PBQP:
+               case TRANSFORMER_RAND:
                        block    = get_nodes_block(node);
                        new_src  = get_CopyB_src(node);
                        new_dst  = get_CopyB_dst(node);
@@ -740,6 +742,7 @@ ir_node *gen_Proj_tls(ir_node *node) {
 
 #ifdef FIRM_GRGEN_BE
                case TRANSFORMER_PBQP:
+               case TRANSFORMER_RAND:
                        block = get_nodes_block(node);
                        break;
 #endif
@@ -795,14 +798,12 @@ const arch_register_req_t *make_register_req(const constraint_t *constraint,
                if (same_as >= n_outs)
                        panic("invalid output number in same_as constraint");
 
-               other_constr         = out_reqs[same_as];
+               other_constr     = out_reqs[same_as];
 
-               req                  = obstack_alloc(obst, sizeof(req[0]));
-               req->cls             = other_constr->cls;
-               req->type            = arch_register_req_type_should_be_same;
-               req->limited         = NULL;
-               req->other_same      = 1U << pos;
-               req->other_different = 0;
+               req              = obstack_alloc(obst, sizeof(req[0]));
+               *req             = *other_constr;
+               req->type       |= arch_register_req_type_should_be_same;
+               req->other_same  = 1U << pos;
 
                /* switch constraints. This is because in firm we have same_as
                 * constraints on the output constraints while in the gcc asm syntax
@@ -845,7 +846,7 @@ const arch_register_req_t *parse_clobber(const char *clobber)
        unsigned              *limited;
 
        if(reg == NULL) {
-               panic("Register '%s' mentioned in asm clobber is unknown\n", clobber);
+               panic("Register '%s' mentioned in asm clobber is unknown", clobber);
        }
 
        assert(reg->index < 32);
@@ -862,6 +863,45 @@ const arch_register_req_t *parse_clobber(const char *clobber)
        return req;
 }
 
+
+int prevents_AM(ir_node *const block, ir_node *const am_candidate,
+                       ir_node *const other)
+{
+       if (get_nodes_block(other) != block)
+               return 0;
+
+       if (is_Sync(other)) {
+               int i;
+
+               for (i = get_Sync_n_preds(other) - 1; i >= 0; --i) {
+                       ir_node *const pred = get_Sync_pred(other, i);
+
+                       if (get_nodes_block(pred) != block)
+                               continue;
+
+                       /* Do not block ourselves from getting eaten */
+                       if (is_Proj(pred) && get_Proj_pred(pred) == am_candidate)
+                               continue;
+
+                       if (!heights_reachable_in_block(heights, pred, am_candidate))
+                               continue;
+
+                       return 1;
+               }
+
+               return 0;
+       } else {
+               /* Do not block ourselves from getting eaten */
+               if (is_Proj(other) && get_Proj_pred(other) == am_candidate)
+                       return 0;
+
+               if (!heights_reachable_in_block(heights, other, am_candidate))
+                       return 0;
+
+               return 1;
+       }
+}
+
 ir_node *try_create_Immediate(ir_node *node, char immediate_constraint_type)
 {
        int          minus         = 0;