Turn while loop into do-while, we know it will be executed at least once.
[libfirm] / ir / be / ia32 / ia32_architecture.c
index 351aebb..b025b4f 100644 (file)
@@ -93,7 +93,7 @@ enum cpu_arch_features {
 /**
  * CPU's.
  */
-enum cpu_support {
+typedef enum cpu_support {
        cpu_generic     = arch_generic32,
 
        /* intel CPUs */
@@ -127,9 +127,10 @@ enum cpu_support {
        cpu_winchip2    = arch_i486 | arch_feature_mmx | arch_feature_3DNow,
        cpu_c3          = arch_i486 | arch_feature_mmx | arch_feature_3DNow,
        cpu_c3_2        = arch_ppro | arch_feature_p6_insn | arch_sse1_insn, /* really no 3DNow! */
-};
+} cpu_support;
 
 static int         opt_size             = 0;
+static int         emit_machcode        = 0;
 static cpu_support arch                 = cpu_generic;
 static cpu_support opt_arch             = cpu_generic;
 static int         use_sse2             = 0;
@@ -220,6 +221,8 @@ static const lc_opt_table_entry_t ia32_architecture_options[] = {
                          &opt_cc, 1),
        LC_OPT_ENT_BIT("unsafe_floatconv", "do unsafe floating point controlword "
                       "optimisations", &opt_unsafe_floatconv, 1),
+       LC_OPT_ENT_BOOL("machcode", "output machine code instead of assembler",
+                       &emit_machcode),
        LC_OPT_LAST
 };
 
@@ -435,12 +438,13 @@ static void set_arch_costs(void)
 }
 
 /* Evaluate the costs of an instruction. */
-int ia32_evaluate_insn(insn_kind kind, tarval *tv) {
+int ia32_evaluate_insn(insn_kind kind, const ir_mode *mode, ir_tarval *tv)
+{
        int cost;
 
        switch (kind) {
        case MUL:
-               cost =  arch_costs->cost_mul_start;
+               cost = arch_costs->cost_mul_start;
                if (arch_costs->cost_mul_bit > 0) {
                        char *bitstr = get_tarval_bitpattern(tv);
                        int i;
@@ -452,14 +456,27 @@ int ia32_evaluate_insn(insn_kind kind, tarval *tv) {
                        }
                        free(bitstr);
                }
-               return cost;
+               if (get_mode_size_bits(mode) <= 32)
+                       return cost;
+               /* 64bit mul supported, approx 4times of a 32bit mul*/
+               return 4 * cost;
        case LEA:
-               return arch_costs->lea_cost;
+               /* lea is only supported for 32 bit */
+               if (get_mode_size_bits(mode) <= 32)
+                       return arch_costs->lea_cost;
+               /* in 64bit mode, the Lea cost are at wort 2 shifts and one add */
+               return 2 * arch_costs->add_cost + 2 * (2 * arch_costs->const_shf_cost);
        case ADD:
        case SUB:
-               return arch_costs->add_cost;
+               if (get_mode_size_bits(mode) <= 32)
+                       return arch_costs->add_cost;
+               /* 64bit add/sub supported, double the cost */
+               return 2 * arch_costs->add_cost;
        case SHIFT:
-               return arch_costs->const_shf_cost;
+               if (get_mode_size_bits(mode) <= 32)
+                       return arch_costs->const_shf_cost;
+               /* 64bit shift supported, double the cost */
+               return 2 * arch_costs->const_shf_cost;
        case ZERO:
                return arch_costs->add_cost;
        default:
@@ -509,8 +526,10 @@ void ia32_setup_cg_config(void)
        c->use_sse_prefetch     = FLAGS(arch, (arch_feature_3DNowE | arch_feature_sse1));
        c->use_3dnow_prefetch   = FLAGS(arch, arch_feature_3DNow);
        c->use_popcnt           = FLAGS(arch, (arch_feature_sse4_2 | arch_feature_sse4a));
+       c->use_i486             = (arch & arch_mask) >= arch_i486;
        c->optimize_cc          = opt_cc;
        c->use_unsafe_floatconv = opt_unsafe_floatconv;
+       c->emit_machcode        = emit_machcode;
 
        c->function_alignment       = arch_costs->function_alignment;
        c->label_alignment          = arch_costs->label_alignment;