remove remaining WITH_ILP uses, fix bug introduced when adapting lpp

[libfirm] / ir / be / ia32 / ia32_architecture.c

diff --git a/ir/be/ia32/ia32_architecture.c b/ir/be/ia32/ia32_architecture.c
index 2ffda78..7917a4a 100644 (file)
--- a/ir/be/ia32/ia32_architecture.c
+++ b/ir/be/ia32/ia32_architecture.c
@@ -811,13 +811,11 @@ static void autodetect_arch(void)
        /* We use the cpuid instruction to detect the CPU features */
        if (x86_toogle_cpuid()) {
                cpuid_registers   regs;
-               unsigned          highest_level;
                char              vendorid[13];
                x86_cpu_info_t    cpu_info;
 
                /* get vendor ID */
                x86_cpuid(&regs, 0);
-               highest_level = regs.r.eax;
                memcpy(&vendorid[0], &regs.r.ebx, 4);
                memcpy(&vendorid[4], &regs.r.edx, 4);
                memcpy(&vendorid[8], &regs.r.ecx, 4);
@@ -911,7 +909,7 @@ void ia32_setup_cg_config(void)
        c->use_pxor             = FLAGS(opt_arch, arch_netburst);
        c->use_mov_0            = FLAGS(opt_arch, arch_k6) && !opt_size;
        c->use_short_sex_eax    = !FLAGS(opt_arch, arch_k6) && !opt_size;
-       c->use_pad_return       = FLAGS(opt_arch, arch_athlon_plus | arch_core2 | arch_generic32) && !opt_size;
+       c->use_pad_return       = FLAGS(opt_arch, arch_athlon_plus) && !opt_size;
        c->use_bt               = FLAGS(opt_arch, arch_core2 | arch_athlon_plus) || opt_size;
        c->use_fisttp           = FLAGS(opt_arch & arch, arch_feature_sse3);
        c->use_sse_prefetch     = FLAGS(arch, (arch_feature_3DNowE | arch_feature_sse1));