remove old+unused code

[libfirm] / ir / be / ia32 / ia32_architecture.c

diff --git a/ir/be/ia32/ia32_architecture.c b/ir/be/ia32/ia32_architecture.c
index 7bce4ab..2ffda78 100644 (file)
--- a/ir/be/ia32/ia32_architecture.c
+++ b/ir/be/ia32/ia32_architecture.c
@@ -708,15 +708,16 @@ static cpu_support auto_detect_AMD(x86_cpu_info_t const *info) {
                        break;
                default:
                        /* unknown K7 */
-                       auto_arch = arch_athlon | arch_feature_p6_insn;;
+                       auto_arch = arch_athlon | arch_feature_p6_insn;
                        break;
                }
                break;
        case 0x0F:
-               auto_arch = arch_k8 | arch_feature_p6_insn;;
+               auto_arch = arch_k8 | arch_feature_p6_insn;
                break;
        case 0x1F:
-               auto_arch = arch_k10 | arch_feature_p6_insn;;
+       case 0x2F: /* AMD Family 11h */
+               auto_arch = arch_k10 | arch_feature_p6_insn;
                break;
        default:
                /* unknown */
@@ -739,12 +740,25 @@ typedef union {
 static void x86_cpuid(cpuid_registers *regs, unsigned level)
 {
 #if defined(__GNUC__)
+#      if defined(__PIC__) && !defined(__amd64) // GCC cannot handle EBX in PIC
+       __asm (
+               "pushl %%ebx\n\t"
+               "cpuid\n\t"
+               "movl %%ebx, %1\n\t"
+               "popl %%ebx"
+       : "=a" (regs->r.eax), "=r" (regs->r.ebx), "=c" (regs->r.ecx), "=d" (regs->r.edx)
+       : "a" (level)
+       );
+#      else
        __asm ("cpuid\n\t"
        : "=a" (regs->r.eax), "=b" (regs->r.ebx), "=c" (regs->r.ecx), "=d" (regs->r.edx)
        : "a" (level)
        );
+#      endif
 #elif defined(_MSC_VER)
        __cpuid(regs->bulk, level);
+#else
+#      error CPUID is missing
 #endif
 }