cpu_winchip_c6 = arch_i486 | arch_feature_mmx,
cpu_winchip2 = arch_i486 | arch_feature_mmx | arch_feature_3DNow,
cpu_c3 = arch_i486 | arch_feature_mmx | arch_feature_3DNow,
- cpu_c3_2 = arch_ppro | arch_sse1_insn, /* really no 3DNow! */
+ cpu_c3_2 = arch_ppro | arch_feature_p6_insn | arch_sse1_insn, /* really no 3DNow! */
};
static int opt_size = 0;
set_arch_costs();
c->optimize_size = opt_size != 0;
- /* on newer intel cpus mov, pop is often faster then leave although it has a
+ /* on newer intel cpus mov, pop is often faster than leave although it has a
* longer opcode */
c->use_leave = FLAGS(opt_arch, arch_i386 | arch_all_amd | arch_core2) || opt_size;
/* P4s don't like inc/decs because they only partially write the flags
- register which produces false dependencies */
+ * register which produces false dependencies */
c->use_incdec = !FLAGS(opt_arch, arch_netburst | arch_nocona | arch_core2 | arch_geode) || opt_size;
c->use_sse2 = use_sse2 && FLAGS(arch, arch_feature_sse2);
c->use_ffreep = FLAGS(opt_arch, arch_athlon_plus);
c->use_imul_mem_imm32 = !FLAGS(opt_arch, arch_k8 | arch_k10) || opt_size;
c->use_pxor = FLAGS(opt_arch, arch_netburst);
c->use_mov_0 = FLAGS(opt_arch, arch_k6) && !opt_size;
+ c->use_short_sex_eax = !FLAGS(opt_arch, arch_k6) && !opt_size;
c->use_pad_return = FLAGS(opt_arch, arch_athlon_plus | arch_core2 | arch_generic32) && !opt_size;
c->use_bt = FLAGS(opt_arch, arch_core2 | arch_athlon_plus) || opt_size;
c->use_fisttp = FLAGS(opt_arch & arch, arch_feature_sse3);