/*
- * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
+ * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
*
* This file is part of libFirm.
*
/**
* @file
* @brief This file contains functions for matching firm graphs for
- * nodes that can be used as addressmode for x86 commands
+ * nodes that can be used as address mode for x86 instructions
* @author Matthias Braun
* @version $Id$
*/
/* gas/ld don't support negative symconsts :-( */
#undef SUPPORT_NEGATIVE_SYMCONSTS
+static be_lv_t *lv;
static bitset_t *non_address_mode_nodes;
/**
*
* @return non-zero if the DAG represents an immediate, 0 else
*/
+#if 0
static int is_immediate_simple(const ir_node *node) {
int symconsts = 0;
return do_is_immediate(node, &symconsts, 0);
}
+#endif
/**
* Check if a DAG starting with root node can be folded into an address mode
*/
static int eat_shl(ia32_address_t *addr, ir_node *node)
{
- ir_node *right = get_Shl_right(node);
- tarval *tv;
+ ir_node *shifted_val;
long val;
- /* we can only eat a shl if we don't have a scale or index set yet */
- if(addr->scale != 0 || addr->index != NULL)
- return 0;
+ if(is_Shl(node)) {
+ ir_node *right = get_Shl_right(node);
+ tarval *tv;
- /* we can use shl with 1, 2 or 3 shift */
- if(!is_Const(right))
- return 0;
- tv = get_Const_tarval(right);
- if(!tarval_is_long(tv))
- return 0;
- val = get_tarval_long(tv);
- if(val < 0 || val > 3)
+ /* we can use shl with 1, 2 or 3 shift */
+ if(!is_Const(right))
+ return 0;
+ tv = get_Const_tarval(right);
+ if(!tarval_is_long(tv))
+ return 0;
+
+ val = get_tarval_long(tv);
+ if(val < 0 || val > 3)
+ return 0;
+ if(val == 0) {
+ ir_fprintf(stderr, "Optimisation warning: unoptimized Shl(,0) "
+ "found\n");
+ }
+
+ shifted_val = get_Shl_left(node);
+ } else if(is_Add(node)) {
+ /* might be an add x, x */
+ ir_node *left = get_Add_left(node);
+ ir_node *right = get_Add_right(node);
+
+ if(left != right)
+ return 0;
+ if(is_Const(left))
+ return 0;
+
+ val = 1;
+ shifted_val = left;
+ } else {
return 0;
- if(val == 0) {
- ir_fprintf(stderr, "Optimisation warning: unoptimized Shl(,0) found\n");
}
+
+ /* we can only eat a shl if we don't have a scale or index set yet */
+ if(addr->scale != 0 || addr->index != NULL)
+ return 0;
if(bitset_is_set(non_address_mode_nodes, get_irn_idx(node)))
return 0;
#endif
addr->scale = val;
- addr->index = eat_immediates(addr, get_Shl_left(node), 0);
+ addr->index = shifted_val;
return 1;
}
-/**
- * Returns non-zero if a value of a given mode can be stored in GP registers.
- */
-static INLINE int mode_needs_gp_reg(ir_mode *mode) {
- if(mode == mode_fpcw)
- return 0;
- if(get_mode_size_bits(mode) > 32)
- return 0;
- return mode_is_int(mode) || mode_is_reference(mode) || mode == mode_b;
-}
-
-/**
- * Check, if a given node is a Down-Conv, ie. a integer Conv
- * from a mode with a mode with more bits to a mode with lesser bits.
- * Moreover, we return only true if the node has not more than 1 user.
- *
- * @param node the node
- * @return non-zero if node is a Down-Conv
- */
-static int is_downconv(const ir_node *node)
-{
- ir_mode *src_mode;
- ir_mode *dest_mode;
-
- if(!is_Conv(node))
- return 0;
-
- /* we only want to skip the conv when we're the only user
- * (not optimal but for now...)
- */
- if(get_irn_n_edges(node) > 1)
- return 0;
-
- src_mode = get_irn_mode(get_Conv_op(node));
- dest_mode = get_irn_mode(node);
- return mode_needs_gp_reg(src_mode)
- && mode_needs_gp_reg(dest_mode)
- && get_mode_size_bits(dest_mode) < get_mode_size_bits(src_mode);
-}
-
-/**
- * Skip all Down-Conv's on a given node and return the resulting node.
- */
-static ir_node *skip_downconv(ir_node *node)
-{
- while(is_downconv(node))
- node = get_Conv_op(node);
-
- return node;
-}
-
/* Create an address mode for a given node. */
void ia32_create_address_mode(ia32_address_t *addr, ir_node *node, int force)
{
eat_imms = eat_immediates(addr, node, force);
if(eat_imms != node) {
if(force) {
- eat_imms = skip_downconv(eat_imms);
+ eat_imms = ia32_skip_downconv(eat_imms);
}
res = 1;
/* starting point Add, Sub or Shl, FrameAddr */
if(is_Shl(node)) {
+ /* We don't want to eat add x, x as shl here, so only test for real Shl
+ * instructions, because we want the former as Lea x, x, not Shl x, 1 */
if(eat_shl(addr, node))
return;
} else if(is_immediate(addr, node, 0)) {
ir_node *right = get_Add_right(node);
if(force) {
- left = skip_downconv(left);
- right = skip_downconv(right);
+ left = ia32_skip_downconv(left);
+ right = ia32_skip_downconv(right);
}
assert(force || !is_immediate(addr, left, 0));
assert(force || !is_immediate(addr, right, 0));
- if(is_Shl(left) && eat_shl(addr, left)) {
+ if(eat_shl(addr, left)) {
left = NULL;
- } else if(is_Shl(right) && eat_shl(addr, right)) {
+ } else if(eat_shl(addr, right)) {
right = NULL;
}
if(left != NULL && be_is_FrameAddr(left)
addr->base = node;
}
+void ia32_mark_non_am(ir_node *node)
+{
+ bitset_set(non_address_mode_nodes, get_irn_idx(node));
+}
+
+static int value_last_used_here(ir_node *here, ir_node *value)
+{
+ ir_node *block = get_nodes_block(here);
+ const ir_edge_t *edge;
+
+ /* If the value is live end it is for sure it does not die here */
+ if (be_is_live_end(lv, block, value)) return 0;
+
+ /* if multiple nodes in this block use the value, then we cannot decide
+ * whether the value will die here (because there is no schedule yet).
+ * Assume it does not die in this case. */
+ foreach_out_edge(value, edge) {
+ ir_node *user = get_edge_src_irn(edge);
+ if (user != here && get_nodes_block(user) == block) {
+ return 0;
+ }
+ }
+
+ return 1;
+}
/**
* Walker: mark those nodes that cannot be part of an address mode because
static void mark_non_address_nodes(ir_node *node, void *env)
{
int i, arity;
- ir_node *ptr;
- ir_node *mem;
ir_node *val;
ir_node *left;
ir_node *right;
+ ir_mode *mode;
(void) env;
+ mode = get_irn_mode(node);
+ if(!mode_is_int(mode) && !mode_is_reference(mode) && mode != mode_b)
+ return;
+
switch(get_irn_opcode(node)) {
case iro_Load:
- ptr = get_Load_ptr(node);
- mem = get_Load_mem(node);
-
- bitset_set(non_address_mode_nodes, get_irn_idx(mem));
+ /* Nothing to do. especially do not mark the pointer, because we want to
+ * turn it into AM. */
break;
case iro_Store:
+ /* Do not mark the pointer, because we want to turn it into AM. */
val = get_Store_value(node);
- ptr = get_Store_ptr(node);
- mem = get_Store_mem(node);
-
bitset_set(non_address_mode_nodes, get_irn_idx(val));
- bitset_set(non_address_mode_nodes, get_irn_idx(mem));
break;
+ case iro_Shl:
case iro_Add:
- left = get_Add_left(node);
- right = get_Add_right(node);
- /* if we can do source address mode then we will never fold the add
- * into address mode */
- if(!mode_is_float(get_irn_mode(node)) && (is_immediate_simple(right) ||
- (!use_source_address_mode(get_nodes_block(node), left, right)
- && !use_source_address_mode(get_nodes_block(node), right, left))))
- {
- break;
+ /* only 1 user: AM folding is always beneficial */
+ if(get_irn_n_edges(node) <= 1)
+ break;
+
+ /* for adds and shls with multiple users we use this heuristic:
+ * we do not fold them into address mode if their operands don't live
+ * out of the block, because in this case we will reduce register
+ * pressure. Otherwise we fold them in aggressively in the hope, that
+ * the node itself doesn't exist anymore and we were able to save the
+ * register for the result */
+ left = get_binop_left(node);
+ right = get_binop_right(node);
+
+ /* Fold AM if any of the two operands does not die here. This duplicates
+ * an addition and has the same register pressure for the case that only
+ * one operand dies, but is faster (on Pentium 4).
+ * && instead of || only folds AM if both operands do not die here */
+ if (!value_last_used_here(node, left) ||
+ !value_last_used_here(node, right)) {
+ return;
}
+
+ /* At least one of left and right are not used by anyone else, so it is
+ * beneficial for the register pressure (if both are unused otherwise,
+ * else neutral) and ALU use to not fold AM. */
bitset_set(non_address_mode_nodes, get_irn_idx(node));
- /* fallthrough */
+ break;
default:
arity = get_irn_arity(node);
}
}
-void calculate_non_address_mode_nodes(ir_graph *irg)
+void ia32_calculate_non_address_mode_nodes(be_irg_t *birg)
{
+ ir_graph *irg = be_get_birg_irg(birg);
+
+ lv = be_assure_liveness(birg);
non_address_mode_nodes = bitset_malloc(get_irg_last_idx(irg));
irg_walk_graph(irg, NULL, mark_non_address_nodes, NULL);
}
-void free_non_address_mode_nodes(void)
+void ia32_free_non_address_mode_nodes(void)
{
bitset_free(non_address_mode_nodes);
}
projects / libfirm / blobdiff