/*
- * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
+ * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
*
* This file is part of libFirm.
*
/* gas/ld don't support negative symconsts :-( */
#undef SUPPORT_NEGATIVE_SYMCONSTS
+static be_lv_t *lv;
static bitset_t *non_address_mode_nodes;
/**
/* Consts are typically immediates */
if (!tarval_is_long(get_Const_tarval(node))) {
#ifdef DEBUG_libfirm
- ir_fprintf(stderr, "Optimisation warning tarval of %+F(%+F) is not "
- "a long.\n", node, current_ir_graph);
+ ir_fprintf(stderr,
+ "Optimisation warning tarval of %+F(%+F) is not a long.\n",
+ node, current_ir_graph);
#endif
return 0;
}
return 1;
case iro_Add:
case iro_Sub:
- /* Add's and Sub's are typically supported as long as both operands are immediates */
+ /* Add's and Sub's are typically supported as long as both operands are
+ * immediates */
if(bitset_is_set(non_address_mode_nodes, get_irn_idx(node)))
return 0;
case iro_SymConst:
/* place the entity into the symconst */
if (addr->symconst_ent != NULL) {
- panic("Internal error: more than 1 symconst in address "
- "calculation");
+ panic("Internal error: more than 1 symconst in address calculation");
}
addr->symconst_ent = get_SymConst_entity(node);
#ifndef SUPPORT_NEGATIVE_SYMCONSTS
if(val < 0 || val > 3)
return 0;
if(val == 0) {
- ir_fprintf(stderr, "Optimisation warning: unoptimized Shl(,0) "
- "found\n");
+ ir_fprintf(stderr, "Optimisation warning: unoptimized Shl(,0) found\n");
}
shifted_val = get_Shl_left(node);
#endif
addr->scale = val;
- addr->index = eat_immediates(addr, shifted_val, 0);
+ addr->index = shifted_val;
return 1;
}
-/**
- * Returns non-zero if a value of a given mode can be stored in GP registers.
- */
-static INLINE int mode_needs_gp_reg(ir_mode *mode) {
- if(mode == mode_fpcw)
- return 0;
- if(get_mode_size_bits(mode) > 32)
- return 0;
- return mode_is_int(mode) || mode_is_reference(mode) || mode == mode_b;
-}
-
/* Create an address mode for a given node. */
void ia32_create_address_mode(ia32_address_t *addr, ir_node *node, int force)
{
}
/* starting point Add, Sub or Shl, FrameAddr */
- if(is_Shl(node)) { /* we don't want to eat add x, x as shl here, so only
- test for real Shl instructions */
+ if(is_Shl(node)) {
+ /* We don't want to eat add x, x as shl here, so only test for real Shl
+ * instructions, because we want the former as Lea x, x, not Shl x, 1 */
if(eat_shl(addr, node))
return;
} else if(is_immediate(addr, node, 0)) {
bitset_set(non_address_mode_nodes, get_irn_idx(node));
}
+static int value_last_used_here(ir_node *here, ir_node *value)
+{
+ ir_node *block = get_nodes_block(here);
+ const ir_edge_t *edge;
+
+ /* If the value is live end it is for sure it does not die here */
+ if (be_is_live_end(lv, block, value)) return 0;
+
+ /* if multiple nodes in this block use the value, then we cannot decide
+ * whether the value will die here (because there is no schedule yet).
+ * Assume it does not die in this case. */
+ foreach_out_edge(value, edge) {
+ ir_node *user = get_edge_src_irn(edge);
+ if (user != here && get_nodes_block(user) == block) {
+ return 0;
+ }
+ }
+
+ return 1;
+}
+
/**
* Walker: mark those nodes that cannot be part of an address mode because
- * there value must be access through an register
+ * their value must be accessed through a register
*/
static void mark_non_address_nodes(ir_node *node, void *env)
{
int i, arity;
- ir_node *ptr;
- ir_node *mem;
ir_node *val;
ir_node *left;
ir_node *right;
switch(get_irn_opcode(node)) {
case iro_Load:
- ptr = get_Load_ptr(node);
- mem = get_Load_mem(node);
-
- bitset_set(non_address_mode_nodes, get_irn_idx(mem));
+ /* Nothing to do. especially do not mark the pointer, because we want to
+ * turn it into AM. */
break;
case iro_Store:
+ /* Do not mark the pointer, because we want to turn it into AM. */
val = get_Store_value(node);
- ptr = get_Store_ptr(node);
- mem = get_Store_mem(node);
-
bitset_set(non_address_mode_nodes, get_irn_idx(val));
- bitset_set(non_address_mode_nodes, get_irn_idx(mem));
break;
+ case iro_Shl:
case iro_Add:
- left = get_Add_left(node);
- right = get_Add_right(node);
-#if 0
- /* if we can do source address mode then we will never fold the add
- * into address mode */
- if((is_immediate_simple(right)) ||
- (!ia32_use_source_address_mode(get_nodes_block(node), left, right)
- && !ia32_use_source_address_mode(get_nodes_block(node), right, left)))
- {
- break;
+ /* only 1 user: AM folding is always beneficial */
+ if(get_irn_n_edges(node) <= 1)
+ break;
+
+ /* for adds and shls with multiple users we use this heuristic:
+ * we do not fold them into address mode if their operands don't live
+ * out of the block, because in this case we will reduce register
+ * pressure. Otherwise we fold them in aggressively in the hope, that
+ * the node itself doesn't exist anymore and we were able to save the
+ * register for the result */
+ left = get_binop_left(node);
+ right = get_binop_right(node);
+
+ /* Fold AM if any of the two operands does not die here. This duplicates
+ * an addition and has the same register pressure for the case that only
+ * one operand dies, but is faster (on Pentium 4).
+ * && instead of || only folds AM if both operands do not die here */
+ if (!value_last_used_here(node, left) ||
+ !value_last_used_here(node, right)) {
+ return;
}
+
+ /* At least one of left and right are not used by anyone else, so it is
+ * beneficial for the register pressure (if both are unused otherwise,
+ * else neutral) and ALU use to not fold AM. */
bitset_set(non_address_mode_nodes, get_irn_idx(node));
-#else
break;
-#endif
- /* fallthrough */
default:
arity = get_irn_arity(node);
}
}
-void ia32_calculate_non_address_mode_nodes(ir_graph *irg)
+void ia32_calculate_non_address_mode_nodes(be_irg_t *birg)
{
+ ir_graph *irg = be_get_birg_irg(birg);
+
+ lv = be_assure_liveness(birg);
non_address_mode_nodes = bitset_malloc(get_irg_last_idx(irg));
irg_walk_graph(irg, NULL, mark_non_address_nodes, NULL);
projects / libfirm / blobdiff