#include "pmap.h"
#include "debug.h"
-#include "bearch_ia32.h"
#include "ia32_nodes_attr.h"
#include "set.h"
+#include "pdeq.h"
+
#include "../be.h"
+#include "../bemachine.h"
#ifdef NDEBUG
#define SET_IA32_ORIG_NODE(n, o)
typedef enum _ia32_optimize_t {
IA32_OPT_INCDEC = 1, /**< optimize add/sub 1/-1 to inc/dec */
IA32_OPT_DOAM = 2, /**< do address mode optimizations */
- IA32_OPT_LEA = 4, /**< optimize address caluclations into LEAs */
+ IA32_OPT_LEA = 4, /**< optimize address calculations into LEAs */
IA32_OPT_PLACECNST = 8, /**< place constants in the blocks where they are used */
IA32_OPT_IMMOPS = 16, /**< create operations with immediate operands */
- IA32_OPT_EXTBB = 32, /**< do extended basic block scheduling */
+ IA32_OPT_PUSHARGS = 32, /**< create pushs for function argument passing */
} ia32_optimize_t;
/**
/** Returns non-zero if the current floating point architecture is x87. */
#define USE_x87(cg) ((cg)->fp_kind == fp_x87)
+/** Sets the flag to enforce x87 simulation. */
+#define FORCE_x87(cg) ((cg)->force_sim = 1)
+
typedef struct _ia32_isa_t ia32_isa_t;
/**
const arch_env_t *arch_env; /**< the arch env */
set *reg_set; /**< set to memorize registers for non-ia32 nodes (e.g. phi nodes) */
ia32_isa_t *isa; /**< for fast access to the isa object */
- const be_irg_t *birg; /**< The be-irg (contains additional information about the irg) */
+ be_irg_t *birg; /**< The be-irg (contains additional information about the irg) */
ir_node **blk_sched; /**< an array containing the scheduled blocks */
- ia32_optimize_t opt; /**< contains optimization information */
- entity *fp_to_gp; /**< allocated entity for fp to gp conversion */
- entity *gp_to_fp; /**< allocated entity for gp to fp conversion */
- int arch; /**< instruction architecture */
- int opt_arch; /**< optimize for architecture */
- int fp_kind; /**< floating point kind */
- char used_fp; /**< which floating point unit used in this graph */
+ ia32_optimize_t opt; /**< contains optimization information */
+ int arch; /**< instruction architecture */
+ int opt_arch; /**< optimize for architecture */
+ char fp_kind; /**< floating point kind */
+ char used_fp; /**< which floating point unit used in this graph */
+ char force_sim; /**< set to 1 if x87 simulation should be enforced */
+ char dump; /**< set to 1 if graphs should be dumped */
+ ir_node *unknown_gp; /**< unique Unknown_GP node */
+ ir_node *unknown_vfp; /**< unique Unknown_VFP node */
+ ir_node *unknown_xmm; /**< unique Unknown_XMM node */
+ ir_node *noreg_gp; /**< unique NoReg_GP node */
+ ir_node *noreg_vfp; /**< unique NoReg_VFP node */
+ ir_node *noreg_xmm; /**< unique NoReg_XMM node */
+
+ ir_node ***initial_regs; /**< proj nodes that represent the initial register
+ values initial_regs[regclass][reg] */
+ struct obstack *obst;
+
DEBUG_ONLY(firm_dbg_module_t *mod;) /**< debugging module */
} ia32_code_gen_t;
* IA32 ISA object
*/
struct _ia32_isa_t {
- arch_isa_t arch_isa; /**< must be derived from arch_isa_t */
+ arch_isa_t arch_isa; /**< must be derived from arch_isa_t */
pmap *regs_16bit; /**< Contains the 16bits names of the gp registers */
pmap *regs_8bit; /**< Contains the 8bits names of the gp registers */
pmap *types; /**< A map of modes to primitive types */
pmap *tv_ent; /**< A map of entities that store const tarvals */
- ia32_optimize_t opt; /**< contains optimization information */
- int arch; /**< instruction architecture */
- int opt_arch; /**< optimize for architecture */
- int fp_kind; /**< floating point kind */
+ ia32_optimize_t opt; /**< contains optimization information */
+ int arch; /**< instruction architecture */
+ int opt_arch; /**< optimize for architecture */
+ int fp_kind; /**< floating point kind */
ia32_code_gen_t *cg; /**< the current code generator */
FILE *out; /**< output file */
+ const be_machine_t *cpu; /**< the abstract machine */
#ifndef NDEBUG
struct obstack *name_obst; /**< holds the original node names (for debugging) */
- unsigned long name_obst_size;
#endif /* NDEBUG */
};
ia32_code_gen_t *cg;
} ia32_irn_ops_t;
-/* this is a struct to minimize the number of parameters
- for transformation walker */
-typedef struct _ia32_transform_env_t {
- dbg_info *dbg; /**< The node debug info */
- ir_graph *irg; /**< The irg, the node should be created in */
- ir_node *block; /**< The block, the node should belong to */
- ir_node *irn; /**< The irn, to be transformed */
- ir_mode *mode; /**< The mode of the irn */
- ia32_code_gen_t *cg; /**< The code generator */
- DEBUG_ONLY(firm_dbg_module_t *mod;) /**< The firm debugger */
-} ia32_transform_env_t;
+typedef struct _ia32_intrinsic_env_t {
+ ir_graph *irg; /**< the irg, these entities belong to */
+ ir_entity *ll_div_op1; /**< entity for first div operand (move into FPU) */
+ ir_entity *ll_div_op2; /**< entity for second div operand (move into FPU) */
+ ir_entity *ll_d_conv; /**< entity for converts ll -> d */
+ ir_entity *d_ll_conv; /**< entity for converts d -> ll */
+} ia32_intrinsic_env_t;
/**
- * Creates the unique per irg GP NoReg node.
+ * Returns the unique per irg GP NoReg node.
*/
ir_node *ia32_new_NoReg_gp(ia32_code_gen_t *cg);
+ir_node *ia32_new_NoReg_xmm(ia32_code_gen_t *cg);
+ir_node *ia32_new_NoReg_vfp(ia32_code_gen_t *cg);
+
+/**
+ * Returns the uniqure per irg GP Unknown node.
+ * (warning: cse has to be activated)
+ */
+ir_node *ia32_new_Unknown_gp(ia32_code_gen_t *cg);
+ir_node *ia32_new_Unknown_xmm(ia32_code_gen_t *cg);
+ir_node *ia32_new_Unknown_vfp(ia32_code_gen_t *cg);
/**
- * Creates the unique per irg FP NoReg node.
+ * Returns the unique per irg FP NoReg node.
*/
ir_node *ia32_new_NoReg_fp(ia32_code_gen_t *cg);
+/**
+ * Returns gp_noreg or fp_noreg, depending on input requirements.
+ */
+ir_node *ia32_get_admissible_noreg(ia32_code_gen_t *cg, ir_node *irn, int pos);
+
+/**
+ * Maps all intrinsic calls that the backend support
+ * and map all instructions the backend did not support
+ * to runtime calls.
+ */
+void ia32_handle_intrinsics(void);
+
+/**
+ * Ia32 implementation.
+ *
+ * @param method the method type of the emulation function entity
+ * @param op the emulated ir_op
+ * @param imode the input mode of the emulated opcode
+ * @param omode the output mode of the emulated opcode
+ * @param context the context parameter
+ */
+ir_entity *ia32_create_intrinsic_fkt(ir_type *method, const ir_op *op,
+ const ir_mode *imode, const ir_mode *omode,
+ void *context);
+
#endif /* _BEARCH_IA32_T_H_ */
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