Marginally reduce the number of calls to arch_get_irn_reg_class().

[libfirm] / ir / be / ia32 / bearch_ia32_t.h

diff --git a/ir/be/ia32/bearch_ia32_t.h b/ir/be/ia32/bearch_ia32_t.h
index e7327c9..4f8889d 100644 (file)
--- a/ir/be/ia32/bearch_ia32_t.h
+++ b/ir/be/ia32/bearch_ia32_t.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 1995-2007 University of Karlsruhe.  All right reserved.
+ * Copyright (C) 1995-2008 University of Karlsruhe.  All right reserved.
  *
  * This file is part of libFirm.
  *
@@ -26,8 +26,7 @@
 #ifndef FIRM_BE_IA32_BEARCH_IA32_T_H
 #define FIRM_BE_IA32_BEARCH_IA32_T_H
 
-#include "firm_config.h"
-
+#include "config.h"
 #include "pmap.h"
 #include "debug.h"
 #include "ia32_nodes_attr.h"
@@ -60,30 +59,31 @@ typedef struct ia32_intrinsic_env_t  ia32_intrinsic_env_t;
 struct ia32_code_gen_t {
        const arch_code_generator_if_t *impl;          /**< implementation */
        ir_graph                       *irg;           /**< current irg */
-       const arch_env_t               *arch_env;      /**< the arch env */
        set                            *reg_set;       /**< set to memorize registers for non-ia32 nodes (e.g. phi nodes) */
        ia32_isa_t                     *isa;           /**< for fast access to the isa object */
        be_irg_t                       *birg;          /**< The be-irg (contains additional information about the irg) */
        ir_node                        **blk_sched;    /**< an array containing the scheduled blocks */
-       char                           do_x87_sim;     /**< set to 1 if x87 simulation should be enforced */
-       char                           dump;           /**< set to 1 if graphs should be dumped */
-       ir_node                       *unknown_gp;     /**< unique Unknown_GP node */
-       ir_node                       *unknown_vfp;    /**< unique Unknown_VFP node */
-       ir_node                       *unknown_xmm;    /**< unique Unknown_XMM node */
-       ir_node                       *noreg_gp;       /**< unique NoReg_GP node */
-       ir_node                       *noreg_vfp;      /**< unique NoReg_VFP node */
-       ir_node                       *noreg_xmm;      /**< unique NoReg_XMM node */
-
-       ir_node                       *fpu_trunc_mode; /**< truncate fpu mode */
-
-       struct obstack                *obst;
+       unsigned                       do_x87_sim:1;   /**< set to 1 if x87 simulation should be enforced */
+       unsigned                       dump:1;         /**< set to 1 if graphs should be dumped */
+       unsigned                       gprof:1;        /**< set to 1 grof profiling is in use */
+       ir_node                        *unknown_gp;     /**< unique Unknown_GP node */
+       ir_node                        *unknown_vfp;    /**< unique Unknown_VFP node */
+       ir_node                        *unknown_xmm;    /**< unique Unknown_XMM node */
+       ir_node                        *noreg_gp;       /**< unique NoReg_GP node */
+       ir_node                        *noreg_vfp;      /**< unique NoReg_VFP node */
+       ir_node                        *noreg_xmm;      /**< unique NoReg_XMM node */
+
+       ir_node                        *fpu_trunc_mode; /**< truncate fpu mode */
+       ir_node                        *get_eip;        /**< get eip node */
+
+       struct obstack                 *obst;
 };
 
 /**
  * IA32 ISA object
  */
 struct ia32_isa_t {
-       arch_isa_t            arch_isa;       /**< must be derived from arch_isa_t */
+       arch_env_t            arch_env;       /**< must be derived from arch_env_t */
        pmap                  *regs_16bit;    /**< Contains the 16bits names of the gp registers */
        pmap                  *regs_8bit;     /**< Contains the 8bits names of the gp registers */
        pmap                  *regs_8bit_high; /**< contains the hight part of the 8 bit names of the gp registers */
@@ -96,11 +96,6 @@ struct ia32_isa_t {
 #endif /* NDEBUG */
 };
 
-struct ia32_irn_ops_t {
-       const arch_irn_ops_if_t *impl;
-       ia32_code_gen_t         *cg;
-};
-
 /**
  * A helper type collecting needed info for IA32 intrinsic lowering.
  */
@@ -118,6 +113,22 @@ struct ia32_intrinsic_env_t {
        tarval     *u64_bias;     /**< bias value for conversion from float to unsigned 64 */
 };
 
+typedef enum transformer_t {
+       TRANSFORMER_DEFAULT,
+#ifdef FIRM_GRGEN_BE
+       TRANSFORMER_PBQP,
+       TRANSFORMER_RAND
+#endif
+} transformer_t;
+
+#ifdef FIRM_GRGEN_BE
+/** The selected transformer. */
+extern transformer_t be_transformer;
+
+#else
+#define be_transformer TRANSFORMER_DEFAULT
+#endif
+
 /** The mode for the floating point control word. */
 extern ir_mode *mode_fpcw;
 
@@ -145,9 +156,10 @@ ir_node *ia32_new_Unknown_vfp(ia32_code_gen_t *cg);
 ir_node *ia32_new_Fpu_truncate(ia32_code_gen_t *cg);
 
 /**
- * Returns gp_noreg or fp_noreg, depending on input requirements.
+ * Split instruction with source AM into Load and separate instruction.
+ * @return result of the Load
  */
-ir_node *ia32_get_admissible_noreg(ia32_code_gen_t *cg, ir_node *irn, int pos);
+ir_node *turn_back_am(ir_node *node);
 
 /**
  * Maps all intrinsic calls that the backend support