made code C89 compliant (changed unnamed union in attributes)

[libfirm] / ir / be / ia32 / bearch_ia32.c

diff --git a/ir/be/ia32/bearch_ia32.c b/ir/be/ia32/bearch_ia32.c
index 0c7f21b..e6d30c4 100644 (file)
--- a/ir/be/ia32/bearch_ia32.c
+++ b/ir/be/ia32/bearch_ia32.c
@@ -563,7 +563,10 @@ static void transform_to_Load(ia32_transform_env_t *env) {
        }
 
        if (mode_is_float(mode)) {
-               new_op = new_rd_ia32_fLoad(env->dbg, env->irg, env->block, ptr, noreg, mem, mode_T);
+               if (USE_SSE2(env->cg))
+                       new_op = new_rd_ia32_fLoad(env->dbg, env->irg, env->block, ptr, noreg, mem, mode_T);
+               else
+                       new_op = new_rd_ia32_vfld(env->dbg, env->irg, env->block, ptr, noreg, mem, mode_T);
        }
        else {
                new_op = new_rd_ia32_Load(env->dbg, env->irg, env->block, ptr, noreg, mem, mode_T);
@@ -613,7 +616,10 @@ static void transform_to_Store(ia32_transform_env_t *env) {
        }
 
        if (mode_is_float(mode)) {
-               new_op = new_rd_ia32_fStore(env->dbg, env->irg, env->block, ptr, noreg, val, nomem, mode_T);
+               if (USE_SSE2(env->cg))
+                       new_op = new_rd_ia32_fStore(env->dbg, env->irg, env->block, ptr, noreg, val, nomem, mode_T);
+               else
+                       new_op = new_rd_ia32_vfst(env->dbg, env->irg, env->block, ptr, noreg, val, nomem, mode_T);
        }
        else if (get_mode_size_bits(mode) == 8) {
                new_op = new_rd_ia32_Store8Bit(env->dbg, env->irg, env->block, ptr, noreg, val, nomem, mode_T);
@@ -629,7 +635,7 @@ static void transform_to_Store(ia32_transform_env_t *env) {
        set_ia32_frame_ent(new_op, ent);
        set_ia32_use_frame(new_op);
 
-       proj = new_rd_Proj(env->dbg, env->irg, env->block, new_op, mode, 0);
+       proj = new_rd_Proj(env->dbg, env->irg, env->block, new_op, mode_M, 0);
 
        if (sched_point) {
                sched_add_after(sched_point, new_op);
@@ -681,7 +687,7 @@ static void ia32_after_ra(void *self) {
        irg_walk_blkwise_graph(cg->irg, NULL, ia32_after_ra_walker, self);
 
        /* if we do x87 code generation, rewrite all the virtual instructions and registers */
-       if (USE_x87(cg)) {
+       if (cg->used_x87) {
                x87_simulate_graph(cg->arch_env, cg->irg, cg->blk_sched);
                be_dump(cg->irg, "-x87", dump_ir_extblock_graph_sched);
        }
@@ -745,11 +751,13 @@ static void *ia32_cg_init(FILE *F, const be_irg_t *birg) {
        cg->birg      = birg;
        cg->blk_sched = NULL;
        cg->fp_kind   = isa->fp_kind;
+       cg->used_x87  = 0;
+
        FIRM_DBG_REGISTER(cg->mod, "firm.be.ia32.cg");
 
        /* set optimizations */
        cg->opt.incdec    = 0;
-       cg->opt.doam      = USE_SSE2(cg) ? 1 : 0;
+       cg->opt.doam      = 1;
        cg->opt.placecnst = 1;
        cg->opt.immops    = 1;
        cg->opt.extbb     = 1;