remove old unused function

[libfirm] / ir / be / ia32 / bearch_ia32.c

diff --git a/ir/be/ia32/bearch_ia32.c b/ir/be/ia32/bearch_ia32.c
index d002ed2..ac2811c 100644 (file)
--- a/ir/be/ia32/bearch_ia32.c
+++ b/ir/be/ia32/bearch_ia32.c
@@ -23,9 +23,7 @@
  * @author      Christian Wuerdig
  * @version     $Id$
  */
-#ifdef HAVE_CONFIG_H
 #include "config.h"
-#endif
 
 #include "lc_opts.h"
 #include "lc_opts_enum.h"
@@ -132,7 +130,7 @@ static INLINE ir_node *create_const(ia32_code_gen_t *cg, ir_node **place,
 
        block = get_irg_start_block(cg->irg);
        res = func(NULL, cg->irg, block);
-       arch_set_irn_register(cg->arch_env, res, reg);
+       arch_set_irn_register(res, reg);
        *place = res;
 
        add_irn_dep(get_irg_end(cg->irg), res);
@@ -279,10 +277,8 @@ static void ia32_set_irn_reg(ir_node *irn, const arch_register_t *reg)
 static const arch_register_t *ia32_get_irn_reg(const ir_node *irn)
 {
        int pos = 0;
-       const arch_register_t *reg = NULL;
 
        if (is_Proj(irn)) {
-
                if (get_irn_mode(irn) == mode_X) {
                        return NULL;
                }
@@ -292,15 +288,12 @@ static const arch_register_t *ia32_get_irn_reg(const ir_node *irn)
        }
 
        if (is_ia32_irn(irn)) {
-               const arch_register_t **slots;
-               slots = get_ia32_slots(irn);
+               const arch_register_t **slots = get_ia32_slots(irn);
                assert(pos < get_ia32_n_res(irn));
-               reg   = slots[pos];
+               return slots[pos];
        } else {
-               reg = ia32_get_firm_reg(irn, cur_reg_set);
+               return ia32_get_firm_reg(irn, cur_reg_set);
        }
-
-       return reg;
 }
 
 static arch_irn_class_t ia32_classify(const ir_node *irn) {
@@ -452,7 +445,7 @@ static const arch_register_t *ia32_abi_prologue(void *self, ir_node **mem, pmap
                *mem    = new_r_Proj(irg, bl, push, mode_M, pn_ia32_Push_M);
 
                /* the push must have SP out register */
-               arch_set_irn_register(arch_env, curr_sp, arch_env->sp);
+               arch_set_irn_register(curr_sp, arch_env->sp);
                set_ia32_flags(push, arch_irn_flags_ignore);
 
                /* this modifies the stack bias, because we pushed 32bit */
@@ -461,13 +454,13 @@ static const arch_register_t *ia32_abi_prologue(void *self, ir_node **mem, pmap
                /* move esp to ebp */
                curr_bp  = be_new_Copy(arch_env->bp->reg_class, irg, bl, curr_sp);
                be_set_constr_single_reg(curr_bp, BE_OUT_POS(0), arch_env->bp);
-               arch_set_irn_register(arch_env, curr_bp, arch_env->bp);
+               arch_set_irn_register(curr_bp, arch_env->bp);
                be_node_set_flags(curr_bp, BE_OUT_POS(0), arch_irn_flags_ignore);
 
                /* beware: the copy must be done before any other sp use */
                curr_sp = be_new_CopyKeep_single(arch_env->sp->reg_class, irg, bl, curr_sp, curr_bp, get_irn_mode(curr_sp));
                be_set_constr_single_reg(curr_sp, BE_OUT_POS(0), arch_env->sp);
-               arch_set_irn_register(arch_env, curr_sp, arch_env->sp);
+               arch_set_irn_register(curr_sp, arch_env->sp);
                be_node_set_flags(curr_sp, BE_OUT_POS(0), arch_irn_flags_ignore);
 
                be_abi_reg_map_set(reg_map, arch_env->sp, curr_sp);
@@ -520,7 +513,7 @@ static void ia32_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_
 
                        /* copy ebp to esp */
                        curr_sp = be_new_Copy(&ia32_reg_classes[CLASS_ia32_gp], irg, bl, curr_bp);
-                       arch_set_irn_register(arch_env, curr_sp, arch_env->sp);
+                       arch_set_irn_register(curr_sp, arch_env->sp);
                        be_node_set_flags(curr_sp, BE_OUT_POS(0), arch_irn_flags_ignore);
 
                        /* pop ebp */
@@ -531,8 +524,8 @@ static void ia32_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_
 
                        *mem = new_r_Proj(irg, bl, pop, mode_M, pn_ia32_Pop_M);
                }
-               arch_set_irn_register(arch_env, curr_sp, arch_env->sp);
-               arch_set_irn_register(arch_env, curr_bp, arch_env->bp);
+               arch_set_irn_register(curr_sp, arch_env->sp);
+               arch_set_irn_register(curr_bp, arch_env->bp);
        }
 
        be_abi_reg_map_set(reg_map, arch_env->sp, curr_sp);
@@ -1199,8 +1192,8 @@ static void transform_to_Load(ia32_code_gen_t *cg, ir_node *node) {
        }
 
        /* copy the register from the old node to the new Load */
-       reg = arch_get_irn_register(cg->arch_env, node);
-       arch_set_irn_register(cg->arch_env, new_op, reg);
+       reg = arch_get_irn_register(node);
+       arch_set_irn_register(new_op, reg);
 
        SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(cg, node));
 
@@ -1309,7 +1302,8 @@ static ir_node *create_pop(ia32_code_gen_t *cg, ir_node *node, ir_node *schedpoi
        return pop;
 }
 
-static ir_node* create_spproj(ia32_code_gen_t *cg, ir_node *node, ir_node *pred, int pos) {
+static ir_node* create_spproj(ir_node *node, ir_node *pred, int pos)
+{
        ir_graph *irg = get_irn_irg(node);
        dbg_info *dbg = get_irn_dbg_info(node);
        ir_node *block = get_nodes_block(node);
@@ -1318,7 +1312,7 @@ static ir_node* create_spproj(ia32_code_gen_t *cg, ir_node *node, ir_node *pred,
        ir_node *sp;
 
        sp = new_rd_Proj(dbg, irg, block, pred, spmode, pos);
-       arch_set_irn_register(cg->arch_env, sp, spreg);
+       arch_set_irn_register(sp, spreg);
 
        return sp;
 }
@@ -1358,12 +1352,12 @@ static void transform_MemPerm(ia32_code_gen_t *cg, ir_node *node) {
                assert( (entsize == 4 || entsize == 8) && "spillslot on x86 should be 32 or 64 bit");
 
                push = create_push(cg, node, node, sp, mem, inent);
-               sp = create_spproj(cg, node, push, pn_ia32_Push_stack);
+               sp = create_spproj(node, push, pn_ia32_Push_stack);
                if(entsize == 8) {
                        /* add another push after the first one */
                        push = create_push(cg, node, node, sp, mem, inent);
                        add_ia32_am_offs_int(push, 4);
-                       sp = create_spproj(cg, node, push, pn_ia32_Push_stack);
+                       sp = create_spproj(node, push, pn_ia32_Push_stack);
                }
 
                set_irn_n(node, i, new_Bad());
@@ -1384,13 +1378,13 @@ static void transform_MemPerm(ia32_code_gen_t *cg, ir_node *node) {
                assert( (entsize == 4 || entsize == 8) && "spillslot on x86 should be 32 or 64 bit");
 
                pop = create_pop(cg, node, node, sp, outent);
-               sp = create_spproj(cg, node, pop, pn_ia32_Pop_stack);
+               sp = create_spproj(node, pop, pn_ia32_Pop_stack);
                if(entsize == 8) {
                        add_ia32_am_offs_int(pop, 4);
 
                        /* add another pop after the first one */
                        pop = create_pop(cg, node, node, sp, outent);
-                       sp = create_spproj(cg, node, pop, pn_ia32_Pop_stack);
+                       sp = create_spproj(node, pop, pn_ia32_Pop_stack);
                }
 
                pops[i] = pop;
@@ -1523,7 +1517,7 @@ static void ia32_finish(void *self) {
 
        /* we might have to rewrite x87 virtual registers */
        if (cg->do_x87_sim) {
-               x87_simulate_graph(cg->arch_env, cg->birg);
+               x87_simulate_graph(cg->birg);
        }
 
        /* do peephole optimisations */