Added test case for pbqp construction: There seems to be missing skip patterns, so...

[libfirm] / ir / be / ia32 / bearch_ia32.c

diff --git a/ir/be/ia32/bearch_ia32.c b/ir/be/ia32/bearch_ia32.c
index c071f54..93fd330 100644 (file)
--- a/ir/be/ia32/bearch_ia32.c
+++ b/ir/be/ia32/bearch_ia32.c
@@ -410,15 +410,16 @@ static void ia32_abi_dont_save_regs(void *self, pset *s)
 /**
  * Generate the routine prologue.
  *
- * @param self    The callback object.
- * @param mem     A pointer to the mem node. Update this if you define new memory.
- * @param reg_map A map mapping all callee_save/ignore/parameter registers to their defining nodes.
+ * @param self       The callback object.
+ * @param mem        A pointer to the mem node. Update this if you define new memory.
+ * @param reg_map    A map mapping all callee_save/ignore/parameter registers to their defining nodes.
+ * @param stack_bias Points to the current stack bias, can be modified if needed.
  *
- * @return        The register which shall be used as a stack frame base.
+ * @return           The register which shall be used as a stack frame base.
  *
  * All nodes which define registers in @p reg_map must keep @p reg_map current.
  */
-static const arch_register_t *ia32_abi_prologue(void *self, ir_node **mem, pmap *reg_map)
+static const arch_register_t *ia32_abi_prologue(void *self, ir_node **mem, pmap *reg_map, int *stack_bias)
 {
        ia32_abi_env_t   *env      = self;
        ia32_code_gen_t  *cg       = ia32_current_cg;
@@ -444,6 +445,9 @@ static const arch_register_t *ia32_abi_prologue(void *self, ir_node **mem, pmap
                arch_set_irn_register(arch_env, curr_sp, arch_env->sp);
                set_ia32_flags(push, arch_irn_flags_ignore);
 
+               /* this modifies the stack bias, because we pushed 32bit */
+               *stack_bias -= 4;
+
                /* move esp to ebp */
                curr_bp  = be_new_Copy(arch_env->bp->reg_class, irg, bl, curr_sp);
                be_set_constr_single_reg(curr_bp, BE_OUT_POS(0), arch_env->bp);
@@ -493,7 +497,7 @@ static void ia32_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_
                        ir_node *leave;
 
                        /* leave */
-                       leave   = new_rd_ia32_Leave(NULL, irg, bl, curr_sp, curr_bp);
+                       leave   = new_rd_ia32_Leave(NULL, irg, bl, curr_bp);
                        set_ia32_flags(leave, arch_irn_flags_ignore);
                        curr_bp = new_r_Proj(irg, bl, leave, mode_bp, pn_ia32_Leave_frame);
                        curr_sp = new_r_Proj(irg, bl, leave, get_irn_mode(curr_sp), pn_ia32_Leave_stack);
@@ -863,6 +867,7 @@ static void ia32_perform_memory_operand(ir_node *irn, ir_node *spill,
        set_irn_n(irn, n_ia32_base, get_irg_frame(get_irn_irg(irn)));
        set_irn_n(irn, n_ia32_binary_right, ia32_get_admissible_noreg(cg, irn, n_ia32_binary_right));
        set_irn_n(irn, n_ia32_mem, spill);
+       set_ia32_is_reload(irn);
 
        /* immediates are only allowed on the right side */
        if (i == n_ia32_binary_left && is_ia32_Immediate(get_irn_n(irn, n_ia32_binary_left))) {
@@ -966,14 +971,13 @@ static void ia32_prepare_graph(void *self) {
 
 #ifdef FIRM_GRGEN_BE
                case TRANSFORMER_PBQP:
+               case TRANSFORMER_RAND:
                        // disable CSE, because of two-step node-construction
                        set_opt_cse(0);
 
                        /* transform nodes into assembler instructions by PBQP magic */
                        ia32_transform_graph_by_pbqp(cg);
 
-                       if (cg->dump)
-                               be_dump(cg->irg, "-after_pbqp_transform", dump_ir_block_graph_sched);
                        set_opt_cse(1);
                        break;
 #endif
@@ -1433,7 +1437,11 @@ static void ia32_collect_frame_entity_nodes(ir_node *node, void *data)
                if (is_ia32_need_stackent(node) || is_ia32_Load(node)) {
                        const ir_mode     *mode  = get_ia32_ls_mode(node);
                        const ia32_attr_t *attr  = get_ia32_attr_const(node);
-                       int                align = get_mode_size_bytes(mode);
+                       int                align;
+
+                       if (is_ia32_is_reload(node)) {
+                               mode = get_spill_mode_mode(mode);
+                       }
 
                        if(attr->data.need_64bit_stackent) {
                                mode = mode_Ls;
@@ -1441,6 +1449,7 @@ static void ia32_collect_frame_entity_nodes(ir_node *node, void *data)
                        if(attr->data.need_32bit_stackent) {
                                mode = mode_Is;
                        }
+                       align = get_mode_size_bytes(mode);
                        be_node_needs_frame_entity(env, node, mode, align);
                } else if (is_ia32_vfild(node) || is_ia32_xLoad(node)
                           || is_ia32_vfld(node)) {
@@ -1652,7 +1661,7 @@ static ia32_isa_t ia32_isa_template = {
                &ia32_gp_regs[REG_ESP],  /* stack pointer register */
                &ia32_gp_regs[REG_EBP],  /* base pointer register */
                -1,                      /* stack direction */
-               4,                       /* power of two stack alignment, 2^4 == 16 */
+               2,                       /* power of two stack alignment, 2^2 == 4 */
                NULL,                    /* main environment */
                7,                       /* costs for a spill instruction */
                5,                       /* costs for a reload instruction */
@@ -2319,6 +2328,7 @@ static const lc_opt_enum_int_items_t transformer_items[] = {
        { "default", TRANSFORMER_DEFAULT },
 #ifdef FIRM_GRGEN_BE
        { "pbqp",    TRANSFORMER_PBQP    },
+       { "random",  TRANSFORMER_RAND    },
 #endif
        { NULL,      0                   }
 };