}
}
else {
- /* treat Phi like Const with default requirements */
- if (is_Phi(irn)) {
- DB((mod, LEVEL_1, "returning standard reqs for %+F\n", irn));
+ /* treat Unknowns like Const with default requirements */
+ if (is_Unknown(irn)) {
+ DB((mod, LEVEL_1, "returning UKNWN reqs for %+F\n", irn));
if (mode_is_float(mode)) {
if (USE_SSE2(ops->cg))
- memcpy(req, &(ia32_default_req_ia32_xmm.req), sizeof(*req));
+ memcpy(req, &(ia32_default_req_ia32_xmm_xmm_UKNWN), sizeof(*req));
else
- memcpy(req, &(ia32_default_req_ia32_vfp.req), sizeof(*req));
+ memcpy(req, &(ia32_default_req_ia32_vfp_vfp_UKNWN), sizeof(*req));
}
else if (mode_is_int(mode) || mode_is_reference(mode))
- memcpy(req, &(ia32_default_req_ia32_gp.req), sizeof(*req));
+ memcpy(req, &(ia32_default_req_ia32_gp_gp_UKNWN), sizeof(*req));
else if (mode == mode_T || mode == mode_M) {
- DBG((mod, LEVEL_1, "ignoring Phi node %+F\n", irn));
+ DBG((mod, LEVEL_1, "ignoring Unknown node %+F\n", irn));
return NULL;
}
else
- assert(0 && "unsupported Phi-Mode");
+ assert(0 && "unsupported Unknown-Mode");
}
else {
DB((mod, LEVEL_1, "returning NULL for %+F (not ia32)\n", irn));
if (is_ia32_irn(irn))
return get_ia32_flags(irn);
else {
+ if (is_Unknown(irn))
+ return arch_irn_flags_ignore;
return 0;
}
}
ir_node *bl = get_irg_start_block(env->irg);
ir_node *curr_sp = be_abi_reg_map_get(reg_map, env->isa->sp);
ir_node *curr_bp = be_abi_reg_map_get(reg_map, env->isa->bp);
- ir_node *curr_no_reg = be_abi_reg_map_get(reg_map, &ia32_gp_regs[REG_GP_NOREG]);
- ir_node *store_bp;
+ ir_node *push;
/* push ebp */
- curr_sp = be_new_IncSP(env->isa->sp, env->irg, bl, curr_sp, *mem, reg_size, be_stack_dir_expand);
- store_bp = new_rd_ia32_Store(NULL, env->irg, bl, curr_sp, curr_no_reg, curr_bp, *mem, mode_T);
- set_ia32_am_support(store_bp, ia32_am_Dest);
- set_ia32_am_flavour(store_bp, ia32_B);
- set_ia32_op_type(store_bp, ia32_AddrModeD);
- set_ia32_ls_mode(store_bp, env->isa->bp->reg_class->mode);
- *mem = new_r_Proj(env->irg, bl, store_bp, mode_M, 0);
+ push = new_rd_ia32_Push(NULL, env->irg, bl, curr_sp, curr_bp, *mem, mode_T);
+ curr_sp = new_r_Proj(env->irg, bl, push, get_irn_mode(curr_sp), 0);
+ *mem = new_r_Proj(env->irg, bl, push, mode_M, 1);
+
+ /* the push must have SP out register */
+ arch_set_irn_register(env->aenv, curr_sp, env->isa->sp);
/* move esp to ebp */
curr_bp = be_new_Copy(env->isa->bp->reg_class, env->irg, bl, curr_sp);
arch_set_irn_register(env->aenv, curr_bp, env->isa->bp);
be_node_set_flags(curr_bp, BE_OUT_POS(0), arch_irn_flags_ignore);
+ /* beware: the copy must be done before any other sp use */
+ curr_sp = be_new_CopyKeep_single(env->isa->sp->reg_class, env->irg, bl, curr_sp, curr_bp, get_irn_mode(curr_sp));
+ be_set_constr_single_reg(curr_sp, BE_OUT_POS(0), env->isa->sp);
+ arch_set_irn_register(env->aenv, curr_sp, env->isa->sp);
+ be_node_set_flags(curr_sp, BE_OUT_POS(0), arch_irn_flags_ignore);
+
be_abi_reg_map_set(reg_map, env->isa->sp, curr_sp);
be_abi_reg_map_set(reg_map, env->isa->bp, curr_bp);
ia32_abi_env_t *env = self;
ir_node *curr_sp = be_abi_reg_map_get(reg_map, env->isa->sp);
ir_node *curr_bp = be_abi_reg_map_get(reg_map, env->isa->bp);
- ir_node *curr_no_reg = be_abi_reg_map_get(reg_map, &ia32_gp_regs[REG_GP_NOREG]);
if (env->flags.try_omit_fp) {
/* simply remove the stack frame here */
curr_sp = be_new_IncSP(env->isa->sp, env->irg, bl, curr_sp, *mem, BE_STACK_FRAME_SIZE, be_stack_dir_shrink);
}
-
else {
- ir_node *load_bp;
+ ir_node *pop;
ir_mode *mode_bp = env->isa->bp->reg_class->mode;
int reg_size = get_mode_size_bytes(env->isa->bp->reg_class->mode);
curr_sp = be_new_SetSP(env->isa->sp, env->irg, bl, curr_sp, curr_bp, *mem);
/* pop ebp */
- load_bp = new_rd_ia32_Load(NULL, env->irg, bl, curr_sp, curr_no_reg, *mem, mode_T);
- set_ia32_am_support(load_bp, ia32_am_Source);
- set_ia32_am_flavour(load_bp, ia32_B);
- set_ia32_op_type(load_bp, ia32_AddrModeS);
- set_ia32_ls_mode(load_bp, mode_bp);
- curr_bp = new_r_Proj(env->irg, bl, load_bp, mode_bp, 0);
- *mem = new_r_Proj(env->irg, bl, load_bp, mode_M, 1);
+ pop = new_rd_ia32_Pop(NULL, env->irg, bl, curr_sp, *mem, mode_T);
+ set_ia32_flags(pop, arch_irn_flags_ignore);
+ curr_bp = new_r_Proj(current_ir_graph, bl, pop, mode_bp, 0);
+ curr_sp = new_r_Proj(current_ir_graph, bl, pop, get_irn_mode(curr_sp), 1);
+ *mem = new_r_Proj(current_ir_graph, bl, pop, mode_M, 2);
+ arch_set_irn_register(env->aenv, curr_sp, env->isa->sp);
arch_set_irn_register(env->aenv, curr_bp, env->isa->bp);
-
- curr_sp = be_new_IncSP(env->isa->sp, env->irg, bl, curr_sp, *mem, reg_size, be_stack_dir_shrink);
}
be_abi_reg_map_set(reg_map, env->isa->sp, curr_sp);
block = get_nodes_block(irn);
/* check all OUT requirements, if there is a should_be_same */
- if (op_tp == ia32_Normal && ! is_ia32_Lea(irn)) {
+ if (op_tp == ia32_Normal && ! is_ia32_Lea(irn) && ! is_ia32_Conv_I2I(irn) && ! is_ia32_Conv_I2I8Bit(irn)) {
for (i = 0; i < n_res; i++) {
if (arch_register_req_is(&(reqs[i]->req), should_be_same)) {
/* get in and out register */
out_reg = get_ia32_out_reg(irn, i);
in_node = get_irn_n(irn, reqs[i]->same_pos);
in_reg = arch_get_irn_register(cg->arch_env, in_node);
- in2_node = get_irn_n(irn, reqs[i]->same_pos ^ 1);
- in2_reg = arch_get_irn_register(cg->arch_env, in2_node);
/* don't copy ignore nodes */
if (arch_irn_is(cg->arch_env, in_node, ignore) && is_Proj(in_node))
/* check if in and out register are equal */
if (! REGS_ARE_EQUAL(out_reg, in_reg)) {
/* in case of a commutative op: just exchange the in's */
- if (is_ia32_commutative(irn) && REGS_ARE_EQUAL(out_reg, in2_reg)) {
- set_irn_n(irn, reqs[i]->same_pos, in2_node);
- set_irn_n(irn, reqs[i]->same_pos ^ 1, in_node);
+ /* beware: the current op could be everything, so test for ia32 */
+ /* commutativity first before getting the second in */
+ if (is_ia32_commutative(irn)) {
+ in2_node = get_irn_n(irn, reqs[i]->same_pos ^ 1);
+ in2_reg = arch_get_irn_register(cg->arch_env, in2_node);
+
+ if (REGS_ARE_EQUAL(out_reg, in2_reg)) {
+ set_irn_n(irn, reqs[i]->same_pos, in2_node);
+ set_irn_n(irn, reqs[i]->same_pos ^ 1, in_node);
+ }
+ else
+ goto insert_copy;
}
else {
+insert_copy:
DBG((cg->mod, LEVEL_1, "inserting copy for %+F in_pos %d\n", irn, reqs[i]->same_pos));
/* create copy from in register */
copy = be_new_Copy(arch_register_get_class(in_reg), cg->irg, block, in_node);
}
#endif /* NDEBUG */
- isa->num_codegens++;
-
- if (isa->num_codegens > 1)
- cg->emit_decls = 0;
- else
- cg->emit_decls = 1;
-
cur_reg_set = cg->reg_set;
ia32_irn_ops.cg = cg;
* arguments.
*/
static ia32_isa_t ia32_isa_template = {
- &ia32_isa_if, /* isa interface implementation */
- &ia32_gp_regs[REG_ESP], /* stack pointer register */
- &ia32_gp_regs[REG_EBP], /* base pointer register */
- -1, /* stack direction */
- 0, /* number of code generator objects so far */
+ {
+ &ia32_isa_if, /* isa interface implementation */
+ &ia32_gp_regs[REG_ESP], /* stack pointer register */
+ &ia32_gp_regs[REG_EBP], /* base pointer register */
+ -1, /* stack direction */
+ },
NULL, /* 16bit register names */
NULL, /* 8bit register names */
NULL, /* types */
projects / libfirm / blobdiff