#undef is_Start
#define is_Start(irn) (get_irn_opcode(irn) == iro_Start)
+/* Creates the unique per irg GP NoReg node. */
ir_node *ia32_new_NoReg_gp(ia32_code_gen_t *cg) {
return be_abi_get_callee_save_irn(cg->birg->abi, &ia32_gp_regs[REG_GP_NOREG]);
}
+/* Creates the unique per irg FP NoReg node. */
ir_node *ia32_new_NoReg_fp(ia32_code_gen_t *cg) {
return be_abi_get_callee_save_irn(cg->birg->abi,
USE_SSE2(cg) ? &ia32_xmm_regs[REG_XMM_NOREG] : &ia32_vfp_regs[REG_VFP_NOREG]);
typedef struct {
be_abi_call_flags_bits_t flags;
const arch_isa_t *isa;
+ const arch_env_t *aenv;
ir_graph *irg;
} ia32_abi_env_t;
be_abi_call_flags_t fl = be_abi_call_get_flags(call);
env->flags = fl.bits;
env->irg = irg;
+ env->aenv = aenv;
env->isa = aenv->isa;
return env;
}
pset_insert_ptr(s, env->isa->bp);
}
+/**
+ * Generate the prologue.
+ * @param self The callback object.
+ * @param mem A pointer to the mem node. Update this if you define new memory.
+ * @param reg_map A mapping mapping all callee_save/ignore/parameter registers to their defining nodes.
+ * @return The register which shall be used as a stack frame base.
+ *
+ * All nodes which define registers in @p reg_map must keep @p reg_map current.
+ */
static const arch_register_t *ia32_abi_prologue(void *self, ir_node **mem, pmap *reg_map)
{
ia32_abi_env_t *env = self;
- const arch_register_t *frame_reg = env->isa->sp;
- if(!env->flags.try_omit_fp) {
+ if (!env->flags.try_omit_fp) {
int reg_size = get_mode_size_bytes(env->isa->bp->reg_class->mode);
ir_node *bl = get_irg_start_block(env->irg);
ir_node *curr_sp = be_abi_reg_map_get(reg_map, env->isa->sp);
ir_node *curr_no_reg = be_abi_reg_map_get(reg_map, &ia32_gp_regs[REG_GP_NOREG]);
ir_node *store_bp;
+ /* push ebp */
curr_sp = be_new_IncSP(env->isa->sp, env->irg, bl, curr_sp, *mem, reg_size, be_stack_dir_expand);
store_bp = new_rd_ia32_Store(NULL, env->irg, bl, curr_sp, curr_no_reg, curr_bp, *mem, mode_T);
set_ia32_am_support(store_bp, ia32_am_Dest);
set_ia32_am_flavour(store_bp, ia32_B);
set_ia32_op_type(store_bp, ia32_AddrModeD);
+ set_ia32_ls_mode(store_bp, env->isa->bp->reg_class->mode);
*mem = new_r_Proj(env->irg, bl, store_bp, mode_M, 0);
+
+ /* move esp to ebp */
curr_bp = be_new_Copy(env->isa->bp->reg_class, env->irg, bl, curr_sp);
be_set_constr_single_reg(curr_bp, BE_OUT_POS(0), env->isa->bp);
- be_node_set_flags(curr_bp, BE_OUT_POS(0), arch_irn_flags_ignore);
+ arch_set_irn_register(env->aenv, curr_bp, env->isa->bp);
+ be_node_set_flags(curr_bp, BE_OUT_POS(0), arch_irn_flags_dont_spill);
be_abi_reg_map_set(reg_map, env->isa->sp, curr_sp);
be_abi_reg_map_set(reg_map, env->isa->bp, curr_bp);
+
+ return env->isa->bp;
}
- return frame_reg;
+ return env->isa->sp;
}
static void ia32_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_map)
{
- ia32_abi_env_t *env = self;
+ ia32_abi_env_t *env = self;
ir_node *curr_sp = be_abi_reg_map_get(reg_map, env->isa->sp);
ir_node *curr_bp = be_abi_reg_map_get(reg_map, env->isa->bp);
ir_node *curr_no_reg = be_abi_reg_map_get(reg_map, &ia32_gp_regs[REG_GP_NOREG]);
- if(env->flags.try_omit_fp) {
+ if (env->flags.try_omit_fp) {
+ /* simply remove the stack frame here */
curr_sp = be_new_IncSP(env->isa->sp, env->irg, bl, curr_sp, *mem, BE_STACK_FRAME_SIZE, be_stack_dir_shrink);
}
else {
ir_node *load_bp;
ir_mode *mode_bp = env->isa->bp->reg_class->mode;
+ int reg_size = get_mode_size_bytes(env->isa->bp->reg_class->mode);
+ /* copy ebp to esp */
curr_sp = be_new_SetSP(env->isa->sp, env->irg, bl, curr_sp, curr_bp, *mem);
+
+ /* pop ebp */
load_bp = new_rd_ia32_Load(NULL, env->irg, bl, curr_sp, curr_no_reg, *mem, mode_T);
set_ia32_am_support(load_bp, ia32_am_Source);
set_ia32_am_flavour(load_bp, ia32_B);
set_ia32_ls_mode(load_bp, mode_bp);
curr_bp = new_r_Proj(env->irg, bl, load_bp, mode_bp, 0);
*mem = new_r_Proj(env->irg, bl, load_bp, mode_M, 1);
+ arch_set_irn_register(env->aenv, curr_bp, env->isa->bp);
+
+ curr_sp = be_new_IncSP(env->isa->sp, env->irg, bl, curr_sp, *mem, reg_size, be_stack_dir_shrink);
}
be_abi_reg_map_set(reg_map, env->isa->sp, curr_sp);
irg_walk_blkwise_graph(cg->irg, ia32_place_consts_set_modes, ia32_transform_node, cg);
be_dump(cg->irg, "-transformed", dump_ir_block_graph_sched);
- DEBUG_ONLY(cg->mod = old_mod;)
-
if (cg->opt.doam) {
edges_deactivate(cg->irg);
//dead_node_elimination(cg->irg);
edges_activate(cg->irg);
+ FIRM_DBG_REGISTER(cg->mod, "firm.be.ia32.am");
+
irg_walk_blkwise_graph(cg->irg, NULL, ia32_optimize_am, cg);
be_dump(cg->irg, "-am", dump_ir_block_graph_sched);
}
+
+ DEBUG_ONLY(cg->mod = old_mod;)
}
* is not fulfilled.
* Transform Sub into Neg -- Add if IN2 == OUT
*/
-static void ia32_finish_irg_walker(ir_node *irn, void *env) {
+static void ia32_finish_node(ir_node *irn, void *env) {
ia32_code_gen_t *cg = env;
const ia32_register_req_t **reqs;
const arch_register_t *out_reg, *in_reg, *in2_reg;
/* AM Dest nodes don't produce any values */
op_tp = get_ia32_op_type(irn);
if (op_tp == ia32_AddrModeD)
- return;
+ goto end;
reqs = get_ia32_out_req_all(irn);
n_res = get_ia32_n_res(irn);
/* transform a LEA into an Add if possible */
ia32_transform_lea_to_add(irn, cg);
}
+end:
/* check for peephole optimization */
ia32_peephole_optimization(irn, cg);
}
+static void ia32_finish_irg_walker(ir_node *block, void *env) {
+ ir_node *irn, *next;
+
+ for (irn = sched_first(block); !sched_is_end(irn); irn = next) {
+ next = sched_next(irn);
+ ia32_finish_node(irn, env);
+ }
+}
+
/**
* Add Copy nodes for not fulfilled should_be_equal constraints
*/
static void ia32_finish_irg(ir_graph *irg, ia32_code_gen_t *cg) {
- irg_walk_blkwise_graph(irg, NULL, ia32_finish_irg_walker, cg);
+ irg_block_walk_graph(irg, NULL, ia32_finish_irg_walker, cg);
}
irg_block_walk_graph(cg->irg, NULL, ia32_after_ra_walker, self);
/* if we do x87 code generation, rewrite all the virtual instructions and registers */
- if (cg->used_x87) {
+ if (cg->used_fp == fp_x87) {
x87_simulate_graph(cg->arch_env, cg->irg, cg->blk_sched);
}
}
static void ia32_codegen(void *self) {
ia32_code_gen_t *cg = self;
ir_graph *irg = cg->irg;
- FILE *out = cg->out;
-
- if (cg->emit_decls) {
- ia32_gen_decls(cg->out);
- cg->emit_decls = 0;
- }
ia32_finish_irg(irg, cg);
be_dump(irg, "-finished", dump_ir_block_graph_sched);
- ia32_gen_routine(out, irg, cg);
+ ia32_gen_routine(cg->isa->out, irg, cg);
cur_reg_set = NULL;
- pmap_destroy(cg->tv_ent);
- pmap_destroy(cg->types);
+ /* remove it from the isa */
+ cg->isa->cg = NULL;
/* de-allocate code generator */
del_set(cg->reg_set);
free(self);
+
}
-static void *ia32_cg_init(FILE *F, const be_irg_t *birg);
+static void *ia32_cg_init(const be_irg_t *birg);
static const arch_code_generator_if_t ia32_code_gen_if = {
ia32_cg_init,
};
/**
- * Initializes the code generator.
+ * Initializes a IA32 code generator.
*/
-static void *ia32_cg_init(FILE *F, const be_irg_t *birg) {
+static void *ia32_cg_init(const be_irg_t *birg) {
ia32_isa_t *isa = (ia32_isa_t *)birg->main_env->arch_env->isa;
ia32_code_gen_t *cg = xcalloc(1, sizeof(*cg));
cg->impl = &ia32_code_gen_if;
cg->irg = birg->irg;
cg->reg_set = new_set(ia32_cmp_irn_reg_assoc, 1024);
- cg->out = F;
cg->arch_env = birg->main_env->arch_env;
- cg->types = pmap_create();
- cg->tv_ent = pmap_create();
+ cg->isa = isa;
cg->birg = birg;
cg->blk_sched = NULL;
cg->fp_kind = isa->fp_kind;
- cg->used_x87 = 0;
+ cg->used_fp = fp_none;
FIRM_DBG_REGISTER(cg->mod, "firm.be.ia32.cg");
cg->opt.immops = 1;
cg->opt.extbb = 1;
+ /* enter it */
+ isa->cg = cg;
+
#ifndef NDEBUG
if (isa->name_obst_size) {
//printf("freed %d bytes from name obst\n", isa->name_obst_size);
*
*****************************************************************/
+/**
+ * The template that generates a new ISA object.
+ * Note that this template can be changed by command line
+ * arguments.
+ */
static ia32_isa_t ia32_isa_template = {
&ia32_isa_if, /* isa interface implementation */
&ia32_gp_regs[REG_ESP], /* stack pointer register */
0, /* number of code generator objects so far */
NULL, /* 16bit register names */
NULL, /* 8bit register names */
+ NULL, /* types */
+ NULL, /* tv_ents */
arch_pentium_4, /* instruction architecture */
arch_pentium_4, /* optimize for architecture */
fp_sse2, /* use sse2 unit */
+ NULL, /* current code generator */
#ifndef NDEBUG
NULL, /* name obstack */
0 /* name obst size */
/**
* Initializes the backend ISA.
*/
-static void *ia32_init(void) {
+static void *ia32_init(FILE *file_handle) {
static int inited = 0;
ia32_isa_t *isa;
- if(inited)
+ if (inited)
return NULL;
- isa = xcalloc(1, sizeof(*isa));
+ isa = xmalloc(sizeof(*isa));
memcpy(isa, &ia32_isa_template, sizeof(*isa));
ia32_register_init(isa);
isa->regs_16bit = pmap_create();
isa->regs_8bit = pmap_create();
+ isa->types = pmap_create();
+ isa->tv_ent = pmap_create();
+ isa->out = file_handle;
ia32_build_16bit_reg_map(isa->regs_16bit);
ia32_build_8bit_reg_map(isa->regs_8bit);
+ /* patch register names of x87 registers */
+ if (USE_x87(isa)) {
+ ia32_st_regs[0].name = "st";
+ ia32_st_regs[1].name = "st(1)";
+ ia32_st_regs[2].name = "st(2)";
+ ia32_st_regs[3].name = "st(3)";
+ ia32_st_regs[4].name = "st(4)";
+ ia32_st_regs[5].name = "st(5)";
+ ia32_st_regs[6].name = "st(6)";
+ ia32_st_regs[7].name = "st(7)";
+ }
+
#ifndef NDEBUG
- isa->name_obst = xcalloc(1, sizeof(*(isa->name_obst)));
+ isa->name_obst = xmalloc(sizeof(*isa->name_obst));
obstack_init(isa->name_obst);
isa->name_obst_size = 0;
#endif /* NDEBUG */
+ fprintf(isa->out, "\t.intel_syntax\n");
+
inited = 1;
return isa;
static void ia32_done(void *self) {
ia32_isa_t *isa = self;
+ /* emit now all global declarations */
+ ia32_gen_decls(isa->out);
+
pmap_destroy(isa->regs_16bit);
pmap_destroy(isa->regs_8bit);
+ pmap_destroy(isa->tv_ent);
+ pmap_destroy(isa->types);
#ifndef NDEBUG
//printf("name obst size = %d bytes\n", isa->name_obst_size);
* We report always these:
* - the general purpose registers
* - the floating point register set (depending on the unit used for FP)
- * - MMX/SE registers (currently not supported)
+ * - MMX/SSE registers (currently not supported)
*/
static int ia32_get_n_reg_class(const void *self) {
return 2;
int i, ignore_1, ignore_2;
ir_mode **modes;
const arch_register_t *reg;
- be_abi_call_flags_t call_flags;
+ be_abi_call_flags_t call_flags = be_abi_call_get_flags(abi);
/* set abi flags for calls */
- call_flags.bits.left_to_right = 0;
- call_flags.bits.store_args_sequential = 0;
- call_flags.bits.try_omit_fp = 1;
- call_flags.bits.fp_free = 0;
- call_flags.bits.call_has_imm = 1;
+ call_flags.bits.left_to_right = 0; /* always last arg first on stack */
+ call_flags.bits.store_args_sequential = 0; /* use stores instead of push */
+ /* call_flags.bits.try_omit_fp not changed: can handle both settings */
+ call_flags.bits.fp_free = 0; /* the frame pointer is fixed in IA32 */
+ call_flags.bits.call_has_imm = 1; /* IA32 calls can have immediate address */
/* set stack parameter passing style */
be_abi_call_set_flags(abi, call_flags, &ia32_abi_callbacks);
{ "pentiumpro", arch_pentium_pro, },
{ "686", arch_pentium_pro, },
{ "pentiummmx", arch_pentium_mmx, },
- { "pentiummmx", arch_pentium_mmx, },
{ "pentium2", arch_pentium_2, },
{ "p2", arch_pentium_2, },
{ "pentium3", arch_pentium_3, },
projects / libfirm / blobdiff