ir_mode *mode_fpcw = NULL;
ia32_code_gen_t *ia32_current_cg = NULL;
+/**
+ * The environment for the intrinsic mapping.
+ */
+static ia32_intrinsic_env_t intrinsic_env = {
+ NULL, /* the isa */
+ NULL, /* the irg, these entities belong to */
+ NULL, /* entity for first div operand (move into FPU) */
+ NULL, /* entity for second div operand (move into FPU) */
+ NULL, /* entity for converts ll -> d */
+ NULL, /* entity for converts d -> ll */
+ NULL, /* entity for __divdi3 library call */
+ NULL, /* entity for __moddi3 library call */
+ NULL, /* entity for __udivdi3 library call */
+ NULL, /* entity for __umoddi3 library call */
+ NULL, /* bias value for conversion from float to unsigned 64 */
+};
+
+
typedef ir_node *(*create_const_node_func) (dbg_info *dbg, ir_graph *irg, ir_node *block);
static INLINE ir_node *create_const(ia32_code_gen_t *cg, ir_node **place,
* |___/
**************************************************/
+static void ia32_before_abi(void *self) {
+ ia32_code_gen_t *cg = self;
+
+ ir_lower_mode_b(cg->irg, mode_Iu, 0);
+ if(cg->dump)
+ be_dump(cg->irg, "-lower_modeb", dump_ir_block_graph_sched);
+}
+
/**
* Transforms the standard firm graph into
* an ia32 firm graph
static void ia32_prepare_graph(void *self) {
ia32_code_gen_t *cg = self;
- ir_lower_mode_b(cg->irg, mode_Iu, 0);
/* do local optimisations */
optimize_graph_df(cg->irg);
+
+ /* TODO: we often have dead code reachable through out-edges here. So for
+ * now we rebuild edges (as we need correct user count for code selection)
+ */
+#if 1
+ edges_deactivate(cg->irg);
+ edges_activate(cg->irg);
+#endif
+
if(cg->dump)
- be_dump(cg->irg, "-lower_modeb", dump_ir_block_graph_sched);
+ be_dump(cg->irg, "-pre_transform", dump_ir_block_graph_sched);
/* transform nodes into assembler instructions */
ia32_transform_graph(cg);
if (cg->dump)
be_dump(cg->irg, "-am", dump_ir_block_graph_sched);
- /* do code placement, to optimize the position of constants */
+ /* do code placement, (optimize position of constants and argument loads) */
place_code(cg->irg);
if (cg->dump)
ir_graph *irg = current_ir_graph;
dbg_info *dbgi = get_irn_dbg_info(node);
ir_node *block = get_nodes_block(node);
- ir_node *base = get_irn_n(node, 0);
- ir_node *index = get_irn_n(node, 1);
- ir_node *mem;
+ ir_node *base = get_irn_n(node, n_ia32_base);
+ ir_node *index = get_irn_n(node, n_ia32_index);
+ ir_node *mem = get_irn_n(node, n_ia32_mem);
ir_node *load;
ir_node *load_res;
ir_node *mem_proj;
ir_fprintf(stderr, "truning back AM in %+F\n", node);
- if(get_ia32_am_arity(node) == ia32_am_unary) {
- mem = get_irn_n(node, 3);
- } else if(get_ia32_am_arity(node) == ia32_am_binary) {
- mem = get_irn_n(node, 4);
- } else {
- assert(get_ia32_am_arity(node) == ia32_am_ternary);
- mem = get_irn_n(node, 5);
- }
-
load = new_rd_ia32_Load(dbgi, irg, block, base, index, mem);
load_res = new_rd_Proj(dbgi, irg, block, load, mode_Iu, pn_ia32_Load_res);
ia32_copy_am_attrs(load, node);
+ set_irn_n(node, n_ia32_mem, new_NoMem());
+
if(get_ia32_am_arity(node) == ia32_am_unary) {
- set_irn_n(node, 2, load_res);
- set_irn_n(node, 3, new_NoMem());
+ set_irn_n(node, n_ia32_unary_op, load_res);
} else if(get_ia32_am_arity(node) == ia32_am_binary) {
- set_irn_n(node, 3, load_res);
- set_irn_n(node, 4, new_NoMem());
+ set_irn_n(node, n_ia32_binary_right, load_res);
} else if(get_ia32_am_arity(node) == ia32_am_ternary) {
- set_irn_n(node, 3, load_res);
- set_irn_n(node, 4, new_NoMem());
+ set_irn_n(node, n_ia32_binary_right, load_res);
}
/* rewire mem-proj */
{
/* we should turn back source address mode when rematerializing nodes */
ia32_op_type_t type = get_ia32_op_type(node);
- if(type == ia32_AddrModeS) {
+ ir_node *copy;
+
+ if (type == ia32_AddrModeS) {
turn_back_am(node);
- } else if(type == ia32_AddrModeD) {
+ } else if (type == ia32_AddrModeD) {
/* TODO implement this later... */
panic("found DestAM with flag user %+F this should not happen", node);
} else {
assert(type == ia32_Normal);
}
- ir_node *copy = exact_copy(node);
+ copy = exact_copy(node);
sched_add_after(after, copy);
return copy;
static const arch_code_generator_if_t ia32_code_gen_if = {
ia32_cg_init,
- NULL, /* before abi introduce hook */
+ ia32_before_abi, /* before abi introduce hook */
ia32_prepare_graph,
NULL, /* spill */
ia32_before_sched, /* before scheduling hook */
obstack_init(isa->name_obst);
#endif /* NDEBUG */
+ /* enter the ISA object into the intrinsic environment */
+ intrinsic_env.isa = isa;
ia32_handle_intrinsics();
/* needed for the debug support */
}
}
-static ia32_intrinsic_env_t intrinsic_env = {
- NULL, /**< the irg, these entities belong to */
- NULL, /**< entity for first div operand (move into FPU) */
- NULL, /**< entity for second div operand (move into FPU) */
- NULL, /**< entity for converts ll -> d */
- NULL, /**< entity for converts d -> ll */
- NULL, /**< entity for __divdi3 library call */
- NULL, /**< entity for __moddi3 library call */
- NULL, /**< entity for __udivdi3 library call */
- NULL, /**< entity for __umoddi3 library call */
-};
-
/**
* Returns the libFirm configuration parameter for this backend.
*/
projects / libfirm / blobdiff