#include "../bemachine.h"
#include "../beilpsched.h"
#include "../bespillslots.h"
+#include "../bemodule.h"
#include "bearch_ia32_t.h"
}
else {
/* normal add: inverse == sub */
- ir_node *proj = ia32_get_res_proj(irn);
- assert(proj);
-
- inverse->nodes[0] = new_rd_ia32_Sub(dbg, irg, block, noreg, noreg, proj, get_irn_n(irn, i ^ 1), nomem, irn_mode);
+ inverse->nodes[0] = new_rd_ia32_Sub(dbg, irg, block, noreg, noreg, (ir_node*) irn, get_irn_n(irn, i ^ 1), nomem, irn_mode);
inverse->costs += 2;
}
break;
}
else {
/* normal sub */
- ir_node *proj = ia32_get_res_proj(irn);
- assert(proj);
-
if (i == 2) {
- inverse->nodes[0] = new_rd_ia32_Add(dbg, irg, block, noreg, noreg, proj, get_irn_n(irn, 3), nomem, irn_mode);
+ inverse->nodes[0] = new_rd_ia32_Add(dbg, irg, block, noreg, noreg, (ir_node*) irn, get_irn_n(irn, 3), nomem, irn_mode);
}
else {
- inverse->nodes[0] = new_rd_ia32_Sub(dbg, irg, block, noreg, noreg, get_irn_n(irn, 2), proj, nomem, irn_mode);
+ inverse->nodes[0] = new_rd_ia32_Sub(dbg, irg, block, noreg, noreg, get_irn_n(irn, 2), (ir_node*) irn, nomem, irn_mode);
}
inverse->costs += 1;
}
}
else {
/* normal xor */
- inverse->nodes[0] = new_rd_ia32_Eor(dbg, irg, block, noreg, noreg, (ir_node *)irn, get_irn_n(irn, i), nomem, irn_mode);
+ inverse->nodes[0] = new_rd_ia32_Eor(dbg, irg, block, noreg, noreg, (ir_node *) irn, get_irn_n(irn, i), nomem, irn_mode);
inverse->costs += 1;
}
break;
case iro_ia32_Not: {
- ir_node *proj = ia32_get_res_proj(irn);
- assert(proj);
-
- inverse->nodes[0] = new_rd_ia32_Not(dbg, irg, block, noreg, noreg, proj, nomem, irn_mode);
+ inverse->nodes[0] = new_rd_ia32_Not(dbg, irg, block, noreg, noreg, (ir_node*) irn, nomem, irn_mode);
inverse->costs += 1;
break;
}
case iro_ia32_Minus: {
- ir_node *proj = ia32_get_res_proj(irn);
- assert(proj);
-
- inverse->nodes[0] = new_rd_ia32_Minus(dbg, irg, block, noreg, noreg, proj, nomem, irn_mode);
+ inverse->nodes[0] = new_rd_ia32_Minus(dbg, irg, block, noreg, noreg, (ir_node*) irn, nomem, irn_mode);
inverse->costs += 1;
break;
}
newn = new_rd_ia32_LdTls(dbg, irg, blk, get_irn_mode(irn));
exchange(irn, newn);
+ set_irg_tls(irg, newn);
}
}
const ir_mode *mode = get_irn_mode(node);
int align = get_mode_size_bytes(mode);
be_node_needs_frame_entity(env, node, mode, align);
- } else if(is_ia32_irn(node) && get_ia32_frame_ent(node) == NULL) {
+ } else if(is_ia32_irn(node) && get_ia32_frame_ent(node) == NULL
+ && is_ia32_use_frame(node)) {
if (is_ia32_Load(node)) {
const ir_mode *mode = get_ia32_ls_mode(node);
int align = get_mode_size_bytes(mode);
}
}
+const arch_isa_if_t ia32_isa_if;
/**
* The template that generates a new ISA object.
LC_OPT_ENT_ENUM_INT("gasmode", "set the GAS compatibility mode", &gas_var),
{ NULL }
};
-
-/**
- * Register command line options for the ia32 backend.
- *
- * Options so far:
- *
- * ia32-arch=arch create instruction for arch
- * ia32-opt=arch optimize for run on arch
- * ia32-fpunit=unit select floating point unit (x87 or SSE2)
- * ia32-incdec optimize for inc/dec
- * ia32-noaddrmode do not use address mode
- * ia32-nolea do not optimize for LEAs
- * ia32-noplacecnst do not place constants,
- * ia32-noimmop no operations with immediates
- * ia32-noextbb do not use extended basic block scheduling
- * ia32-nopushargs do not create pushs for function argument passing
- * ia32-gasmode set the GAS compatibility mode
- */
-static void ia32_register_options(lc_opt_entry_t *ent)
-{
- lc_opt_entry_t *be_grp_ia32 = lc_opt_get_grp(ent, "ia32");
- lc_opt_add_table(be_grp_ia32, ia32_options);
-}
#endif /* WITH_LIBCORE */
const arch_isa_if_t ia32_isa_if = {
ia32_get_libfirm_params,
ia32_get_allowed_execution_units,
ia32_get_machine,
-#ifdef WITH_LIBCORE
- ia32_register_options
-#endif
};
+
+void be_init_arch_ia32(void)
+{
+ lc_opt_entry_t *be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
+ lc_opt_entry_t *ia32_grp = lc_opt_get_grp(be_grp, "ia32");
+
+ lc_opt_add_table(ia32_grp, ia32_options);
+ be_register_isa_if("ia32", &ia32_isa_if);
+}
+
+BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_ia32);