*/
static void *ia32_abi_init(const be_abi_call_t *call, const arch_env_t *aenv, ir_graph *irg)
{
- ia32_abi_env_t *env = xmalloc(sizeof(env[0]));
- be_abi_call_flags_t fl = be_abi_call_get_flags(call);
+ ia32_abi_env_t *env = XMALLOC(ia32_abi_env_t);
+ be_abi_call_flags_t fl = be_abi_call_get_flags(call);
env->flags = fl.bits;
env->irg = irg;
env->aenv = aenv;
if (!is_ia32_irn(irn) || /* must be an ia32 irn */
get_ia32_op_type(irn) != ia32_Normal || /* must not already be a addressmode irn */
- !(get_ia32_am_support(irn) & ia32_am_Source) || /* must be capable of source addressmode */
!ia32_is_spillmode_compatible(mode, spillmode) ||
is_ia32_use_frame(irn)) /* must not already use frame */
return 0;
- switch (get_ia32_am_arity(irn)) {
+ switch (get_ia32_am_support(irn)) {
+ case ia32_am_none:
+ return 0;
+
case ia32_am_unary:
return i == n_ia32_unary_op;
}
default:
- panic("Unknown arity");
+ panic("Unknown AM type");
}
}
set_ia32_use_frame(irn);
set_ia32_need_stackent(irn);
- if (i == n_ia32_binary_left &&
- get_ia32_am_arity(irn) == ia32_am_binary &&
+ if (i == n_ia32_binary_left &&
+ get_ia32_am_support(irn) == ia32_am_binary &&
/* immediates are only allowed on the right side */
!is_ia32_Immediate(get_irn_n(irn, n_ia32_binary_right))) {
ia32_swap_left_right(irn);
(void) self;
}
-static void turn_back_am(ir_node *node)
+ir_node *turn_back_am(ir_node *node)
{
ir_graph *irg = current_ir_graph;
dbg_info *dbgi = get_irn_dbg_info(node);
set_ia32_is_reload(load);
set_irn_n(node, n_ia32_mem, new_NoMem());
- switch (get_ia32_am_arity(node)) {
+ switch (get_ia32_am_support(node)) {
case ia32_am_unary:
set_irn_n(node, n_ia32_unary_op, load_res);
break;
case ia32_am_binary:
if (is_ia32_Immediate(get_irn_n(node, n_ia32_binary_right))) {
- assert(is_ia32_Cmp(node) || is_ia32_Cmp8Bit(node) ||
- is_ia32_Test(node) || is_ia32_Test8Bit(node));
set_irn_n(node, n_ia32_binary_left, load_res);
} else {
set_irn_n(node, n_ia32_binary_right, load_res);
break;
default:
- panic("Unknown arity");
+ panic("Unknown AM type");
}
noreg = ia32_new_NoReg_gp(ia32_current_cg);
set_irn_n(node, n_ia32_base, noreg);
set_ia32_op_type(node, ia32_Normal);
if (sched_is_scheduled(node))
sched_add_before(node, load);
+
+ return load_res;
}
static ir_node *flags_remat(ir_node *node, ir_node *after)
*/
static void *ia32_cg_init(be_irg_t *birg) {
ia32_isa_t *isa = (ia32_isa_t *)birg->main_env->arch_env;
- ia32_code_gen_t *cg = xcalloc(1, sizeof(*cg));
+ ia32_code_gen_t *cg = XMALLOCZ(ia32_code_gen_t);
cg->impl = &ia32_code_gen_if;
cg->irg = birg->irg;
set_tarval_output_modes();
- isa = xmalloc(sizeof(*isa));
+ isa = XMALLOC(ia32_isa_t);
memcpy(isa, &ia32_isa_template, sizeof(*isa));
if(mode_fpcw == NULL) {
ia32_build_8bit_reg_map_high(isa->regs_8bit_high);
#ifndef NDEBUG
- isa->name_obst = xmalloc(sizeof(*isa->name_obst));
+ isa->name_obst = XMALLOC(struct obstack);
obstack_init(isa->name_obst);
#endif /* NDEBUG */