Good day and welcome to the FIRM XMALLOC*() macros. These macros are provided for...
[libfirm] / ir / be / ia32 / bearch_ia32.c
index 4a2856c..3647a61 100644 (file)
@@ -180,7 +180,8 @@ ir_node *ia32_new_Fpu_truncate(ia32_code_gen_t *cg) {
 /**
  * Returns the admissible noreg register node for input register pos of node irn.
  */
-ir_node *ia32_get_admissible_noreg(ia32_code_gen_t *cg, ir_node *irn, int pos) {
+static ir_node *ia32_get_admissible_noreg(ia32_code_gen_t *cg, ir_node *irn, int pos)
+{
        const arch_register_req_t *req;
 
        req = arch_get_register_req(cg->arch_env, irn, pos);
@@ -544,8 +545,8 @@ static void ia32_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_
  */
 static void *ia32_abi_init(const be_abi_call_t *call, const arch_env_t *aenv, ir_graph *irg)
 {
-       ia32_abi_env_t *env    = xmalloc(sizeof(env[0]));
-       be_abi_call_flags_t fl = be_abi_call_get_flags(call);
+       ia32_abi_env_t      *env = XMALLOC(ia32_abi_env_t);
+       be_abi_call_flags_t  fl  = be_abi_call_get_flags(call);
        env->flags = fl.bits;
        env->irg   = irg;
        env->aenv  = aenv;
@@ -801,49 +802,61 @@ static ir_mode *get_spill_mode(const ir_node *node)
  */
 static int ia32_is_spillmode_compatible(const ir_mode *mode, const ir_mode *spillmode)
 {
-       if(mode_is_float(mode)) {
-               return mode == spillmode;
-       } else {
-               return 1;
-       }
+       return !mode_is_float(mode) || mode == spillmode;
 }
 
 /**
  * Check if irn can load its operand at position i from memory (source addressmode).
- * @param self   Pointer to irn ops itself
  * @param irn    The irn to be checked
  * @param i      The operands position
  * @return Non-Zero if operand can be loaded
  */
-static int ia32_possible_memory_operand(const ir_node *irn, unsigned int i) {
-       ir_node *op = get_irn_n(irn, i);
-       const ir_mode *mode = get_irn_mode(op);
+static int ia32_possible_memory_operand(const ir_node *irn, unsigned int i)
+{
+       ir_node       *op        = get_irn_n(irn, i);
+       const ir_mode *mode      = get_irn_mode(op);
        const ir_mode *spillmode = get_spill_mode(op);
 
-       if (
-               (i != n_ia32_binary_left && i != n_ia32_binary_right) || /* a "real" operand position must be requested */
-               ! is_ia32_irn(irn)                                    ||  /* must be an ia32 irn */
-               get_ia32_am_arity(irn) != ia32_am_binary              ||  /* must be a binary operation TODO is this necessary? */
-               get_ia32_op_type(irn) != ia32_Normal                  ||  /* must not already be a addressmode irn */
-               ! (get_ia32_am_support(irn) & ia32_am_Source)         ||  /* must be capable of source addressmode */
-               ! ia32_is_spillmode_compatible(mode, spillmode)       ||
-               is_ia32_use_frame(irn))                                  /* must not already use frame */
+       if (!is_ia32_irn(irn)                              ||  /* must be an ia32 irn */
+           get_ia32_op_type(irn) != ia32_Normal           ||  /* must not already be a addressmode irn */
+           !ia32_is_spillmode_compatible(mode, spillmode) ||
+           is_ia32_use_frame(irn))                            /* must not already use frame */
                return 0;
 
-       if (i == n_ia32_binary_left) {
-               const arch_register_req_t *req;
-               if(!is_ia32_commutative(irn))
-                       return 0;
-               /* we can't swap left/right for limited registers
-                * (As this (currently) breaks constraint handling copies)
-                */
-               req = get_ia32_in_req(irn, n_ia32_binary_left);
-               if (req->type & arch_register_req_type_limited) {
+       switch (get_ia32_am_support(irn)) {
+               case ia32_am_none:
                        return 0;
-               }
-       }
 
-       return 1;
+               case ia32_am_unary:
+                       return i == n_ia32_unary_op;
+
+               case ia32_am_binary:
+                       switch (i) {
+                               case n_ia32_binary_left: {
+                                       const arch_register_req_t *req;
+                                       if (!is_ia32_commutative(irn))
+                                               return 0;
+
+                                       /* we can't swap left/right for limited registers
+                                        * (As this (currently) breaks constraint handling copies)
+                                        */
+                                       req = get_ia32_in_req(irn, n_ia32_binary_left);
+                                       if (req->type & arch_register_req_type_limited)
+                                               return 0;
+
+                                       return 1;
+                               }
+
+                               case n_ia32_binary_right:
+                                       return 1;
+
+                               default:
+                                       return 0;
+                       }
+
+               default:
+                       panic("Unknown AM type");
+       }
 }
 
 static void ia32_perform_memory_operand(ir_node *irn, ir_node *spill,
@@ -852,14 +865,8 @@ static void ia32_perform_memory_operand(ir_node *irn, ir_node *spill,
        ir_mode *load_mode;
        ir_mode *dest_op_mode;
 
-       ia32_code_gen_t *cg = ia32_current_cg;
-
        assert(ia32_possible_memory_operand(irn, i) && "Cannot perform memory operand change");
 
-       if (i == n_ia32_binary_left) {
-               ia32_swap_left_right(irn);
-       }
-
        set_ia32_op_type(irn, ia32_AddrModeS);
 
        load_mode    = get_irn_mode(get_irn_n(irn, i));
@@ -870,15 +877,18 @@ static void ia32_perform_memory_operand(ir_node *irn, ir_node *spill,
        set_ia32_use_frame(irn);
        set_ia32_need_stackent(irn);
 
-       set_irn_n(irn, n_ia32_base, get_irg_frame(get_irn_irg(irn)));
-       set_irn_n(irn, n_ia32_binary_right, ia32_get_admissible_noreg(cg, irn, n_ia32_binary_right));
-       set_irn_n(irn, n_ia32_mem, spill);
-       set_ia32_is_reload(irn);
-
-       /* immediates are only allowed on the right side */
-       if (i == n_ia32_binary_left && is_ia32_Immediate(get_irn_n(irn, n_ia32_binary_left))) {
+       if (i == n_ia32_binary_left                    &&
+           get_ia32_am_support(irn) == ia32_am_binary &&
+           /* immediates are only allowed on the right side */
+           !is_ia32_Immediate(get_irn_n(irn, n_ia32_binary_right))) {
                ia32_swap_left_right(irn);
+               i = n_ia32_binary_right;
        }
+
+       set_irn_n(irn, n_ia32_base, get_irg_frame(get_irn_irg(irn)));
+       set_irn_n(irn, n_ia32_mem,  spill);
+       set_irn_n(irn, i,           ia32_get_admissible_noreg(ia32_current_cg, irn, i));
+       set_ia32_is_reload(irn);
 }
 
 static const be_abi_callbacks_t ia32_abi_callbacks = {
@@ -1012,7 +1022,7 @@ static void ia32_before_sched(void *self) {
        (void) self;
 }
 
-static void turn_back_am(ir_node *node)
+ir_node *turn_back_am(ir_node *node)
 {
        ir_graph *irg   = current_ir_graph;
        dbg_info *dbgi  = get_irn_dbg_info(node);
@@ -1030,27 +1040,21 @@ static void turn_back_am(ir_node *node)
                set_ia32_is_reload(load);
        set_irn_n(node, n_ia32_mem, new_NoMem());
 
-       switch (get_ia32_am_arity(node)) {
+       switch (get_ia32_am_support(node)) {
                case ia32_am_unary:
                        set_irn_n(node, n_ia32_unary_op, load_res);
                        break;
 
                case ia32_am_binary:
                        if (is_ia32_Immediate(get_irn_n(node, n_ia32_binary_right))) {
-                               assert(is_ia32_Cmp(node)  || is_ia32_Cmp8Bit(node) ||
-                                      is_ia32_Test(node) || is_ia32_Test8Bit(node));
                                set_irn_n(node, n_ia32_binary_left, load_res);
                        } else {
                                set_irn_n(node, n_ia32_binary_right, load_res);
                        }
                        break;
 
-               case ia32_am_ternary:
-                       set_irn_n(node, n_ia32_binary_right, load_res);
-                       break;
-
                default:
-                       panic("Unknown arity");
+                       panic("Unknown AM type");
        }
        noreg = ia32_new_NoReg_gp(ia32_current_cg);
        set_irn_n(node, n_ia32_base,  noreg);
@@ -1076,6 +1080,8 @@ static void turn_back_am(ir_node *node)
        set_ia32_op_type(node, ia32_Normal);
        if (sched_is_scheduled(node))
                sched_add_before(node, load);
+
+       return load_res;
 }
 
 static ir_node *flags_remat(ir_node *node, ir_node *after)
@@ -1574,7 +1580,7 @@ static const arch_code_generator_if_t ia32_code_gen_if = {
  */
 static void *ia32_cg_init(be_irg_t *birg) {
        ia32_isa_t      *isa = (ia32_isa_t *)birg->main_env->arch_env;
-       ia32_code_gen_t *cg  = xcalloc(1, sizeof(*cg));
+       ia32_code_gen_t *cg  = XMALLOCZ(ia32_code_gen_t);
 
        cg->impl      = &ia32_code_gen_if;
        cg->irg       = birg->irg;
@@ -1736,7 +1742,7 @@ static arch_env_t *ia32_init(FILE *file_handle) {
 
        set_tarval_output_modes();
 
-       isa = xmalloc(sizeof(*isa));
+       isa = XMALLOC(ia32_isa_t);
        memcpy(isa, &ia32_isa_template, sizeof(*isa));
 
        if(mode_fpcw == NULL) {
@@ -1759,7 +1765,7 @@ static arch_env_t *ia32_init(FILE *file_handle) {
        ia32_build_8bit_reg_map_high(isa->regs_8bit_high);
 
 #ifndef NDEBUG
-       isa->name_obst = xmalloc(sizeof(*isa->name_obst));
+       isa->name_obst = XMALLOC(struct obstack);
        obstack_init(isa->name_obst);
 #endif /* NDEBUG */