fixed be_Return gen

[libfirm] / ir / be / ia32 / bearch_ia32.c

diff --git a/ir/be/ia32/bearch_ia32.c b/ir/be/ia32/bearch_ia32.c
index ccf8577..269901c 100644 (file)
--- a/ir/be/ia32/bearch_ia32.c
+++ b/ir/be/ia32/bearch_ia32.c
@@ -327,7 +327,6 @@ static const arch_register_t *ia32_abi_prologue(void *self, ir_node **mem, pmap
        ia32_abi_env_t *env              = self;
 
        if (!env->flags.try_omit_fp) {
-               int reg_size         = get_mode_size_bytes(env->isa->bp->reg_class->mode);
                ir_node *bl          = get_irg_start_block(env->irg);
                ir_node *curr_sp     = be_abi_reg_map_get(reg_map, env->isa->sp);
                ir_node *curr_bp     = be_abi_reg_map_get(reg_map, env->isa->bp);
@@ -386,7 +385,6 @@ static void ia32_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_
        else {
                const ia32_isa_t *isa = (ia32_isa_t *)env->isa;
                ir_mode *mode_bp = env->isa->bp->reg_class->mode;
-               int reg_size     = get_mode_size_bytes(env->isa->bp->reg_class->mode);
 
                /* gcc always emits a leave at the end of a routine */
                if (1 || ARCH_AMD(isa->opt_arch)) {
@@ -1013,10 +1011,11 @@ static void ia32_after_ra_walker(ir_node *block, void *env) {
                        transform_to_Load(&tenv);
                }
                else if (be_is_Spill(node)) {
+                       ir_node *spillval = get_irn_n(node, be_pos_Spill_val);
                        /* we always spill the whole register  */
                        tenv.dbg  = get_irn_dbg_info(node);
                        tenv.irn  = node;
-                       tenv.mode = fix_spill_mode(cg, get_irn_mode(be_get_Spill_context(node)));
+                       tenv.mode = fix_spill_mode(cg, get_irn_mode(spillval));
                        transform_to_Store(&tenv);
                }
        }
@@ -1300,7 +1299,6 @@ static int ia32_get_n_reg_class(const void *self) {
  * Return the register class for index i.
  */
 static const arch_register_class_t *ia32_get_reg_class(const void *self, int i) {
-       const ia32_isa_t *isa = self;
        assert(i >= 0 && i < 3 && "Invalid ia32 register class requested.");
        if (i == 0)
                return &ia32_reg_classes[CLASS_ia32_gp];