return (ir_node *)n;
}
+
/**
* Return register requirements for an ia32 node.
* If the node returns a tuple (mode_T) then the proj's
static const arch_register_req_t *ia32_get_irn_reg_req(const void *self, arch_register_req_t *req, const ir_node *irn, int pos) {
const ia32_register_req_t *irn_req;
long node_pos = pos == -1 ? 0 : pos;
- ir_mode *mode = get_irn_mode(irn);
+ ir_mode *mode = is_Block(irn) ? NULL : get_irn_mode(irn);
firm_dbg_module_t *mod = firm_dbg_register(DEBUG_MODULE);
- if (mode == mode_T || mode == mode_M) {
- DBG((mod, LEVEL_1, "ignoring mode_T, mode_M node %+F\n", irn));
+ if (is_Block(irn) || mode == mode_M || mode == mode_X) {
+ DBG((mod, LEVEL_1, "ignoring Block, mode_M, mode_X node %+F\n", irn));
+ return NULL;
+ }
+
+ if (mode == mode_T && pos < 0) {
+ DBG((mod, LEVEL_1, "ignoring request OUT requirements for node %+F\n", irn));
return NULL;
}
int pos = 0;
const ia32_irn_ops_t *ops = self;
+ if (get_irn_mode(irn) == mode_X) {
+ return;
+ }
+
DBG((ops->cg->mod, LEVEL_1, "ia32 assigned register %s to node %+F\n", reg->name, irn));
if (is_Proj(irn)) {
const arch_register_t *reg = NULL;
if (is_Proj(irn)) {
+
+ if (get_irn_mode(irn) == mode_X) {
+ return NULL;
+ }
+
pos = ia32_translate_proj_pos(irn);
irn = my_skip_proj(irn);
}
ir_graph *irg;
} ia32_abi_env_t;
-static void *ia32_abi_init(const be_abi_call_t *call, const arch_isa_t *isa, ir_graph *irg)
+static void *ia32_abi_init(const be_abi_call_t *call, const arch_env_t *aenv, ir_graph *irg)
{
ia32_abi_env_t *env = xmalloc(sizeof(env[0]));
be_abi_call_flags_t fl = be_abi_call_get_flags(call);
env->flags = fl.bits;
env->irg = irg;
- env->isa = isa;
+ env->isa = aenv->isa;
return env;
}
pset_insert_ptr(s, env->isa->bp);
}
-static const arch_register_t *ia32_abi_prologue(void *self, pmap *reg_map)
+static const arch_register_t *ia32_abi_prologue(void *self, ir_node **mem, pmap *reg_map)
{
- ia32_abi_env_t *env = self;
- return env->isa->bp;
+ ia32_abi_env_t *env = self;
+ const arch_register_t *frame_reg = env->isa->sp;
+
+ if(!env->flags.try_omit_fp) {
+ int reg_size = get_mode_size_bytes(env->isa->bp->reg_class->mode);
+ ir_node *bl = get_irg_start_block(env->irg);
+ ir_node *curr_sp = be_abi_reg_map_get(reg_map, env->isa->sp);
+ ir_node *curr_bp = be_abi_reg_map_get(reg_map, env->isa->bp);
+ ir_node *curr_no_reg = be_abi_reg_map_get(reg_map, &ia32_gp_regs[REG_XXX]);
+ ir_node *store_bp;
+
+ curr_sp = be_new_IncSP(env->isa->sp, env->irg, bl, curr_sp, *mem, reg_size, be_stack_dir_along);
+ store_bp = new_rd_ia32_Store(NULL, env->irg, bl, curr_sp, curr_no_reg, curr_bp, *mem, mode_T);
+ set_ia32_am_support(store_bp, ia32_am_Dest);
+ set_ia32_am_flavour(store_bp, ia32_B);
+ set_ia32_op_type(store_bp, ia32_AddrModeD);
+ *mem = new_r_Proj(env->irg, bl, store_bp, mode_M, 0);
+ curr_bp = be_new_Copy(env->isa->bp->reg_class, env->irg, bl, curr_sp);
+ be_set_constr_single_reg(curr_bp, BE_OUT_POS(0), env->isa->bp);
+ be_node_set_flags(curr_bp, BE_OUT_POS(0), arch_irn_flags_ignore);
+
+ be_abi_reg_map_set(reg_map, env->isa->sp, curr_sp);
+ be_abi_reg_map_set(reg_map, env->isa->bp, curr_bp);
+ }
+
+ return frame_reg;
}
static void ia32_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_map)
{
+ ia32_abi_env_t *env = self;
+ ir_node *curr_sp = be_abi_reg_map_get(reg_map, env->isa->sp);
+ ir_node *curr_bp = be_abi_reg_map_get(reg_map, env->isa->bp);
+ ir_node *curr_no_reg = be_abi_reg_map_get(reg_map, &ia32_gp_regs[REG_XXX]);
+
+ if(env->flags.try_omit_fp) {
+ curr_sp = be_new_IncSP(env->isa->sp, env->irg, bl, curr_sp, *mem, BE_STACK_FRAME_SIZE, be_stack_dir_against);
+ }
+
+ else {
+ ir_node *load_bp;
+ ir_mode *mode_bp = env->isa->bp->reg_class->mode;
+
+ curr_sp = be_new_SetSP(env->isa->sp, env->irg, bl, curr_sp, curr_bp, *mem);
+ load_bp = new_rd_ia32_Load(NULL, env->irg, bl, curr_sp, curr_no_reg, *mem, mode_T);
+ set_ia32_am_support(load_bp, ia32_am_Source);
+ set_ia32_am_flavour(load_bp, ia32_B);
+ set_ia32_op_type(load_bp, ia32_AddrModeS);
+ set_ia32_ls_mode(load_bp, mode_bp);
+ curr_bp = new_r_Proj(env->irg, bl, load_bp, mode_bp, 0);
+ *mem = new_r_Proj(env->irg, bl, load_bp, mode_M, 1);
+ }
+
+ be_abi_reg_map_set(reg_map, env->isa->sp, curr_sp);
+ be_abi_reg_map_set(reg_map, env->isa->bp, curr_bp);
}
/**
/* check if there is a sub which need to be transformed */
ia32_transform_sub_to_neg_add(irn, cg);
+
+ /* transform a LEA into an Add if possible */
+ ia32_transform_lea_to_add(irn, cg);
}
/**
if (mode_is_float(mode)) {
new_op = new_rd_ia32_fStore(env->dbg, env->irg, env->block, ptr, noreg, val, nomem, mode_T);
}
+ else if (get_mode_size_bits(mode) == 8) {
+ new_op = new_rd_ia32_Store8Bit(env->dbg, env->irg, env->block, ptr, noreg, val, nomem, mode_T);
+ }
else {
new_op = new_rd_ia32_Store(env->dbg, env->irg, env->block, ptr, noreg, val, nomem, mode_T);
}
cg->opt.doam = 1;
cg->opt.placecnst = 1;
cg->opt.immops = 1;
+ cg->opt.extbb = 1;
#ifndef NDEBUG
if (isa->name_obst_size) {
&ia32_gp_regs[REG_EBP], /* base pointer register */
-1, /* stack direction */
0, /* number of code generator objects so far */
- NULL /* name obstack */
+ NULL, /* 16bit register names */
+ NULL, /* 8bit register names */
+#ifndef NDEBUG
+ NULL, /* name obstack */
+ 0 /* name obst size */
+#endif
};
/**
ia32_register_init(isa);
ia32_create_opcodes();
+ isa->regs_16bit = pmap_create();
+ isa->regs_8bit = pmap_create();
+
+ ia32_build_16bit_reg_map(isa->regs_16bit);
+ ia32_build_8bit_reg_map(isa->regs_8bit);
+
#ifndef NDEBUG
isa->name_obst = xcalloc(1, sizeof(*(isa->name_obst)));
obstack_init(isa->name_obst);
static void ia32_done(void *self) {
ia32_isa_t *isa = self;
+ pmap_destroy(isa->regs_16bit);
+ pmap_destroy(isa->regs_8bit);
+
#ifndef NDEBUG
//printf("name obst size = %d bytes\n", isa->name_obst_size);
obstack_free(isa->name_obst, NULL);
int n = get_method_n_params(method_type);
int biggest_n = -1;
int stack_idx = 0;
- int i, ignore;
+ int i, ignore_1, ignore_2;
ir_mode **modes;
const arch_register_t *reg;
be_abi_call_flags_t call_flags;
/* set register parameters */
if (cc & cc_reg_param) {
/* determine the number of parameters passed via registers */
- biggest_n = ia32_get_n_regparam_class(n, modes, &ignore, &ignore);
+ biggest_n = ia32_get_n_regparam_class(n, modes, &ignore_1, &ignore_2);
/* loop over all parameters and set the register requirements */
for (i = 0; i <= biggest_n; i++) {
/* set stack parameters */
for (i = stack_idx; i < n; i++) {
- be_abi_call_param_stack(abi, i);
+ be_abi_call_param_stack(abi, i, 1);
}
* Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
*/
static const list_sched_selector_t *ia32_get_list_sched_selector(const void *self) {
- memcpy(&ia32_sched_selector, trivial_selector, sizeof(list_sched_selector_t));
+ memcpy(&ia32_sched_selector, reg_pressure_selector, sizeof(list_sched_selector_t));
ia32_sched_selector.to_appear_in_schedule = ia32_to_appear_in_schedule;
return &ia32_sched_selector;
}
projects / libfirm / blobdiff