cleanup vrp

[libfirm] / ir / be / beverify.c

diff --git a/ir/be/beverify.c b/ir/be/beverify.c
index dcda129..8a68f63 100644 (file)
--- a/ir/be/beverify.c
+++ b/ir/be/beverify.c
@@ -179,6 +179,11 @@ static void verify_schedule_walker(ir_node *block, void *data)
                }
                last_timestep = timestep;
 
+               if (arch_get_irn_flags(node) & arch_irn_flags_not_scheduled) {
+                       ir_fprintf(stderr, "Verify warning: flags_not_scheduled node %+F scheduled anyway\n", node);
+                       env->problem_found = true;
+               }
+
                /* Check that phis come before any other node */
                if (is_Phi(node)) {
                        if (non_phi_found != NULL) {
@@ -201,8 +206,8 @@ static void verify_schedule_walker(ir_node *block, void *data)
                                cfchange_found = node;
                        }
                } else if (cfchange_found != NULL) {
-                       /* proj and keepany aren't real instructions... */
-                       if (!is_Proj(node) && !be_is_Keep(node)) {
+                       /* keepany isn't a real instruction. */
+                       if (!be_is_Keep(node)) {
                                ir_fprintf(stderr, "Verify Warning: Node %+F scheduled after control flow changing node in block %+F (%s)\n",
                                           node, block, get_irg_name(env->irg));
                                env->problem_found = true;
@@ -376,8 +381,6 @@ static void collect_spill(be_verify_spillslots_env_t *env, ir_node *node, ir_nod
 
 static void collect_memperm(be_verify_spillslots_env_t *env, ir_node *node, ir_node *reload, ir_entity* ent)
 {
-       assert(is_Proj(node));
-
        ir_node *memperm = get_Proj_pred(node);
        int      out     = get_Proj_proj(node);
 
@@ -440,13 +443,6 @@ static void collect(be_verify_spillslots_env_t *env, ir_node *node, ir_node *rel
                collect_memperm(env, node, reload, ent);
        } else if (is_Phi(node) && get_irn_mode(node) == mode_M) {
                collect_memphi(env, node, reload, ent);
-       } else {
-               /* Disabled for now, spills might get transformed by the backend */
-#if 0
-               ir_fprintf(stderr, "Verify warning: No spill, memperm or memphi attached to node %+F found from node %+F in block %+F(%s)\n",
-                       node, reload, get_nodes_block(node), get_irg_name(env->irg));
-               env->problem_found = true;
-#endif
        }
 }
 
@@ -704,9 +700,8 @@ static void value_used(const ir_node *block, const ir_node *node)
        for (unsigned i = 0; i < req->width; ++i) {
                const ir_node *reg_node = registers[idx+i];
                if (reg_node != NULL && reg_node != node) {
-                       const arch_register_t *realreg = &arch_env->registers[idx+i];
                        ir_fprintf(stderr, "Verify warning: Register %s assigned more than once in block %+F(%s) (nodes %+F %+F)\n",
-                                          realreg->name, block, get_irg_name(irg),
+                                          reg->name, block, get_irg_name(irg),
                                           node, reg_node);
                        problem_found = true;
                }
@@ -733,9 +728,8 @@ static void value_def(const ir_node *node)
                        return;
 
                if (reg_node != node) {
-                       const arch_register_t *realreg = &arch_env->registers[idx+i];
                        ir_fprintf(stderr, "Verify warning: Node %+F not registered as value for Register %s (but %+F) in block %+F(%s)\n",
-                                  node, realreg->name, reg_node, get_nodes_block(node),
+                                  node, reg->name, reg_node, get_nodes_block(node),
                                   get_irg_name(irg));
                        problem_found = true;
                }
@@ -757,17 +751,10 @@ static void verify_block_register_allocation(ir_node *block, void *data)
        }
 
        sched_foreach_reverse(block, node) {
-
-               if (get_irn_mode(node) == mode_T) {
-                       foreach_out_edge(node, edge) {
-                               ir_node *def = get_edge_src_irn(edge);
-                               value_def(def);
-                               check_output_constraints(def);
-                       }
-               } else {
-                       value_def(node);
-                       check_output_constraints(node);
-               }
+               be_foreach_value(node, value,
+                       value_def(value);
+                       check_output_constraints(value);
+               );
 
                check_input_constraints(node);