give Bad nodes a mode

[libfirm] / ir / be / beverify.c

diff --git a/ir/be/beverify.c b/ir/be/beverify.c
index 95630b1..7ef7183 100644 (file)
--- a/ir/be/beverify.c
+++ b/ir/be/beverify.c
@@ -45,6 +45,7 @@
 #include "benode.h"
 #include "beirg.h"
 #include "beintlive_t.h"
+#include "belistsched.h"
 
 static int my_values_interfere(const ir_node *a, const ir_node *b);
 
@@ -155,18 +156,16 @@ static void verify_schedule_walker(ir_node *block, void *data)
 {
        be_verify_schedule_env_t *env = (be_verify_schedule_env_t*) data;
        ir_node *node;
-       ir_node *non_phi_found = NULL;
-       int cfchange_found = 0;
-       /* TODO ask arch about delay branches */
-       int delay_branches = 0;
+       ir_node *non_phi_found  = NULL;
+       ir_node *cfchange_found = NULL;
        int last_timestep = INT_MIN;
 
        /*
         * Tests for the following things:
-        *   1. Make sure that all phi nodes are scheduled at the beginning of the block
-        *   2. There is 1 or no control flow changing node scheduled and exactly delay_branches operations after it.
-        *   3. No value is defined after it has been used
-        *   4. mode_T nodes have all projs scheduled behind them followed by Keeps
+        *   1. Make sure that all phi nodes are scheduled at the beginning of the
+        *      block
+        *   2. No value is defined after it has been used
+        *   3. mode_T nodes have all projs scheduled behind them followed by Keeps
         *       (except mode_X projs)
         */
        sched_foreach(block, node) {
@@ -207,31 +206,27 @@ static void verify_schedule_walker(ir_node *block, void *data)
                }
 
                /* Check for control flow changing nodes */
-               if (is_cfop(node) && get_irn_opcode(node) != iro_Start) {
+               if (is_cfop(node)) {
                        /* check, that only one CF operation is scheduled */
-                       if (cfchange_found == 1) {
-                               ir_fprintf(stderr, "Verify Warning: More than 1 control flow changing node (%+F) scheduled in block %+F (%s)\n",
-                                       node, block, get_irg_dump_name(env->irg));
+                       if (cfchange_found != NULL) {
+                               ir_fprintf(stderr, "Verify Warning: Additional control flow changing node %+F scheduled after %+F in block %+F (%s)\n",
+                                       node, block, cfchange_found, get_irg_dump_name(env->irg));
                                env->problem_found = 1;
+                       } else {
+                               cfchange_found = node;
                        }
-                       cfchange_found = 1;
-               } else if (cfchange_found) {
+               } else if (cfchange_found != NULL) {
                        /* proj and keepany aren't real instructions... */
                        if (!is_Proj(node) && !be_is_Keep(node)) {
-                               /* check for delay branches */
-                               if (delay_branches == 0) {
-                                       ir_fprintf(stderr, "Verify Warning: Node %+F scheduled after control flow changing node (+delay branches) in block %+F (%s)\n",
-                                               node, block, get_irg_dump_name(env->irg));
-                                       env->problem_found = 1;
-                               } else {
-                                       delay_branches--;
-                               }
+                               ir_fprintf(stderr, "Verify Warning: Node %+F scheduled after control flow changing node in block %+F (%s)\n",
+                                          node, block, get_irg_dump_name(env->irg));
+                               env->problem_found = 1;
                        }
                }
 
                /* Check that all uses come before their definitions */
                if (!is_Phi(node)) {
-                       int nodetime = sched_get_time_step(node);
+                       sched_timestep_t nodetime = sched_get_time_step(node);
                        for (i = 0, arity = get_irn_arity(node); i < arity; ++i) {
                                ir_node *arg = get_irn_n(node, i);
                                if (get_nodes_block(arg) != block
@@ -282,19 +277,12 @@ static void verify_schedule_walker(ir_node *block, void *data)
                        }
                }
        }
-
-       /* check that all delay branches are filled (at least with NOPs) */
-       if (cfchange_found && delay_branches != 0) {
-               ir_fprintf(stderr, "Verify warning: Not all delay slots filled after jump (%d/%d) in block %+F (%s)\n",
-                       block, get_irg_dump_name(env->irg));
-               env->problem_found = 1;
-       }
 }
 
 static void check_schedule(ir_node *node, void *data)
 {
        be_verify_schedule_env_t *env = (be_verify_schedule_env_t*)data;
-       bool should_be = to_appear_in_schedule(node);
+       bool should_be = !is_Proj(node) && !(arch_irn_get_flags(node) & arch_irn_flags_not_scheduled);
        bool scheduled = bitset_is_set(env->scheduled, get_irn_idx(node));
 
        if (should_be != scheduled) {
@@ -797,6 +785,11 @@ static void value_def(ir_node *node)
 
        reg_node = registers[reg->index];
 
+       /* a little cheat, since its so hard to remove all outedges to dead code
+        * in the backend. This particular case should never be a problem. */
+       if (reg_node == NULL && get_irn_n_edges(node) == 0)
+               return;
+
        if (reg_node != node) {
                ir_fprintf(stderr, "Verify warning: Node %+F not registered as value for Register %s (but %+F) in block %+F(%s)\n",
                               node, reg->name, reg_node, get_nodes_block(node), get_irg_dump_name(irg));