do {
after = next;
next = sched_next(after);
- } while (is_Proj(next) || is_Phi(next) || be_is_Keep(next)
- || (arch_irn_get_flags(next) & arch_irn_flags_prolog));
+ } while (is_Proj(next) || is_Phi(next) || be_is_Keep(next));
} else {
after = state;
}
ir_graph *irg = get_irn_irg(phi);
ir_node *block = get_nodes_block(phi);
int arity = get_irn_arity(phi);
- ir_node **in = ALLOCAN(ir_node*, arity);
+ ir_node **phi_in = ALLOCAN(ir_node*, arity);
ir_node *dummy = new_r_Dummy(irg, mode_M);
ir_node *spill_to_kill = NULL;
spill_info_t *spill_info;
/* create a new phi-M with bad preds */
for (i = 0; i < arity; ++i) {
- in[i] = dummy;
+ phi_in[i] = dummy;
}
DBG((dbg, LEVEL_2, "\tcreate Phi-M for %+F\n", phi));
/* create a Phi-M */
- spill_info->spill = be_new_Phi(block, arity, in, mode_M, NULL);
+ spill_info->spill = be_new_Phi(block, arity, phi_in, mode_M, NULL);
sched_add_after(block, spill_info->spill);
if (spill_to_kill != NULL) {
return block_info;
}
-static ir_node *get_reload_point(ir_node *before)
-{
- while (true) {
- ir_node *prev = sched_prev(before);
- if (! (arch_irn_get_flags(prev) & arch_irn_flags_epilog))
- break;
- before = prev;
- }
- return before;
-}
-
/**
* For the given block @p block, decide for each values
* whether it is used from a register or is reloaded
}
/* create a reload to match state if necessary */
if (need_val != NULL && need_val != current_state) {
- ir_node *before = get_reload_point(node);
+ ir_node *before = node;
DBG((dbg, LEVEL_3, "\t... reloading %+F\n", need_val));
create_reload(env, need_val, before, current_state);
current_state = need_val;
obstack_free(&env.obst, NULL);
}
-BE_REGISTER_MODULE_CONSTRUCTOR(be_init_state);
+BE_REGISTER_MODULE_CONSTRUCTOR(be_init_state)
void be_init_state(void)
{
FIRM_DBG_REGISTER(dbg, "firm.be.state");