sched_foreach(block, node) {
if (!is_Phi(node))
break;
- if (arch_get_irn_register(env->arch_env, node) != env->reg)
+ if (arch_get_irn_register(node) != env->reg)
continue;
DBG((dbg, LEVEL_2, "\t...checking %+F\n", node));
if(!mode_is_data(get_irn_mode(node)))
continue;
- if (arch_get_irn_register(env->arch_env, node) != env->reg)
+ if (arch_get_irn_register(node) != env->reg)
continue;
DBG((dbg, LEVEL_2, "\t...checking %+F\n", node));
if(!mode_is_data(get_irn_mode(in)))
continue;
- reg = arch_get_irn_register(env->arch_env, in);
+ reg = arch_get_irn_register(in);
if(reg == env->reg) {
assert(need_val == NULL);
need_val = in;
if(!mode_is_data(get_irn_mode(proj)))
continue;
- reg = arch_get_irn_register(env->arch_env, proj);
+ reg = arch_get_irn_register(proj);
if(reg == env->reg) {
current_state = proj;
DBG((dbg, LEVEL_3, "\t... current_state <- %+F\n", current_state));
}
} else {
if(mode_is_data(get_irn_mode(node))) {
- const arch_register_t *reg =
- arch_get_irn_register(env->arch_env, node);
+ const arch_register_t *reg = arch_get_irn_register(node);
if(reg == env->reg) {
current_state = node;
DBG((dbg, LEVEL_3, "\t... current_state <- %+F\n", current_state));
be_lv_t *lv = be_assure_liveness(birg);
be_liveness_assure_sets(lv);
- be_assure_dom_front(birg);
/* construct control flow loop tree */
if(! (get_irg_loopinfo_state(irg) & loopinfo_cf_consistent)) {
construct_cf_backedges(irg);
ir_nodemap_init(&env.spill_infos);
assure_doms(irg);
- set_using_visited(irg);
- set_using_irn_link(irg);
+ ir_reserve_resources(irg, IR_RESOURCE_IRN_VISITED | IR_RESOURCE_IRN_LINK);
inc_irg_visited(irg);
/* process blocks */
/* fix block end_states that don't match the next blocks start_state */
irg_block_walk_graph(irg, fix_block_borders, NULL, &env);
- clear_using_visited(irg);
- clear_using_irn_link(irg);
+ ir_free_resources(irg, IR_RESOURCE_IRN_VISITED | IR_RESOURCE_IRN_LINK);
/* reconstruct ssa-form */
info = env.spills;