/*
- * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
- *
* This file is part of libFirm.
- *
- * This file may be distributed and/or modified under the terms of the
- * GNU General Public License version 2 as published by the Free Software
- * Foundation and appearing in the file LICENSE.GPL included in the
- * packaging of this file.
- *
- * Licensees holding valid libFirm Professional Edition licenses may use
- * this file in accordance with the libFirm Commercial License.
- * Agreement provided with the Software.
- *
- * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
- * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE.
+ * Copyright (C) 2012 University of Karlsruhe.
*/
/**
* @brief Spill module selection; Preparation steps
* @author Matthias Braun
* @date 29.09.2005
- * @version $Id$
*/
#include "config.h"
#include "debug.h"
#include "iredges_t.h"
#include "raw_bitset.h"
-#include "statev.h"
+#include "statev_t.h"
#include "irgwalk.h"
#include "bespill.h"
const ir_graph *irg = env->irg;
be_irg_t *birg = be_birg_from_irg(irg);
be_lv_t *lv = be_get_irg_liveness(irg);
- unsigned *tmp = NULL;
unsigned *def_constr = NULL;
int arity = get_irn_arity(node);
- ir_node *def;
-
- int i, i2;
/* Insert a copy for constraint inputs attached to a value which can't
* fulfill the constraint
* TODO: This really just checks precolored registers at the moment and
* ignores the general case of not matching in/out constraints
*/
- for (i = 0; i < arity; ++i) {
+ for (int i = 0; i < arity; ++i) {
ir_node *op = get_irn_n(node, i);
const arch_register_req_t *req = arch_get_irn_register_req_in(node, i);
const arch_register_t *reg;
if (reg == NULL)
continue;
- /* precolored with an ignore register (which is not a joker like
- unknown/noreg) */
- if ((reg->type & arch_register_type_joker) ||
+ /* Precolored with an ignore register (which is not virtual). */
+ if (reg->type & arch_register_type_virtual ||
rbitset_is_set(birg->allocatable_regs, reg->global_index))
continue;
- if (! (req->type & arch_register_req_type_limited))
+ if (!arch_register_req_is(req, limited))
continue;
if (rbitset_is_set(req->limited, reg->index))
continue;
- copy = be_new_Copy(cls, block, op);
+ copy = be_new_Copy(block, op);
stat_ev_int("constr_copy", 1);
sched_add_before(node, copy);
set_irn_n(node, i, copy);
}
/* insert copies for nodes that occur constrained more than once. */
- for (i = 0; i < arity; ++i) {
- ir_node *in;
- ir_node *copy;
- const arch_register_req_t *req;
-
- req = arch_get_irn_register_req_in(node, i);
- if (req->cls != cls)
- continue;
-
- if (! (req->type & arch_register_req_type_limited))
+ be_foreach_use(node, cls, req, in, in_req_,
+ if (!arch_register_req_is(req, limited))
continue;
- in = get_irn_n(node, i);
- if (!arch_irn_consider_in_reg_alloc(cls, in))
- continue;
-
- for (i2 = i + 1; i2 < arity; ++i2) {
+ for (int i2 = i_ + 1; i2 < arity; ++i2) {
ir_node *in2;
const arch_register_req_t *req2;
req2 = arch_get_irn_register_req_in(node, i2);
if (req2->cls != cls)
continue;
- if (! (req2->type & arch_register_req_type_limited))
+ if (!arch_register_req_is(req2, limited))
continue;
in2 = get_irn_n(node, i2);
if (rbitsets_equal(req->limited, req2->limited, cls->n_regs))
continue;
- copy = be_new_Copy(cls, block, in);
+ ir_node *copy = be_new_Copy(block, in);
stat_ev_int("constr_copy", 1);
sched_add_before(node, copy);
"inserting multiple constr copy %+F for %+F pos %d\n",
copy, node, i2));
}
- }
+ );
/* collect all registers occurring in out constraints. */
- be_foreach_definition(node, cls, def,
- if (! (req_->type & arch_register_req_type_limited))
+ be_foreach_definition(node, cls, def, req,
+ (void)def;
+ if (!arch_register_req_is(req, limited))
continue;
if (def_constr == NULL) {
- rbitset_alloca(def_constr, cls->n_regs);
+ def_constr = rbitset_alloca(cls->n_regs);
}
- rbitset_or(def_constr, req_->limited, cls->n_regs);
+ rbitset_or(def_constr, req->limited, cls->n_regs);
);
/* no output constraints => we're good */
* insert copies for all constrained arguments living through the node
* and being constrained to a register which also occurs in out constraints.
*/
- rbitset_alloca(tmp, cls->n_regs);
- for (i = 0; i < arity; ++i) {
- const arch_register_req_t *req;
- ir_node *in;
- ir_node *copy;
-
- /*
- * Check, if
+ unsigned *const tmp = rbitset_alloca(cls->n_regs);
+ be_foreach_use(node, cls, req, in, in_req_,
+ /* Check, if
* 1) the operand is constrained.
* 2) lives through the node.
* 3) is constrained to a register occurring in out constraints.
*/
- req = arch_get_irn_register_req_in(node, i);
- if (req->cls != cls)
- continue;
- if (!(req->type & arch_register_req_type_limited))
- continue;
-
- in = get_irn_n(node, i);
- if (!arch_irn_consider_in_reg_alloc(cls, in))
+ if (!arch_register_req_is(req, limited))
continue;
if (!be_values_interfere(lv, node, in))
continue;
if (be_is_Copy(in))
continue;
- copy = be_new_Copy(cls, block, in);
+ ir_node *copy = be_new_Copy(block, in);
sched_add_before(node, copy);
- set_irn_n(node, i, copy);
+ set_irn_n(node, i_, copy);
DBG((dbg, LEVEL_3, "inserting constr copy %+F for %+F pos %d\n",
- copy, node, i));
+ copy, node, i_));
be_liveness_update(lv, in);
- }
+ );
}
static void pre_spill_prepare_constr_walker(ir_node *block, void *data)
{
be_pre_spill_env_t *env = (be_pre_spill_env_t*)data;
- ir_node *node;
sched_foreach(block, node) {
prepare_constr_insn(env, node);
}
env.irg = irg;
env.cls = cls;
- be_assure_liveness(irg);
+ be_assure_live_sets(irg);
irg_block_walk_graph(irg, pre_spill_prepare_constr_walker, NULL, &env);
}
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