/*
- * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
+ * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
*
* This file is part of libFirm.
*
*/
/**
+ * @file
+ * @brief Implementation of a register saturating list scheduler.
+ * @author Christian Wuerdig
+ * @date 29.08.2006
+ * @version $Id$
+ *
* Implementation of a register saturating list scheduler
* as described in: Sid-Ahmed-Ali Touati
* Register Saturation in Superscalar and VLIW Codes
- *
- * @license This file protected by GPL - GNU GENERAL PUBLIC LICENSE.
- * @author Christian Wuerdig
- * @date 29.08.2006
- * @cvs-id $Id$
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#include "besched_t.h"
#include "beirg_t.h"
-#include <libcore/lc_opts.h>
-#include <libcore/lc_opts_enum.h>
+#include "lc_opts.h"
+#include "lc_opts_enum.h"
#define ARR_LEN_SAFE(arr) ((arr) != NULL ? ARR_LEN((arr)) : 0)
typedef struct _rss_irn {
plist_t *consumer_list; /**< List of consumers */
- ir_node **consumer; /**< Sorted consumer array (needed for faster access) */
+ const ir_node **consumer; /**< Sorted consumer array (needed for faster access) */
plist_t *parent_list; /**< List of parents */
plist_t *pkiller_list; /**< List of potential killers */
plist_t *descendant_list; /**< List of descendants */
- ir_node **descendants; /**< Sorted descendant array (needed for faster access) */
+ const ir_node **descendants; /**< Sorted descendant array (needed for faster access) */
- ir_node *killer; /**< The selected unique killer */
- ir_node *irn; /**< The corresponding firm node to this rss_irn */
+ const ir_node *killer; /**< The selected unique killer */
+ const ir_node *irn; /**< The corresponding firm node to this rss_irn */
chain_t *chain; /**< The chain, this node is associated to */
unsigned max_height; /**< maximum height in the current block */
rss_opts_t *opts; /**< The options */
be_lv_t *liveness; /**< The liveness information for this irg */
- pset *live_block; /**< Values alive at end of block */
+ ir_nodeset_t live_block; /**< Values alive at end of block */
const arch_register_class_t *cls; /**< The current register class */
DEBUG_ONLY(firm_dbg_module_t *dbg);
} rss_t;
static const lc_opt_table_entry_t rss_option_table[] = {
LC_OPT_ENT_ENUM_MASK("dump", "dump phases", &dump_var),
- { NULL }
+ LC_OPT_LAST
};
/******************************************************************************
return -1;
}
-static ir_node **build_sorted_array_from_list(plist_t *irn_list, struct obstack *obst) {
+static const ir_node **build_sorted_array_from_list(plist_t *irn_list, struct obstack *obst) {
plist_element_t *el;
- int i = 0;
- int len = plist_count(irn_list);
- ir_node **arr = NEW_ARR_D(ir_node *, obst, len);
+ int i = 0;
+ int len = plist_count(irn_list);
+ const ir_node **arr = (const ir_node**)NEW_ARR_D(ir_node*, obst, len);
/* copy the list into the array */
foreach_plist(irn_list, el) {
}
/* sort the array by node index */
- qsort(arr, len, sizeof(arr[0]), cmp_irn_idx);
+ /* HACK cast for MSVC */
+ qsort((void*)arr, len, sizeof(arr[0]), cmp_irn_idx);
return arr;
}
/**
* In case there is no rss information for irn, initialize it.
*/
-static void *init_rss_irn(ir_phase *ph, ir_node *irn, void *old) {
+static void *init_rss_irn(ir_phase *ph, const ir_node *irn, void *old) {
rss_irn_t *res = old ? old : phase_alloc(ph, sizeof(res[0]));
res->descendant_list = plist_obstack_new(phase_obst(ph));
*/
static int is_potential_killer(rss_t *rss, rss_irn_t *v, rss_irn_t *u) {
plist_t *list;
- ir_node **arr;
+ const ir_node **arr;
plist_element_t *el;
+ (void) rss;
assert(is_Sink(v->irn) || ((plist_count(v->descendant_list) > 0 && v->descendants) || 1));
assert(is_Sink(u->irn) || ((plist_count(u->consumer_list) > 0 && u->consumer) || 1));
/**
* Adds the edge src -> tgt to the dvg. Checks if reverse edge is already there (asserts).
*/
-static INLINE void add_dvg_edge(rss_t *rss, dvg_t *dvg, ir_node *src, ir_node *tgt, int have_source) {
+static INLINE void add_dvg_edge(rss_t *rss, dvg_t *dvg, const ir_node *src, const ir_node *tgt, int have_source) {
rss_edge_t *dvg_edge;
rss_edge_t key;
if (! have_source)
- ir_nodeset_insert(&dvg->nodes, src);
+ ir_nodeset_insert(&dvg->nodes, (ir_node *) src);
else
assert(ir_nodeset_contains(&dvg->nodes, src) && "Wrong assumption");
- ir_nodeset_insert(&dvg->nodes, tgt);
+ ir_nodeset_insert(&dvg->nodes, (ir_node *) tgt);
- key.src = tgt;
- key.tgt = src;
+ key.src = (ir_node *) tgt;
+ key.tgt = (ir_node *) src;
assert(pset_find(dvg->edges, &key, HASH_RSS_EDGE(&key)) == NULL && "DVG must be acyclic!");
- key.src = src;
- key.tgt = tgt;
+ key.src = (ir_node *) src;
+ key.tgt = (ir_node *) tgt;
if (NULL != pset_find(dvg->edges, &key, HASH_RSS_EDGE(&key))) {
/* add the edge to the DVG */
dvg_edge = obstack_alloc(phase_obst(&rss->ph), sizeof(*dvg_edge));
- dvg_edge->src = src;
- dvg_edge->tgt = tgt;
+ dvg_edge->src = (ir_node *) src;
+ dvg_edge->tgt = (ir_node *) tgt;
dvg_edge->next = NULL;
DBG((rss->dbg, LEVEL_3, "\t\tadd edge %+F -> %+F\n", src, tgt));
if (pset_find(dvg->edges, &key, HASH_RSS_EDGE(&key))) {
/* v[j] is descendant of u -> remove u and break */
- ir_nodeset_insert(temp, u->irn);
+ ir_nodeset_insert(temp, (ir_node *) u->irn);
ir_nodeset_remove(values, u->irn);
DBG((rss->dbg, LEVEL_3, "\t\t\tremoving %+F from values, adding it to temp\n", u->irn));
int j, k;
ir_node *irn;
ir_nodeset_iterator_t iter;
- rss_edge_t min_benefit_edge;
- rss_edge_t min_omega20_edge;
+ rss_edge_t min_benefit_edge = {NULL, NULL, NULL};
+ rss_edge_t min_omega20_edge = {NULL, NULL, NULL};
rss_irn_t *ser_u_omega1 = NULL, *ser_v_omega1 = NULL;
rss_irn_t *ser_u_omega20 = NULL, *ser_v_omega20 = NULL;
/* v cannot be serialized with itself
* ignore nodes where serialization does not help */
if (i == j || IS_UNSERIALIZABLE_NODE(v)) {
+#ifdef DEBUG_libfirm
if (i != j)
DBG((rss->dbg, LEVEL_3, "\t\t\t%+F considered unserializable\n", v->irn));
+#endif
continue;
}
rss->max_height = heights_recompute_block(rss->h, block);
/* loop over all register classes */
- for (i = arch_isa_get_n_reg_class(rss->arch_env->isa) - 1; i >= 0; --i) {
- const arch_register_class_t *cls = arch_isa_get_reg_class(rss->arch_env->isa, i);
+ for (i = arch_env_get_n_reg_class(rss->arch_env) - 1; i >= 0; --i) {
+ const arch_register_class_t *cls = arch_env_get_reg_class(rss->arch_env, i);
rss->cls = cls;
DBG((rss->dbg, LEVEL_1, "register class %s\n", arch_register_class_name(cls)));
/* Get all live value at end of Block having current register class */
- rss->live_block = pset_new_ptr(10);
- be_liveness_end_of_block(rss->liveness, rss->arch_env, rss->cls, rss->block, rss->live_block);
+ ir_nodeset_init(&rss->live_block);
+ be_liveness_end_of_block(rss->liveness, rss->arch_env, rss->cls, rss->block, &rss->live_block);
/* reset the list of interesting nodes */
plist_clear(rss->nodes);
*/
perform_value_serialization_heuristic(rss);
- del_pset(rss->live_block);
+ ir_nodeset_destroy(&rss->live_block);
}
phase_free(&rss->ph);
/**
* Preprocess the irg for scheduling.
*/
-void rss_schedule_preparation(const be_irg_t *birg) {
+void rss_schedule_preparation(be_irg_t *birg) {
ir_graph *irg = be_get_birg_irg(birg);
rss_t rss;
rss.h = heights_new(irg);
rss.nodes = plist_new();
rss.opts = &rss_options;
- rss.liveness = be_liveness(irg);
+ rss.liveness = be_liveness(birg);
+ be_liveness_assure_sets(rss.liveness);
irg_block_walk_graph(irg, NULL, process_block, &rss);
heights_free(rss.h);
plist_free(rss.nodes);
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