}
if (is_Proj(user)) {
- //if (arch_get_irn_reg_class(user, -1) == rss->cls)
+ //if (arch_get_irn_reg_class_out(user) == rss->cls)
collect_descendants(rss, rirn, user, got_sink, cur_desc_walk);
}
else {
ir_node *consumer = get_edge_src_irn(edge);
if (is_Proj(consumer)) {
- //if (arch_get_irn_reg_class(consumer, -1) == rss->cls)
+ //if (arch_get_irn_reg_class_out(consumer) == rss->cls)
collect_consumer(rss, rss_irn, consumer, got_sink);
}
else
/**
* Adds the edge src -> tgt to the dvg. Checks if reverse edge is already there (asserts).
*/
-static INLINE void add_dvg_edge(rss_t *rss, dvg_t *dvg, const ir_node *src, const ir_node *tgt, int have_source) {
+static inline void add_dvg_edge(rss_t *rss, dvg_t *dvg, const ir_node *src, const ir_node *tgt, int have_source) {
rss_edge_t *dvg_edge;
rss_edge_t key;
continue;
if (!arch_irn_is(irn, ignore) &&
- arch_get_irn_reg_class(irn, -1) == cls) {
+ arch_get_irn_reg_class_out(irn) == cls) {
plist_insert_back(rss->nodes, skip_Proj(irn));
}
//}