#include "unionfind.h"
#include "pdeq.h"
#include "hungarian.h"
-
+#include "statev.h"
#include "beabi.h"
#include "bechordal_t.h"
#include "be.h"
ir_node *node)
{
const arch_register_req_t *req = arch_get_irn_register_req(node);
- if (req->type & arch_register_req_type_limited) {
+ if (arch_register_req_is(req, limited)) {
const unsigned *limited = req->limited;
float penalty = weight * DEF_FACTOR;
give_penalties_for_limits(live_nodes, penalty, limited, node);
}
- if (req->type & arch_register_req_type_should_be_same) {
+ if (arch_register_req_is(req, should_be_same)) {
ir_node *insn = skip_Proj(node);
allocation_info_t *info = get_allocation_info(node);
int arity = get_irn_arity(insn);
if (is_Phi(node))
break;
- ir_node *value;
be_foreach_definition(node, cls, value,
check_defs(&live_nodes, weight, value);
);
const arch_register_req_t *req
= arch_get_irn_register_req_in(node, i);
- if (!(req->type & arch_register_req_type_limited))
+ if (!arch_register_req_is(req, limited))
continue;
const unsigned *limited = req->limited;
const arch_register_req_t *req = arch_get_irn_register_req(node);
/* should be same constraint? */
- if (req->type & arch_register_req_type_should_be_same) {
+ if (arch_register_req_is(req, should_be_same)) {
const ir_node *insn = skip_Proj_const(node);
int arity = get_irn_arity(insn);
unsigned node_idx = get_irn_idx(node);
/* check should be same constraints */
ir_node *last_phi = NULL;
sched_foreach_reverse(block, node) {
- ir_node *value;
if (is_Phi(node)) {
last_phi = node;
break;
allocation_info_t *info = get_allocation_info(to_split);
float delta = 0;
- /* stupid hack: don't optimisticallt split don't spill nodes...
+ /* stupid hack: don't optimistically split don't spill nodes...
* (so we don't split away the values produced because of
* must_be_different constraints) */
ir_node *original_insn = skip_Proj(info->original_value);
}
/* ignore reqs must be preassigned */
- assert (! (req->type & arch_register_req_type_ignore));
+ assert(!arch_register_req_is(req, ignore));
/* give should_be_same boni */
allocation_info_t *info = get_allocation_info(node);
ir_node *in_node = skip_Proj(node);
- if (req->type & arch_register_req_type_should_be_same) {
+ if (arch_register_req_is(req, should_be_same)) {
float weight = (float)get_block_execfreq(block);
int arity = get_irn_arity(in_node);
DB((dbg, LEVEL_2, "\n"));
const unsigned *allowed_regs = normal_regs;
- if (req->type & arch_register_req_type_limited) {
+ if (arch_register_req_is(req, limited)) {
allowed_regs = req->limited;
}
continue;
/* alignment constraint? */
if (width > 1) {
- if ((req->type & arch_register_req_type_aligned)
- && (final_reg_index % width) != 0)
+ if (arch_register_req_is(req, aligned) && (final_reg_index % width) != 0)
continue;
bool fine = true;
for (unsigned r0 = r+1; r0 < r+width; ++r0) {
continue;
const arch_register_req_t *req = arch_get_irn_register_req_in(node, i);
- if (!(req->type & arch_register_req_type_limited))
+ if (!arch_register_req_is(req, limited))
continue;
const unsigned *limited = req->limited;
double_width = true;
const arch_register_t *reg = arch_get_irn_register(op);
unsigned reg_index = reg->index;
- if (req->type & arch_register_req_type_aligned) {
+ if (arch_register_req_is(req, aligned)) {
if (!is_aligned(reg_index, req->width)) {
good = false;
continue;
}
}
- if (!(req->type & arch_register_req_type_limited))
+ if (!arch_register_req_is(req, limited))
continue;
const unsigned *limited = req->limited;
}
/* is any of the live-throughs using a constrained output register? */
- ir_node *value;
unsigned *live_through_regs = NULL;
be_foreach_definition(node, cls, value,
+ (void)value;
if (req_->width > 1)
double_width = true;
- if (! (req_->type & arch_register_req_type_limited))
+ if (!arch_register_req_is(req_, limited))
continue;
if (live_through_regs == NULL) {
- rbitset_alloca(live_through_regs, n_regs);
+ live_through_regs = rbitset_alloca(n_regs);
determine_live_through_regs(live_through_regs, node);
}
rbitset_or(forbidden_regs, req_->limited, n_regs);
/* create these arrays if we haven't yet */
if (live_through_regs == NULL) {
- rbitset_alloca(live_through_regs, n_regs);
+ live_through_regs = rbitset_alloca(n_regs);
}
if (double_width) {
continue;
const arch_register_req_t *req = arch_get_irn_register_req_in(node, i);
- if (!(req->type & arch_register_req_type_limited))
+ if (!arch_register_req_is(req, limited))
continue;
const unsigned *limited = req->limited;
ir_node *op = pred_info->assignments[a];
const arch_register_t *op_reg = arch_get_irn_register(op);
- /* virtual or joker registers are ok too */
- if ((op_reg->type & arch_register_type_joker)
- || (op_reg->type & arch_register_type_virtual))
+ /* Virtual registers are ok, too. */
+ if (op_reg->type & arch_register_type_virtual)
continue;
permutation[regn] = a;
if (req->cls != cls)
continue;
- if (req->type & arch_register_req_type_ignore) {
+ if (arch_register_req_is(req, limited)) {
allocation_info_t *info = get_allocation_info(node);
info->current_value = node;
ir_nodeset_insert(&live_nodes, node);
}
- unsigned *forbidden_regs; /**< collects registers which must
- not be used for optimistic splits */
- rbitset_alloca(forbidden_regs, n_regs);
+ /** Collects registers which must not be used for optimistic splits. */
+ unsigned *const forbidden_regs = rbitset_alloca(n_regs);
/* handle phis... */
assign_phi_registers(block);
free_last_uses(&live_nodes, node);
/* assign output registers */
- ir_node *value;
be_foreach_definition_(node, cls, value,
assign_reg(block, value, forbidden_regs);
);