a->offset = 0;
a->base.exc.pin_state = op_pin_state_pinned;
- be_node_set_reg_class_in(res, be_pos_Spill_frame, cls_frame);
- be_node_set_reg_class_in(res, be_pos_Spill_val, cls);
+ be_node_set_reg_class_in(res, n_be_Spill_frame, cls_frame);
+ be_node_set_reg_class_in(res, n_be_Spill_val, cls);
/*
* For spills and reloads, we return "none" as requirement for frame
* pointer, so every input is ok. Some backends need this (STA).
* Matze: we should investigate if this is really needed, this solution
* looks very hacky to me
*/
- be_set_constr_in(res, be_pos_Spill_frame, arch_no_register_req);
+ be_set_constr_in(res, n_be_Spill_frame, arch_no_register_req);
- arch_set_out_register_req(res, 0, arch_no_register_req);
+ arch_set_irn_register_req_out(res, 0, arch_no_register_req);
return res;
}
init_node_attr(res, 2, 1);
be_node_set_reg_class_out(res, 0, cls);
- be_node_set_reg_class_in(res, be_pos_Reload_frame, cls_frame);
- arch_irn_set_flags(res, arch_irn_flags_rematerializable);
+ be_node_set_reg_class_in(res, n_be_Reload_frame, cls_frame);
+ arch_set_irn_flags(res, arch_irn_flags_rematerializable);
a = (be_frame_attr_t*) get_irn_generic_attr(res);
a->ent = NULL;
* Matze: we should investigate if this is really needed, this solution
* looks very hacky to me
*/
- be_set_constr_in(res, be_pos_Reload_frame, arch_no_register_req);
+ be_set_constr_in(res, n_be_Reload_frame, arch_no_register_req);
return res;
}
ir_node *be_get_Reload_mem(const ir_node *irn)
{
assert(be_is_Reload(irn));
- return get_irn_n(irn, be_pos_Reload_mem);
+ return get_irn_n(irn, n_be_Reload_mem);
}
ir_node *be_get_Reload_frame(const ir_node *irn)
{
assert(be_is_Reload(irn));
- return get_irn_n(irn, be_pos_Reload_frame);
+ return get_irn_n(irn, n_be_Reload_frame);
}
ir_node *be_get_Spill_val(const ir_node *irn)
{
assert(be_is_Spill(irn));
- return get_irn_n(irn, be_pos_Spill_val);
+ return get_irn_n(irn, n_be_Spill_val);
}
ir_node *be_get_Spill_frame(const ir_node *irn)
{
assert(be_is_Spill(irn));
- return get_irn_n(irn, be_pos_Spill_frame);
+ return get_irn_n(irn, n_be_Spill_frame);
}
ir_node *be_new_Perm(const arch_register_class_t *cls, ir_node *block,
ir_node *be_get_Copy_op(const ir_node *cpy)
{
- return get_irn_n(cpy, be_pos_Copy_op);
+ return get_irn_n(cpy, n_be_Copy_op);
}
void be_set_Copy_op(ir_node *cpy, ir_node *op)
{
- set_irn_n(cpy, be_pos_Copy_op, op);
+ set_irn_n(cpy, n_be_Copy_op, op);
}
ir_node *be_new_Keep(ir_node *block, int n, ir_node *in[])
ir_type *call_tp)
{
be_call_attr_t *a;
- int real_n = be_pos_Call_first_arg + n;
+ int real_n = n_be_Call_first_arg + n;
ir_node *irn;
ir_node **real_in;
NEW_ARR_A(ir_node *, real_in, real_n);
- real_in[be_pos_Call_mem] = mem;
- real_in[be_pos_Call_sp] = sp;
- real_in[be_pos_Call_ptr] = ptr;
- memcpy(&real_in[be_pos_Call_first_arg], in, n * sizeof(in[0]));
+ real_in[n_be_Call_mem] = mem;
+ real_in[n_be_Call_sp] = sp;
+ real_in[n_be_Call_ptr] = ptr;
+ memcpy(&real_in[n_be_Call_first_arg], in, n * sizeof(in[0]));
irn = new_ir_node(dbg, irg, bl, op_be_Call, mode_T, real_n, real_in);
init_node_attr(irn, real_n, n_outs);
ir_node *sz)
{
ir_node *irn;
- ir_node *in[be_pos_AddSP_last];
- const arch_register_class_t *cls;
+ ir_node *in[n_be_AddSP_last];
ir_graph *irg;
be_node_attr_t *attr;
- in[be_pos_AddSP_old_sp] = old_sp;
- in[be_pos_AddSP_size] = sz;
+ in[n_be_AddSP_old_sp] = old_sp;
+ in[n_be_AddSP_size] = sz;
irg = get_Block_irg(bl);
- irn = new_ir_node(NULL, irg, bl, op_be_AddSP, mode_T, be_pos_AddSP_last, in);
- init_node_attr(irn, be_pos_AddSP_last, pn_be_AddSP_last);
+ irn = new_ir_node(NULL, irg, bl, op_be_AddSP, mode_T, n_be_AddSP_last, in);
+ init_node_attr(irn, n_be_AddSP_last, pn_be_AddSP_last);
attr = (be_node_attr_t*) get_irn_generic_attr(irn);
attr->exc.pin_state = op_pin_state_pinned;
/* Set output constraint to stack register. */
- be_set_constr_single_reg_in(irn, be_pos_AddSP_old_sp, sp,
+ be_set_constr_single_reg_in(irn, n_be_AddSP_old_sp, sp,
arch_register_req_type_none);
- be_node_set_reg_class_in(irn, be_pos_AddSP_size, arch_register_get_class(sp));
+ be_node_set_reg_class_in(irn, n_be_AddSP_size, sp->reg_class);
be_set_constr_single_reg_out(irn, pn_be_AddSP_sp, sp,
arch_register_req_type_produces_sp);
- cls = arch_register_get_class(sp);
-
return irn;
}
ir_node *be_new_SubSP(const arch_register_t *sp, ir_node *bl, ir_node *old_sp, ir_node *sz)
{
ir_node *irn;
- ir_node *in[be_pos_SubSP_last];
+ ir_node *in[n_be_SubSP_last];
ir_graph *irg;
be_node_attr_t *attr;
- in[be_pos_SubSP_old_sp] = old_sp;
- in[be_pos_SubSP_size] = sz;
+ in[n_be_SubSP_old_sp] = old_sp;
+ in[n_be_SubSP_size] = sz;
irg = get_Block_irg(bl);
- irn = new_ir_node(NULL, irg, bl, op_be_SubSP, mode_T, be_pos_SubSP_last, in);
- init_node_attr(irn, be_pos_SubSP_last, pn_be_SubSP_last);
+ irn = new_ir_node(NULL, irg, bl, op_be_SubSP, mode_T, n_be_SubSP_last, in);
+ init_node_attr(irn, n_be_SubSP_last, pn_be_SubSP_last);
attr = (be_node_attr_t*) get_irn_generic_attr(irn);
attr->exc.pin_state = op_pin_state_pinned;
/* Set output constraint to stack register. */
- be_set_constr_single_reg_in(irn, be_pos_SubSP_old_sp, sp,
+ be_set_constr_single_reg_in(irn, n_be_SubSP_old_sp, sp,
arch_register_req_type_none);
- be_node_set_reg_class_in(irn, be_pos_SubSP_size, arch_register_get_class(sp));
+ be_node_set_reg_class_in(irn, n_be_SubSP_size, sp->reg_class);
be_set_constr_single_reg_out(irn, pn_be_SubSP_sp, sp, arch_register_req_type_produces_sp);
return irn;
ir_node *be_get_FrameAddr_frame(const ir_node *node)
{
assert(be_is_FrameAddr(node));
- return get_irn_n(node, be_pos_FrameAddr_ptr);
+ return get_irn_n(node, n_be_FrameAddr_ptr);
}
ir_entity *be_get_FrameAddr_entity(const ir_node *node)
ir_node *be_get_CopyKeep_op(const ir_node *cpy)
{
- return get_irn_n(cpy, be_pos_CopyKeep_op);
+ return get_irn_n(cpy, n_be_CopyKeep_op);
}
void be_set_CopyKeep_op(ir_node *cpy, ir_node *op)
{
- set_irn_n(cpy, be_pos_CopyKeep_op, op);
+ set_irn_n(cpy, n_be_CopyKeep_op, op);
}
static bool be_has_frame_entity(const ir_node *irn)
if (additional_types == 0) {
req = reg->single_req;
} else {
- ir_graph *irg = get_irn_irg(node);
struct obstack *obst = be_get_be_obst(irg);
req = be_create_reg_req(obst, reg, additional_types);
}
- arch_irn_set_register(node, pos, reg);
+ arch_set_irn_register_out(node, pos, reg);
be_set_constr_out(node, pos, req);
}
{
ir_graph *irg = get_Block_irg(block);
ir_node *frame = get_irg_frame(irg);
- const arch_register_class_t *cls = arch_get_irn_reg_class_out(irn);
- const arch_register_class_t *cls_frame = arch_get_irn_reg_class_out(frame);
+ const arch_register_class_t *cls = arch_get_irn_reg_class(irn);
+ const arch_register_class_t *cls_frame = arch_get_irn_reg_class(frame);
ir_node *spill;
spill = be_new_Spill(cls, cls_frame, block, frame, irn);
ir_node *bl = is_Block(insert) ? insert : get_nodes_block(insert);
ir_graph *irg = get_Block_irg(bl);
ir_node *frame = get_irg_frame(irg);
- const arch_register_class_t *cls_frame = arch_get_irn_reg_class_out(frame);
+ const arch_register_class_t *cls_frame = arch_get_irn_reg_class(frame);
assert(be_is_Spill(spill) || (is_Phi(spill) && get_irn_mode(spill) == mode_M));
NULL, /* perform_memory_operand */
};
+static int get_start_reg_index(ir_graph *irg, const arch_register_t *reg)
+{
+ ir_node *start = get_irg_start(irg);
+ unsigned n_outs = arch_get_irn_n_outs(start);
+ int i;
+
+ /* do a naive linear search... */
+ for (i = 0; i < (int)n_outs; ++i) {
+ const arch_register_req_t *out_req
+ = arch_get_irn_register_req_out(start, i);
+ if (! (out_req->type & arch_register_req_type_limited))
+ continue;
+ if (out_req->cls != arch_register_get_class(reg))
+ continue;
+ if (!rbitset_is_set(out_req->limited, reg->index))
+ continue;
+ return i;
+ }
+ panic("Tried querying undefined register '%s' at Start", reg->name);
+}
+
+ir_node *be_get_initial_reg_value(ir_graph *irg, const arch_register_t *reg)
+{
+ int i = get_start_reg_index(irg, reg);
+ ir_node *start = get_irg_start(irg);
+ ir_mode *mode = arch_register_class_mode(arch_register_get_class(reg));
+ const ir_edge_t *edge;
+
+ foreach_out_edge(start, edge) {
+ ir_node *proj = get_edge_src_irn(edge);
+ if (!is_Proj(proj)) // maybe End/Anchor
+ continue;
+ if (get_Proj_proj(proj) == i) {
+ return proj;
+ }
+ }
+ return new_r_Proj(start, mode, i);
+}
+
+int be_find_return_reg_input(ir_node *ret, const arch_register_t *reg)
+{
+ int arity = get_irn_arity(ret);
+ int i;
+ /* do a naive linear search... */
+ for (i = 0; i < arity; ++i) {
+ const arch_register_req_t *req = arch_get_irn_register_req_in(ret, i);
+ if (! (req->type & arch_register_req_type_limited))
+ continue;
+ if (req->cls != arch_register_get_class(reg))
+ continue;
+ if (!rbitset_is_set(req->limited, reg->index))
+ continue;
+ return i;
+ }
+ panic("Tried querying undefined register '%s' at Return", reg->name);
+}
+
static arch_irn_class_t dummy_classify(const ir_node *node)
{
(void) node;
}
if (be_is_IncSP(irn)) {
const be_incsp_attr_t *attr = (const be_incsp_attr_t*)get_irn_generic_attr_const(irn);
- if (attr->offset == BE_STACK_FRAME_SIZE_EXPAND) {
- fprintf(f, " [Setup Stackframe] ");
- } else if (attr->offset == BE_STACK_FRAME_SIZE_SHRINK) {
- fprintf(f, " [Destroy Stackframe] ");
- } else {
- fprintf(f, " [%d] ", attr->offset);
- }
+ fprintf(f, " [%d] ", attr->offset);
}
break;
case dump_node_info_txt:
case beo_IncSP: {
const be_incsp_attr_t *a = (const be_incsp_attr_t*)get_irn_generic_attr_const(irn);
fprintf(f, "align: %d\n", a->align);
- if (a->offset == BE_STACK_FRAME_SIZE_EXPAND)
- fprintf(f, "offset: FRAME_SIZE\n");
- else if (a->offset == BE_STACK_FRAME_SIZE_SHRINK)
- fprintf(f, "offset: -FRAME SIZE\n");
- else
- fprintf(f, "offset: %d\n", a->offset);
+ fprintf(f, "offset: %d\n", a->offset);
break;
}
case beo_Call: {
op_be_Keep = new_ir_op(beo_Keep, "be_Keep", op_pin_state_exc_pinned, irop_flag_keep, oparity_dynamic, 0, sizeof(be_node_attr_t), &be_node_op_ops);
op_be_CopyKeep = new_ir_op(beo_CopyKeep, "be_CopyKeep", op_pin_state_exc_pinned, irop_flag_keep, oparity_variable, 0, sizeof(be_node_attr_t), &be_node_op_ops);
op_be_Call = new_ir_op(beo_Call, "be_Call", op_pin_state_exc_pinned, irop_flag_fragile|irop_flag_uses_memory, oparity_variable, 0, sizeof(be_call_attr_t), &be_node_op_ops);
+ ir_op_set_fragile_indices(op_be_Call, n_be_Call_mem, pn_be_Call_X_regular, pn_be_Call_X_except);
op_be_Return = new_ir_op(beo_Return, "be_Return", op_pin_state_exc_pinned, irop_flag_cfopcode, oparity_dynamic, 0, sizeof(be_return_attr_t), &be_node_op_ops);
op_be_AddSP = new_ir_op(beo_AddSP, "be_AddSP", op_pin_state_exc_pinned, irop_flag_none, oparity_unary, 0, sizeof(be_node_attr_t), &be_node_op_ops);
op_be_SubSP = new_ir_op(beo_SubSP, "be_SubSP", op_pin_state_exc_pinned, irop_flag_none, oparity_unary, 0, sizeof(be_node_attr_t), &be_node_op_ops);