#include "irprintf.h"
#include "iroptimize.h"
#include "firmstat.h"
-#include "execfreq.h"
+#include "execfreq_t.h"
#include "irprofile.h"
#include "irpass_t.h"
+#include "ircons.h"
#include "bearch.h"
#include "be_t.h"
#include "belower.h"
#include "bestat.h"
#include "beverify.h"
-#include "be_dbgout.h"
#include "beirg.h"
#include "bestack.h"
#include "beemitter.h"
#define NEW_ID(s) new_id_from_chars(s, sizeof(s) - 1)
/* options visible for anyone */
-static be_options_t be_options = {
+be_options_t be_options = {
DUMP_NONE, /* dump flags */
BE_TIME_OFF, /* no timing */
false, /* profile_generate */
"", /* ilp solver */
0, /* enable statistic event dumping */
"", /* print stat events */
+ 1, /* verbose assembler output */
};
/* back end instruction set architecture to use */
LC_OPT_ENT_BOOL ("profileuse", "use existing profile data", &be_options.opt_profile_use),
LC_OPT_ENT_BOOL ("statev", "dump statistic events", &be_options.statev),
LC_OPT_ENT_STR ("filtev", "filter for stat events (regex if support is active", be_options.filtev),
+ LC_OPT_ENT_BOOL ("verboseasm", "enable verbose assembler output", &be_options.verbose_asm),
LC_OPT_ENT_STR("ilp.server", "the ilp server name", be_options.ilp_server),
LC_OPT_ENT_STR("ilp.solver", "the ilp solver name", be_options.ilp_solver),
if (isa_initialized)
return;
isa_if->init();
+ isa_initialized = true;
+}
+
+static void finish_isa(void)
+{
+ if (isa_initialized) {
+ isa_if->finish();
+ isa_initialized = false;
+ }
}
void be_init_default_asm_constraint_flags(void)
/* Finalize the Firm backend. */
void firm_be_finish(void)
{
+ finish_isa();
be_quit_modules();
}
return isa_if->get_params();
}
+int be_is_big_endian(void)
+{
+ return be_get_backend_param()->byte_order_big_endian;
+}
+
+unsigned be_get_machine_size(void)
+{
+ return be_get_backend_param()->machine_size;
+}
+
+ir_mode *be_get_mode_float_arithmetic(void)
+{
+ return be_get_backend_param()->mode_float_arithmetic;
+}
+
+ir_type *be_get_type_long_long(void)
+{
+ return be_get_backend_param()->type_long_long;
+}
+
+ir_type *be_get_type_unsigned_long_long(void)
+{
+ return be_get_backend_param()->type_unsigned_long_long;
+}
+
+ir_type *be_get_type_long_double(void)
+{
+ return be_get_backend_param()->type_long_double;
+}
+
/**
* Initializes the main environment for the backend.
*
const char *compilation_unit_name)
{
memset(env, 0, sizeof(*env));
- env->options = &be_options;
env->file_handle = file_handle;
env->ent_trampoline_map = pmap_create();
env->pic_trampolines_type = new_type_class(NEW_ID("$PIC_TRAMPOLINE_TYPE"));
birg->irg = irg;
birg->main_env = env;
obstack_init(&birg->obst);
+ birg->lv = be_liveness_new(irg);
- edges_deactivate_kind(irg, EDGE_KIND_DEP);
- edges_activate_kind(irg, EDGE_KIND_DEP);
+ edges_deactivate(irg);
+ edges_activate(irg);
/* set the current graph (this is important for several firm functions) */
current_ir_graph = irg;
remove_bads(irg);
/* Ensure, that the ir_edges are computed. */
- edges_assure(irg);
+ assure_edges(irg);
- set_irg_phase_state(irg, phase_backend);
+ add_irg_constraints(irg, IR_GRAPH_CONSTRAINT_BACKEND);
be_info_init_irg(irg);
dump(DUMP_INITIAL, irg, "prepared");
case T_CODEGEN: return "codegen";
case T_RA_PREPARATION: return "ra_preparation";
case T_SCHED: return "sched";
+ case T_SPLIT: return "split";
case T_CONSTR: return "constr";
case T_FINISH: return "finish";
case T_EMIT: return "emit";
initialize_isa();
- /* shouldn't lower program twice */
- assert(get_irp_phase_state() != phase_low);
-
isa_if->lower_for_target();
/* set the phase to low */
for (i = get_irp_n_irgs(); i > 0;) {
ir_graph *irg = get_irp_irg(--i);
- set_irg_phase_state(irg, phase_low);
+ assert(!irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_TARGET_LOWERED));
+ add_irg_constraints(irg, IR_GRAPH_CONSTRAINT_TARGET_LOWERED);
}
- set_irp_phase_state(phase_low);
}
/**
{
static const char suffix[] = ".prof";
- size_t i, num_birgs;
+ size_t i;
+ size_t num_irgs;
+ size_t num_birgs;
be_main_env_t env;
char prof_filename[256];
be_irg_t *birgs;
be_timing = (be_options.timing == BE_TIME_ON);
/* perform target lowering if it didn't happen yet */
- if (get_irp_phase_state() != phase_low)
+ if (get_irp_n_irgs() > 0 && !irg_is_constrained(get_irp_irg(0), IR_GRAPH_CONSTRAINT_TARGET_LOWERED))
be_lower_for_target();
if (be_timing) {
arch_env = env.arch_env;
/* we might need 1 birg more for instrumentation constructor */
- num_birgs = get_irp_n_irgs();
- birgs = ALLOCAN(be_irg_t, num_birgs + 1);
+ num_irgs = get_irp_n_irgs();
+ birgs = ALLOCAN(be_irg_t, num_irgs + 1);
be_info_init();
/* First: initialize all birgs */
- for (i = 0; i < num_birgs; ++i) {
- ir_graph *irg = get_irp_irg(i);
- initialize_birg(&birgs[i], irg, &env);
+ num_birgs = 0;
+ for (i = 0; i < num_irgs; ++i) {
+ ir_graph *irg = get_irp_irg(i);
+ ir_entity *entity = get_irg_entity(irg);
+ if (get_entity_linkage(entity) & IR_LINKAGE_NO_CODEGEN)
+ continue;
+ initialize_birg(&birgs[num_birgs++], irg, &env);
}
arch_env_handle_intrinsics(arch_env);
sprintf(prof_filename, "%.*s%s",
(int)(sizeof(prof_filename) - sizeof(suffix)), cup_name, suffix);
+ bool have_profile = false;
if (be_options.opt_profile_use) {
bool res = ir_profile_read(prof_filename);
if (!res) {
fprintf(stderr, "Warning: Couldn't read profile data '%s'\n",
prof_filename);
+ } else {
+ ir_create_execfreqs_from_profile();
+ ir_profile_free();
+ have_profile = true;
}
}
+
if (num_birgs > 0 && be_options.opt_profile_generate) {
- ir_graph *prof_init_irg
- = ir_profile_instrument(prof_filename);
+ ir_graph *const prof_init_irg = ir_profile_instrument(prof_filename);
+ assert(prof_init_irg->be_data == NULL);
initialize_birg(&birgs[num_birgs], prof_init_irg, &env);
num_birgs++;
+ num_irgs++;
+ assert(num_irgs == get_irp_n_irgs());
+ }
+
+ for (be_timer_id_t t = T_FIRST; t < T_LAST+1; ++t) {
+ ir_timer_init_parent(be_timers[t]);
+ }
+ if (!have_profile) {
+ be_timer_push(T_EXECFREQ);
+ for (i = 0; i < num_irgs; ++i) {
+ ir_graph *irg = get_irp_irg(i);
+ ir_estimate_execfreq(irg);
+ }
+ be_timer_pop(T_EXECFREQ);
}
/* For all graphs */
current_ir_graph = irg;
if (stat_ev_enabled) {
- stat_ev_ctx_push_fobj("bemain_irg", irg);
- be_stat_ev("bemain_insns_start", be_count_insns(irg));
- be_stat_ev("bemain_blocks_start", be_count_blocks(irg));
+ stat_ev_ctx_push_fmt("bemain_irg", "%+F", irg);
+ stat_ev_ull("bemain_insns_start", be_count_insns(irg));
+ stat_ev_ull("bemain_blocks_start", be_count_blocks(irg));
}
/* stop and reset timers */
be_timer_push(T_VERIFY);
if (be_options.verify_option == BE_VERIFY_WARN) {
irg_verify(irg, VERIFY_ENFORCE_SSA);
- be_check_dominance(irg);
} else if (be_options.verify_option == BE_VERIFY_ASSERT) {
assert(irg_verify(irg, VERIFY_ENFORCE_SSA) && "irg verification failed");
- assert(be_check_dominance(irg) && "Dominance verification failed");
}
be_timer_pop(T_VERIFY);
dump(DUMP_PREPARED, irg, "before-code-selection");
- if (be_options.verify_option == BE_VERIFY_WARN) {
- be_check_dominance(irg);
- } else if (be_options.verify_option == BE_VERIFY_ASSERT) {
- assert(be_check_dominance(irg) && "Dominance verification failed");
- }
-
/* perform codeselection */
be_timer_push(T_CODEGEN);
if (arch_env->impl->prepare_graph != NULL)
arch_env->impl->prepare_graph(irg);
be_timer_pop(T_CODEGEN);
- if (be_options.verify_option == BE_VERIFY_WARN) {
- be_check_dominance(irg);
- } else if (be_options.verify_option == BE_VERIFY_ASSERT) {
- assert(be_check_dominance(irg) && "Dominance verification failed");
- }
-
dump(DUMP_PREPARED, irg, "code-selection");
- be_timer_push(T_EXECFREQ);
- /**
- * Create execution frequencies from profile data or estimate some
- */
- if (ir_profile_has_data())
- birg->exec_freq = ir_create_execfreqs_from_profile(irg);
- else {
- /* TODO: edges are corrupt for EDGE_KIND_BLOCK after the local
- * optimize graph phase merges blocks in the x86 backend */
- edges_deactivate(irg);
- birg->exec_freq = compute_execfreq(irg, 10);
- }
- be_timer_pop(T_EXECFREQ);
-
-
/* disabled for now, fails for EmptyFor.c and XXEndless.c */
/* be_live_chk_compare(irg); */
be_timer_pop(T_VERIFY);
if (stat_ev_enabled) {
- stat_ev_dbl("bemain_costs_before_ra",
- be_estimate_irg_costs(irg, birg->exec_freq));
- be_stat_ev("bemain_insns_before_ra", be_count_insns(irg));
- be_stat_ev("bemain_blocks_before_ra", be_count_blocks(irg));
+ stat_ev_dbl("bemain_costs_before_ra", be_estimate_irg_costs(irg));
+ stat_ev_ull("bemain_insns_before_ra", be_count_insns(irg));
+ stat_ev_ull("bemain_blocks_before_ra", be_count_blocks(irg));
}
/* Do register allocation */
be_allocate_registers(irg);
- stat_ev_dbl("bemain_costs_before_ra", be_estimate_irg_costs(irg, birg->exec_freq));
+ stat_ev_dbl("bemain_costs_before_ra", be_estimate_irg_costs(irg));
dump(DUMP_RA, irg, "ra");
be_timer_push(T_FINISH);
- if (arch_env->impl->finish != NULL)
- arch_env->impl->finish(irg);
+ if (arch_env->impl->finish_graph != NULL)
+ arch_env->impl->finish_graph(irg);
be_timer_pop(T_FINISH);
dump(DUMP_FINAL, irg, "finish");
if (stat_ev_enabled) {
- be_stat_ev("bemain_insns_finish", be_count_insns(irg));
- be_stat_ev("bemain_blocks_finish", be_count_blocks(irg));
+ stat_ev_ull("bemain_insns_finish", be_count_insns(irg));
+ stat_ev_ull("bemain_blocks_finish", be_count_blocks(irg));
}
/* check schedule and register allocation */
be_timer_push(T_VERIFY);
if (be_options.verify_option == BE_VERIFY_WARN) {
irg_verify(irg, VERIFY_ENFORCE_SSA);
- be_check_dominance(irg);
be_verify_schedule(irg);
be_verify_register_allocation(irg);
} else if (be_options.verify_option == BE_VERIFY_ASSERT) {
assert(irg_verify(irg, VERIFY_ENFORCE_SSA) && "irg verification failed");
- assert(be_check_dominance(irg) && "Dominance verification failed");
assert(be_verify_schedule(irg) && "Schedule verification failed");
assert(be_verify_register_allocation(irg)
&& "register allocation verification failed");
}
}
for (t = T_FIRST; t < T_LAST+1; ++t) {
- ir_timer_stop(be_timers[t]);
ir_timer_reset(be_timers[t]);
}
}
arch_env_end_codegeneration(arch_env);
- ir_profile_free();
be_done_env(&env);
be_info_free();