"cplex" /* ilp solver */
};
+/* config file. */
+static char config_file[256] = { 0 };
+
/* dump flags */
static unsigned dump_flags = 0;
/* schedule selector options. */
static const lc_opt_enum_int_items_t sched_select_items[] = {
- { "isa", BE_SCHED_SELECT_ISA },
+ { "trivial", BE_SCHED_SELECT_TRIVIAL },
+ { "regpress", BE_SCHED_SELECT_REGPRESS },
{ "muchnik", BE_SCHED_SELECT_MUCHNIK },
{ "heur", BE_SCHED_SELECT_HEUR },
{ "hmuchnik", BE_SCHED_SELECT_HMUCHNIK },
};
static const lc_opt_table_entry_t be_main_options[] = {
- LC_OPT_ENT_ENUM_MASK("dump", "dump irg on several occasions", &dump_var),
- LC_OPT_ENT_ENUM_PTR ("ra", "register allocator", &ra_var),
- LC_OPT_ENT_ENUM_PTR ("isa", "the instruction set architecture", &isa_var),
- LC_OPT_ENT_NEGBOOL ("noomitfp", "do not omit frame pointer", &be_omit_fp),
- LC_OPT_ENT_ENUM_PTR ("vrfy", "verify the backend irg (off, warn, assert)", &vrfy_var),
- LC_OPT_ENT_BOOL ("time", "get backend timing statistics", &be_options.timing),
- LC_OPT_ENT_BOOL ("sched.mris", "enable mris schedule preparation", &be_options.mris),
- LC_OPT_ENT_ENUM_PTR ("sched.select", "schedule node selector (isa, muchnik, heur, hmuchnik)",&sched_select_var),
+ LC_OPT_ENT_STR ("config", "read another config file containing backend options", config_file, sizeof(config_file)),
+ LC_OPT_ENT_ENUM_MASK("dump", "dump irg on several occasions", &dump_var),
+ LC_OPT_ENT_ENUM_PTR ("ra", "register allocator", &ra_var),
+ LC_OPT_ENT_ENUM_PTR ("isa", "the instruction set architecture", &isa_var),
+ LC_OPT_ENT_NEGBOOL ("noomitfp", "do not omit frame pointer", &be_omit_fp),
+ LC_OPT_ENT_ENUM_PTR ("vrfy", "verify the backend irg (off, warn, assert)", &vrfy_var),
+ LC_OPT_ENT_BOOL ("time", "get backend timing statistics", &be_options.timing),
+ LC_OPT_ENT_BOOL ("sched.mris", "enable mris schedule preparation", &be_options.mris),
+ LC_OPT_ENT_ENUM_PTR ("sched.select", "schedule node selector (trivial, regpress, muchnik, heur, hmuchnik)", &sched_select_var),
#ifdef WITH_ILP
LC_OPT_ENT_STR ("ilp.server", "the ilp server name", be_options.ilp_server, sizeof(be_options.ilp_server)),
be_phi_handler_reset(birg->main_env->phi_handler);
}
+#ifdef WITH_LIBCORE
+
+#define BE_TIMER_PUSH(timer) \
+ if (be_options.timing == BE_TIME_ON) { \
+ int res = lc_timer_push(timer); \
+ if (vrfy_option == BE_VRFY_ASSERT) \
+ assert(res && "Timer already on stack, cannot be pushed twice."); \
+ else if (vrfy_option == BE_VRFY_WARN && ! res) \
+ fprintf(stderr, "Timer %s already on stack, cannot be pushed twice.\n", \
+ lc_timer_get_name(timer)); \
+ }
+#define BE_TIMER_POP(timer) \
+ if (be_options.timing == BE_TIME_ON) { \
+ lc_timer_t *tmp = lc_timer_pop(); \
+ if (vrfy_option == BE_VRFY_ASSERT) \
+ assert(tmp == timer && "Attempt to pop wrong timer."); \
+ else if (vrfy_option == BE_VRFY_WARN && tmp != timer) \
+ fprintf(stderr, "Attempt to pop wrong timer. %s is on stack, trying to pop %s.\n", \
+ lc_timer_get_name(tmp), lc_timer_get_name(timer)); \
+ timer = tmp; \
+ }
+
+#define BE_TIMER_ONLY(code) do { if (be_options.timing == BE_TIME_ON) { code; } } while(0)
+
+#else
+
+#define BE_TIMER_PUSH(timer)
+#define BE_TIMER_POP(timer)
+#define BE_TIMER_ONLY(code)
+
+#endif /* WITH_LIBCORE */
+
+
/**
* The Firm backend main loop.
* Do architecture specific lowering for all graphs
unsigned num_nodes_b = 0;
unsigned num_nodes_a = 0;
unsigned num_nodes_r = 0;
+
+#ifdef WITH_LIBCORE
lc_timer_t *t_prolog, *t_abi, *t_codegen, *t_sched, *t_constr, *t_regalloc, *t_finish, *t_emit, *t_other, *t_verify;
be_ra_timer_t *ra_timer;
t_verify = lc_timer_register("verify", "graph verification");
t_other = lc_timer_register("other", "other");
}
+#endif /* WITH_LIBCORE */
be_init_env(&env, file_handle);
/* for debugging, anchors helps */
// dump_all_anchors(1);
-#define BE_TIMER_PUSH(timer) \
- if (be_options.timing == BE_TIME_ON) { \
- int res = lc_timer_push(timer); \
- if (vrfy_option == BE_VRFY_ASSERT) \
- assert(res && "Timer already on stack, cannot be pushed twice."); \
- else if (vrfy_option == BE_VRFY_WARN && ! res) \
- fprintf(stderr, "Timer %s already on stack, cannot be pushed twice.\n", \
- lc_timer_get_name(timer)); \
- }
-#define BE_TIMER_POP(timer) \
- if (be_options.timing == BE_TIME_ON) { \
- lc_timer_t *tmp = lc_timer_pop(); \
- if (vrfy_option == BE_VRFY_ASSERT) \
- assert(tmp == timer && "Attempt to pop wrong timer."); \
- else if (vrfy_option == BE_VRFY_WARN && tmp != timer) \
- fprintf(stderr, "Attempt to pop wrong timer. %s is on stack, trying to pop %s.\n", \
- lc_timer_get_name(tmp), lc_timer_get_name(timer)); \
- timer = tmp; \
- }
-
-#define BE_TIMER_ONLY(code) if (be_options.timing == BE_TIME_ON) do { code; } while(0)
-
/* For all graphs */
for (i = 0, n = get_irp_n_irgs(); i < n; ++i) {
ir_graph *irg = get_irp_irg(i);
optimization_state_t state;
/* stop and reset timers */
- if (be_options.timing == BE_TIME_ON) {
+ BE_TIMER_ONLY(
LC_STOP_AND_RESET_TIMER(t_prolog);
LC_STOP_AND_RESET_TIMER(t_abi);
LC_STOP_AND_RESET_TIMER(t_codegen);
LC_STOP_AND_RESET_TIMER(t_emit);
LC_STOP_AND_RESET_TIMER(t_verify);
LC_STOP_AND_RESET_TIMER(t_other);
- }
+ );
BE_TIMER_PUSH(t_other); /* t_other */
BE_TIMER_ONLY(num_nodes_b = get_num_reachable_nodes(irg));
BE_TIMER_POP(t_codegen);
/* Do register allocation */
- BE_TIMER_ONLY(lc_timer_start(t_regalloc));
+ BE_TIMER_PUSH(t_regalloc);
ra_timer = ra->allocate(&birg);
- BE_TIMER_ONLY(lc_timer_stop(t_regalloc));
+ BE_TIMER_PUSH(t_regalloc);
dump(DUMP_RA, irg, "-ra", dump_ir_block_graph_sched);
be_do_stat_nodes(irg, "06 Register Allocation");
/* fix stack offsets */
BE_TIMER_PUSH(t_abi);
- //be_abi_fix_stack_bias(birg.abi);
+ be_abi_fix_stack_nodes(birg.abi, NULL);
+ be_remove_dead_nodes_from_schedule(birg.irg);
+ be_abi_fix_stack_bias(birg.abi);
BE_TIMER_POP(t_abi);
BE_TIMER_PUSH(t_finish);
arch_code_generator_finish(birg.cg);
BE_TIMER_POP(t_finish);
- /* fix stack offsets */
- BE_TIMER_PUSH(t_abi);
- be_abi_fix_stack_nodes(birg.abi, NULL);
- be_remove_dead_nodes_from_schedule(birg.irg);
- be_abi_fix_stack_bias(birg.abi);
- BE_TIMER_POP(t_abi);
-
dump(DUMP_FINAL, irg, "-finish", dump_ir_block_graph_sched);
/* check schedule and register allocation */
#define LC_EMIT(timer) printf("%-20s: %.3lf msec\n", lc_timer_get_description(timer), (double)lc_timer_elapsed_usec(timer) / 1000.0)
#define LC_EMIT_RA(timer) printf("\t%-20s: %.3lf msec\n", lc_timer_get_description(timer), (double)lc_timer_elapsed_usec(timer) / 1000.0)
- if (be_options.timing == BE_TIME_ON) {
+ BE_TIMER_ONLY(
printf("==>> IRG %s <<==\n", get_entity_name(get_irg_entity(irg)));
printf("# nodes at begin: %u\n", num_nodes_b);
printf("# nodes before ra: %u\n", num_nodes_r);
LC_EMIT(t_emit);
LC_EMIT(t_verify);
LC_EMIT(t_other);
- }
+ );
+#undef LC_EMIT_RA
#undef LC_EMIT
/* switched off due to statistics (statistic module needs all irgs) */
{
#ifdef WITH_LIBCORE
lc_timer_t *t;
+#endif /* WITH_LIBCORE */
+
+#ifdef WITH_LIBCORE
+ /* The user specified another config file to read. do that now. */
+ if(strlen(config_file) > 0) {
+ FILE *f;
+
+ if((f = fopen(config_file, "rt")) != NULL) {
+ lc_opt_from_file(config_file, f, NULL);
+ fclose(f);
+ }
+ }
if (be_options.timing == BE_TIME_ON) {
t = lc_timer_register("bemain", "measure complete bemain loop");
else
bitset_clear_all(bs);
- assert(bitset_size(bs) == cls->n_regs);
+ assert(bitset_size(bs) == (unsigned) cls->n_regs);
arch_put_non_ignore_regs(birg->main_env->arch_env, cls, bs);
bitset_flip_all(bs);
be_abi_put_ignore_regs(birg->abi, cls, bs);
projects / libfirm / blobdiff