LC_OPT_ENT_ENUM_PTR("ra", "register allocator", &ra_var),
LC_OPT_ENT_ENUM_PTR("isa", "the instruction set architecture", &isa_var),
+#ifdef WITH_ILP
LC_OPT_ENT_STR ("ilp.server", "the ilp server name", be_options.ilp_server, sizeof(be_options.ilp_server)),
LC_OPT_ENT_STR ("ilp.solver", "the ilp solver name", be_options.ilp_solver, sizeof(be_options.ilp_solver)),
+#endif /* WITH_ILP */
{ NULL }
};
/* Register the irn handler of the architecture */
if (arch_isa_get_irn_handler(env->arch_env->isa))
- arch_env_add_irn_handler(env->arch_env, arch_isa_get_irn_handler(env->arch_env->isa));
+ arch_env_push_irn_handler(env->arch_env, arch_isa_get_irn_handler(env->arch_env->isa));
/*
* Register the node handler of the back end infrastructure.
* This irn handler takes care of the platform independent
* spill, reload and perm nodes.
*/
- arch_env_add_irn_handler(env->arch_env, &be_node_irn_handler);
+ arch_env_push_irn_handler(env->arch_env, &be_node_irn_handler);
return env;
}
/* Ensure, that the ir_edges are computed. */
edges_activate(irg);
- /* Compute loop nesting information (for weighting copies) */
- if (get_irg_loopinfo_state(irg) != (loopinfo_valid & loopinfo_cf_consistent))
- construct_cf_backedges(irg);
-
/* check, if the dominance property is fulfilled. */
be_check_dominance(irg);
dead_node_elimination(irg);
edges_activate(irg);
+ /* Compute loop nesting information (for weighting copies) */
+ construct_cf_backedges(irg);
+
dump(DUMP_PREPARED, irg, "-prepared", dump_ir_block_graph);
/* Schedule the graphs. */
arch_code_generator_before_sched(birg.cg);
list_sched(isa, irg);
- dump(DUMP_SCHED, irg, "-sched", dump_ir_block_graph_sched);
-
/* connect all stack modifying nodes together (see beabi.c) */
be_abi_fix_stack_nodes(birg.abi);
+ dump(DUMP_SCHED, irg, "-sched", dump_ir_block_graph_sched);
/* Verify the schedule */
sched_verify_irg(irg);