#ifdef WITH_LIBCORE
#include <libcore/lc_opts.h>
#include <libcore/lc_opts_enum.h>
-#endif
+#endif /* WITH_LIBCORE */
#include "obst.h"
#include "bitset.h"
#include "irloop_t.h"
#include "irtools.h"
+#include "bearch.h"
+#include "firm/bearch_firm.h"
+#include "ia32/bearch_ia32.h"
+
#include "be_t.h"
-#include "bechordal_t.h"
-#include "bera.h"
-#include "beifg.h"
-#include "beifg_impl.h"
#include "benumb_t.h"
+#include "beutil.h"
+#include "benode_t.h"
+#include "beirgmod.h"
#include "besched_t.h"
#include "belistsched.h"
#include "belive_t.h"
-#include "beutil.h"
-#include "bechordal.h"
-#include "bearch.h"
+#include "bespillilp.h"
+#include "bespillbelady.h"
+#include "bera.h"
+#include "beraextern.h"
+#include "bechordal_t.h"
+#include "beifg.h"
+#include "beifg_impl.h"
#include "becopyoptmain.h"
#include "becopystat.h"
#include "bessadestr.h"
-#include "benode_t.h"
-#include "beirgmod.h"
-#include "bespillilp.h"
-#include "bespillbelady.h"
-#include "firm/bearch_firm.h"
#define DUMP_INITIAL (1 << 0)
#define DUMP_SCHED (1 << 1)
#define DUMP_PREPARED (1 << 2)
-#define DUMP_FINAL (1 << 3)
+#define DUMP_RA (1 << 3)
+#define DUMP_FINAL (1 << 4)
/* options visible for anyone */
be_options_t be_options = {
};
/* dump flags */
-static unsigned dump_flags = 0;
+static unsigned dump_flags = DUMP_INITIAL | DUMP_SCHED | DUMP_PREPARED | DUMP_RA | DUMP_FINAL;
/* register allocator to use. */
static const be_ra_t *ra = &be_ra_chordal_allocator;
/* back end instruction set architecture to use */
-static const arch_isa_if_t *isa_if = &firm_isa;
+static const arch_isa_if_t *isa_if = &ia32_isa_if;
#ifdef WITH_LIBCORE
{ "initial", DUMP_INITIAL },
{ "sched", DUMP_SCHED },
{ "prepared", DUMP_PREPARED },
+ { "regalloc", DUMP_RA },
{ "final", DUMP_FINAL },
{ "all", 2 * DUMP_FINAL - 1 },
{ NULL, 0 }
/* register allocators */
static const lc_opt_enum_const_ptr_items_t ra_items[] = {
{ "chordal", &be_ra_chordal_allocator },
+ { "external", &be_ra_external_allocator },
{ NULL, NULL }
};
/* instruction set architectures. */
static const lc_opt_enum_const_ptr_items_t isa_items[] = {
{ "firm", &firm_isa },
+ { "ia32", &ia32_isa_if },
{ NULL, NULL }
};
};
static const lc_opt_table_entry_t be_main_options[] = {
- LC_OPT_ENT_ENUM_MASK("dump", "dump irg on several occasions", &dump_var),
- LC_OPT_ENT_ENUM_PTR("ra", "register allocator", &ra_var),
- LC_OPT_ENT_ENUM_PTR("isa", "the instruction set architecture", &isa_var),
+ LC_OPT_ENT_ENUM_MASK("dump", "dump irg on several occasions", &dump_var),
+ LC_OPT_ENT_ENUM_PTR("ra", "register allocator", &ra_var),
+ LC_OPT_ENT_ENUM_PTR("isa", "the instruction set architecture", &isa_var),
- LC_OPT_ENT_STR ("ilp.server", "the ilp server name", be_options.ilp_server, sizeof(be_options.ilp_server)),
- LC_OPT_ENT_STR ("ilp.solver", "the ilp solver name", be_options.ilp_solver, sizeof(be_options.ilp_solver)),
+ LC_OPT_ENT_STR ("ilp.server", "the ilp server name", be_options.ilp_server, sizeof(be_options.ilp_server)),
+ LC_OPT_ENT_STR ("ilp.solver", "the ilp solver name", be_options.ilp_solver, sizeof(be_options.ilp_solver)),
{ NULL }
};
-#endif
+#endif /* WITH_LIBCORE */
void be_opt_register(void)
{
#ifdef WITH_LIBCORE
int i;
+ lc_opt_entry_t *be_grp_ra;
be_grp_root = lc_opt_get_grp(firm_opt_get_root(), "be");
+ be_grp_ra = lc_opt_get_grp(be_grp_root, "ra");
lc_opt_add_table(be_grp_root, be_main_options);
- /* register register allocator options */
+ /* register allocator options */
for(i = 0; ra_items[i].name != NULL; ++i) {
const be_ra_t *ra = ra_items[i].value;
- ra->register_options(be_grp_root);
+ ra->register_options(be_grp_ra);
}
/* register isa options */
const arch_isa_if_t *isa = isa_items[i].value;
isa->register_options(be_grp_root);
}
-#endif
+#endif /* WITH_LIBCORE */
}
* This irn handler takes care of the platform independent
* spill, reload and perm nodes.
*/
- env->node_factory = obstack_alloc(&env->obst, sizeof(*env->node_factory));
- be_node_factory_init(env->node_factory, env->arch_env->isa);
- arch_env_add_irn_handler(env->arch_env, be_node_get_irn_handler(env->node_factory));
+ arch_env_add_irn_handler(env->arch_env, &be_node_irn_handler);
return env;
}
remove_critical_cf_edges(irg);
/* Compute the dominance information. */
- free_dom_and_peace(irg);
+ free_dom(irg);
compute_doms(irg);
/* Ensure, that the ir_edges are computed. */
be_check_dominance(irg);
}
-static void be_main_loop(void)
+static void be_main_loop(FILE *file_handle)
{
int i, n;
arch_isa_t *isa;
for(i = 0, n = get_irp_n_irgs(); i < n; ++i) {
ir_graph *irg = get_irp_irg(i);
- arch_code_generator_t *cg;
+ const arch_code_generator_if_t *cg_if;
DBG((env.dbg, LEVEL_2, "====> IRG: %F\n", irg));
dump(DUMP_INITIAL, irg, "-begin", dump_ir_block_graph);
/* set the current graph (this is important for several firm functions) */
current_ir_graph = irg;
+ /* Get the code generator interface. */
+ cg_if = isa->impl->get_code_generator_if(isa);
+
/* get a code generator for this graph. */
- cg = arch_isa_make_code_generator(isa, irg);
+ env.cg = cg_if->init(file_handle, irg, env.arch_env);
/* create the code generator and generate code. */
prepare_graph(&env, irg);
- arch_code_generator_prepare_graph(cg);
+ arch_code_generator_prepare_graph(env.cg);
edges_deactivate(irg);
dead_node_elimination(irg);
dump(DUMP_PREPARED, irg, "-prepared", dump_ir_block_graph);
/* Schedule the graphs. */
- arch_code_generator_before_sched(cg);
+ arch_code_generator_before_sched(env.cg);
list_sched(isa, irg);
dump(DUMP_SCHED, irg, "-sched", dump_ir_block_graph_sched);
sched_verify_irg(irg);
/* Do register allocation */
- arch_code_generator_before_ra(cg);
+ arch_code_generator_before_ra(env.cg);
ra->allocate(&env, irg);
- arch_code_generator_done(cg);
+ dump(DUMP_RA, irg, "-ra", dump_ir_block_graph_sched);
+
+ arch_code_generator_done(env.cg);
dump(DUMP_FINAL, irg, "-end", dump_ir_block_graph_sched);
}
be_done_env(&env);
}
-void be_main(int argc, const char *argv[])
+void be_main(FILE *file_handle)
{
- be_main_loop();
+ be_node_init();
+ be_main_loop(file_handle);
}
projects / libfirm / blobdiff