#include "arm/bearch_arm.h"
#include "ppc32/bearch_ppc32.h"
#include "mips/bearch_mips.h"
+// #include "sta/bearch_sta.h"
#include "be_t.h"
#include "benumb_t.h"
static const lc_opt_enum_const_ptr_items_t isa_items[] = {
{ "ia32", &ia32_isa_if },
#if 0
+ { "sta", &sta_isa_if },
{ "arm", &arm_isa_if },
{ "ppc32", &ppc32_isa_if },
{ "mips", &mips_isa_if },
isa->register_options(be_grp_root);
}
- /* scheduler register options */
+ /* list scheduler register options */
list_sched_register_options(be_grp_root);
+#ifdef WITH_ILP
+ /* ilp scheduler register options */
+ ilpsched_register_options(be_grp_root);
+#endif /* WITH_ILP */
+
be_block_schedule_register_options(be_grp_root);
}
#endif /* WITH_LIBCORE */
if(be_stat_ev_is_active()) {
ir_snprintf(irg_name, sizeof(irg_name), "%F", irg);
+ be_stat_tags[STAT_TAG_CLS] = "<all>";
be_stat_tags[STAT_TAG_IRG] = irg_name;
be_stat_ev_push(be_stat_tags, STAT_TAG_LAST, be_stat_file);
}
#ifdef WITH_ILP
case BE_SCHED_ILP:
be_ilp_sched(birg);
- fprintf(stderr, "Warning: ILP scheduler not yet fully implemented, falling back to list scheduler.\n");
- list_sched(birg, &be_options);
+ //fprintf(stderr, "Warning: ILP scheduler not yet fully implemented, falling back to list scheduler.\n");
+ //list_sched(birg, &be_options);
break;
#endif /* WITH_ILP */
};
arch_code_generator_before_ra(birg->cg);
BE_TIMER_POP(t_codegen);
+ if(be_stat_ev_is_active()) {
+ be_stat_ev_l("costs_before_ra",
+ (long) be_estimate_irg_costs(irg, env.arch_env, birg->execfreqs));
+ }
+
/* Do register allocation */
BE_TIMER_PUSH(t_regalloc);
ra_timer = ra->allocate(birg);
BE_TIMER_POP(t_regalloc);
+ if(be_stat_ev_is_active()) {
+ be_stat_ev_l("costs_after_ra",
+ (long) be_estimate_irg_costs(irg, env.arch_env, birg->execfreqs));
+ }
+
dump(DUMP_RA, irg, "-ra", dump_ir_block_graph_sched);
be_do_stat_nodes(irg, "06 Register Allocation");