#include <stdarg.h>
#include <stdio.h>
-#ifdef WITH_LIBCORE
#include <libcore/lc_opts.h>
#include <libcore/lc_opts_enum.h>
#include <libcore/lc_timing.h>
-#endif /* WITH_LIBCORE */
#include "obst.h"
#include "bitset.h"
#include "cfopt.h"
#include "execfreq.h"
-#include "bearch.h"
+#include "bearch_t.h"
#include "be_t.h"
#include "bemodule.h"
#include "beutil.h"
BE_TIME_OFF, /* no timing */
0, /* no opt profile */
1, /* try to omit frame pointer */
- 0, /* always stabs debugging output */
+ 0, /* no stabs debugging output */
BE_VRFY_WARN, /* verification level: warn */
BE_SCHED_LIST, /* scheduler: list scheduler */
"i44pc52.info.uni-karlsruhe.de", /* ilp server */
- "cplex" /* ilp solver */
+ "cplex", /* ilp solver */
+ "", /* filename for statistic output */
};
/* config file. */
/* back end instruction set architecture to use */
static const arch_isa_if_t *isa_if = NULL;
-#ifdef WITH_LIBCORE
-
/* possible dumping options */
static const lc_opt_enum_mask_items_t dump_items[] = {
{ "none", DUMP_NONE },
{ NULL }
};
-#endif /* WITH_LIBCORE */
-
static be_module_list_entry_t *isa_ifs = NULL;
void be_register_isa_if(const char *name, const arch_isa_if_t *isa)
void be_opt_register(void)
{
-#ifdef WITH_LIBCORE
lc_opt_entry_t *be_grp;
static int run_once = 0;
be_add_module_list_opt(be_grp, "isa", "the instruction set architecture",
&isa_ifs, (void**) &isa_if);
-#endif /* WITH_LIBCORE */
}
/* Parse one argument. */
int be_parse_arg(const char *arg) {
-#ifdef WITH_LIBCORE
lc_opt_entry_t *be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
if (strcmp(arg, "help") == 0 || (arg[0] == '?' && arg[1] == '\0')) {
lc_opt_print_help(be_grp, stdout);
return -1;
}
return lc_opt_from_single_arg(be_grp, NULL, arg, NULL);
-#else
- return 0;
-#endif /* WITH_LIBCORE */
}
/** The be parameters returned by default, all off. */
};
/* Perform schedule verification if requested. */
-static void be_sched_vrfy(ir_graph *irg, int vrfy_opt) {
+static void be_sched_vrfy(be_irg_t *birg, int vrfy_opt) {
if (vrfy_opt == BE_VRFY_WARN) {
- be_verify_schedule(irg);
+ be_verify_schedule(birg);
}
else if (vrfy_opt == BE_VRFY_ASSERT) {
- assert(be_verify_schedule(irg) && "Schedule verification failed.");
+ assert(be_verify_schedule(birg) && "Schedule verification failed.");
}
}
obstack_init(&env->obst);
env->arch_env = obstack_alloc(&env->obst, sizeof(env->arch_env[0]));
env->options = &be_options;
- FIRM_DBG_REGISTER(env->dbg, "be.main");
arch_env_init(env->arch_env, isa_if, file_handle, env);
edges_deactivate_kind(irg, EDGE_KIND_DEP);
edges_activate_kind(irg, EDGE_KIND_DEP);
- DBG((env->dbg, LEVEL_2, "====> IRG: %F\n", irg));
dump(DUMP_INITIAL, irg, "-begin", dump_ir_block_graph);
be_stat_init_irg(env->arch_env, irg);
set_irg_phase_state(irg, phase_backend);
}
-#ifdef WITH_LIBCORE
-
#define BE_TIMER_PUSH(timer) \
if (be_options.timing == BE_TIME_ON) { \
int res = lc_timer_push(timer); \
#define BE_TIMER_ONLY(code) do { if (be_options.timing == BE_TIME_ON) { code; } } while(0)
-#else
-
-#define BE_TIMER_PUSH(timer)
-#define BE_TIMER_POP(timer)
-#define BE_TIMER_ONLY(code)
-
-#endif /* WITH_LIBCORE */
-
-
/**
* The Firm backend main loop.
* Do architecture specific lowering for all graphs
unsigned num_birgs;
ir_graph **irg_list, **backend_irg_list;
- be_ra_timer_t *ra_timer;
-
-#ifdef WITH_LIBCORE
lc_timer_t *t_abi = NULL;
lc_timer_t *t_codegen = NULL;
lc_timer_t *t_sched = NULL;
t_verify = lc_timer_register("verify", "graph verification");
t_other = lc_timer_register("other", "other");
}
-#endif /* WITH_LIBCORE */
be_init_env(&env, file_handle);
be_dbg_types(env.db_handle);
/* backend may provide an ordered list of irgs where code should be generated for */
- irg_list = NEW_ARR_F(ir_graph *, 0);
- backend_irg_list = arch_isa_get_backend_irg_list(isa, irg_list);
+ irg_list = NEW_ARR_F(ir_graph *, 0);
+ backend_irg_list = arch_isa_get_backend_irg_list(isa, &irg_list);
/* we might need 1 birg more for instrumentation constructor */
num_birgs = backend_irg_list ? ARR_LEN(backend_irg_list) : get_irp_n_irgs();
/* First: initialize all birgs */
for(i = 0; i < num_birgs; ++i) {
ir_graph *irg = backend_irg_list ? backend_irg_list[i] : get_irp_irg(i);
-
initialize_birg(&birgs[i], irg, &env);
}
DEL_ARR_F(irg_list);
initialize_birg(&birgs[num_birgs], prof_init_irg, &env);
num_birgs++;
set_method_img_section(get_irg_entity(prof_init_irg), section_constructors);
- }
- else {
+ } else {
be_profile_read(prof_filename);
}
if (be_options.vrfy_option == BE_VRFY_WARN) {
be_check_dominance(irg);
be_verify_out_edges(irg);
- }
- else if (be_options.vrfy_option == BE_VRFY_ASSERT) {
+ } else if (be_options.vrfy_option == BE_VRFY_ASSERT) {
assert(be_verify_out_edges(irg));
assert(be_check_dominance(irg) && "Dominance verification failed");
}
be_do_stat_nodes(irg, "03 Prepare");
- /* Compute loop nesting information (for weighting copies) */
dump(DUMP_PREPARED, irg, "-prepared", dump_ir_block_graph);
BE_TIMER_ONLY(num_nodes_r = get_num_reachable_nodes(irg));
if (be_options.vrfy_option == BE_VRFY_WARN) {
be_check_dominance(irg);
be_verify_out_edges(irg);
- }
- else if (be_options.vrfy_option == BE_VRFY_ASSERT) {
+ } else if (be_options.vrfy_option == BE_VRFY_ASSERT) {
assert(be_verify_out_edges(irg));
assert(be_check_dominance(irg) && "Dominance verification failed");
}
break;
#ifdef WITH_ILP
case BE_SCHED_ILP:
- be_ilp_sched(birg);
- //fprintf(stderr, "Warning: ILP scheduler not yet fully implemented, falling back to list scheduler.\n");
- //list_sched(birg, &be_options);
+ be_ilp_sched(birg, &be_options);
break;
#endif /* WITH_ILP */
};
/* check schedule */
BE_TIMER_PUSH(t_verify);
- be_sched_vrfy(irg, be_options.vrfy_option);
+ be_sched_vrfy(birg, be_options.vrfy_option);
BE_TIMER_POP(t_verify);
be_do_stat_nodes(irg, "04 Schedule");
dump(DUMP_SCHED, irg, "-assured", dump_ir_block_graph_sched);
be_do_stat_nodes(irg, "05 Constraints");
+ /* stuff needs to be done after scheduling but before register allocation */
+ BE_TIMER_PUSH(t_codegen);
+ arch_code_generator_before_ra(birg->cg);
+ BE_TIMER_POP(t_codegen);
+
/* connect all stack modifying nodes together (see beabi.c) */
BE_TIMER_PUSH(t_abi);
- be_abi_fix_stack_nodes(birg->abi, NULL);
+ be_abi_fix_stack_nodes(birg->abi);
BE_TIMER_POP(t_abi);
dump(DUMP_SCHED, irg, "-fix_stack", dump_ir_block_graph_sched);
/* check schedule */
BE_TIMER_PUSH(t_verify);
- be_sched_vrfy(irg, be_options.vrfy_option);
+ be_sched_vrfy(birg, be_options.vrfy_option);
BE_TIMER_POP(t_verify);
/* do some statistics */
be_do_stat_reg_pressure(birg);
- /* stuff needs to be done after scheduling but before register allocation */
- BE_TIMER_PUSH(t_codegen);
- arch_code_generator_before_ra(birg->cg);
- BE_TIMER_POP(t_codegen);
-
#ifdef FIRM_STATISTICS
if(be_stat_ev_is_active()) {
be_stat_ev_l("costs_before_ra",
/* fix stack offsets */
BE_TIMER_PUSH(t_abi);
- be_abi_fix_stack_nodes(birg->abi, NULL);
+ be_abi_fix_stack_nodes(birg->abi);
be_remove_dead_nodes_from_schedule(irg);
be_abi_fix_stack_bias(birg->abi);
BE_TIMER_POP(t_abi);
/* check schedule and register allocation */
BE_TIMER_PUSH(t_verify);
if (be_options.vrfy_option == BE_VRFY_WARN) {
- //irg_verify(irg, VRFY_ENFORCE_SSA);
+ irg_verify(irg, VRFY_ENFORCE_SSA);
be_check_dominance(irg);
be_verify_out_edges(irg);
- be_verify_schedule(irg);
+ be_verify_schedule(birg);
be_verify_register_allocation(env.arch_env, irg);
- }
- else if (be_options.vrfy_option == BE_VRFY_ASSERT) {
- //assert(irg_verify(irg, VRFY_ENFORCE_SSA) && "irg verification failed");
- assert(be_verify_out_edges(irg));
+ } else if (be_options.vrfy_option == BE_VRFY_ASSERT) {
+ assert(irg_verify(irg, VRFY_ENFORCE_SSA) && "irg verification failed");
+ assert(be_verify_out_edges(irg) && "out edge verification failed");
assert(be_check_dominance(irg) && "Dominance verification failed");
- assert(be_verify_schedule(irg) && "Schedule verification failed");
+ assert(be_verify_schedule(birg) && "Schedule verification failed");
assert(be_verify_register_allocation(env.arch_env, irg)
&& "register allocation verification failed");
+
}
BE_TIMER_POP(t_verify);
LC_EMIT(t_sched);
LC_EMIT(t_constr);
LC_EMIT(t_regalloc);
- LC_EMIT_RA(ra_timer->t_prolog);
- LC_EMIT_RA(ra_timer->t_live);
- LC_EMIT_RA(ra_timer->t_spill);
- LC_EMIT_RA(ra_timer->t_spillslots);
- LC_EMIT_RA(ra_timer->t_color);
- LC_EMIT_RA(ra_timer->t_ifg);
- LC_EMIT_RA(ra_timer->t_copymin);
- LC_EMIT_RA(ra_timer->t_ssa);
- LC_EMIT_RA(ra_timer->t_epilog);
- LC_EMIT_RA(ra_timer->t_verify);
- LC_EMIT_RA(ra_timer->t_other);
+ if(global_ra_timer != NULL) {
+ LC_EMIT_RA(global_ra_timer->t_prolog);
+ LC_EMIT_RA(global_ra_timer->t_live);
+ LC_EMIT_RA(global_ra_timer->t_spill);
+ LC_EMIT_RA(global_ra_timer->t_spillslots);
+ LC_EMIT_RA(global_ra_timer->t_color);
+ LC_EMIT_RA(global_ra_timer->t_ifg);
+ LC_EMIT_RA(global_ra_timer->t_copymin);
+ LC_EMIT_RA(global_ra_timer->t_ssa);
+ LC_EMIT_RA(global_ra_timer->t_epilog);
+ LC_EMIT_RA(global_ra_timer->t_verify);
+ LC_EMIT_RA(global_ra_timer->t_other);
+ }
LC_EMIT(t_finish);
LC_EMIT(t_emit);
LC_EMIT(t_verify);
be_free_birg(birg);
/* switched off due to statistics (statistic module needs all irgs) */
+#if 0 /* STA needs irgs */
#ifdef FIRM_STATISTICS
if (! stat_is_active())
-#endif
+#endif /* FIRM_STATISTICS */
free_ir_graph(irg);
-
+#endif /* if 0 */
if(be_stat_ev_is_active()) {
be_stat_ev_pop();
}
/* Main interface to the frontend. */
void be_main(FILE *file_handle, const char *cup_name)
{
-#ifdef WITH_LIBCORE
lc_timer_t *t = NULL;
/* The user specified another config file to read. do that now. */
#ifdef FIRM_STATISTICS
be_init_stat_file(be_options.stat_file_name, cup_name);
#endif
-#endif /* WITH_LIBCORE */
/* never build code for pseudo irgs */
set_visit_pseudo_irgs(0);
be_main_loop(file_handle, cup_name);
-#ifdef WITH_LIBCORE
if (be_options.timing == BE_TIME_ON) {
lc_timer_stop(t);
lc_timer_leave_high_priority();
#ifdef FIRM_STATISTICS
be_close_stat_file();
#endif
-#endif /* WITH_LIBCORE */
}
/** The debug info retriever function. */
projects / libfirm / blobdiff