#endif
#include <stdarg.h>
+#include <stdio.h>
-#ifdef WITH_LIBCORE
#include <libcore/lc_opts.h>
#include <libcore/lc_opts_enum.h>
#include <libcore/lc_timing.h>
-#endif /* WITH_LIBCORE */
#include "obst.h"
#include "bitset.h"
#include "iredges_t.h"
#include "irloop_t.h"
#include "irtools.h"
+#include "irvrfy.h"
+#include "irprintf.h"
#include "return.h"
#include "firmstat.h"
+#include "cfopt.h"
+#include "execfreq.h"
-#include "bearch.h"
-#include "firm/bearch_firm.h"
-#include "ia32/bearch_ia32.h"
-#include "arm/bearch_arm.h"
-#include "ppc32/bearch_ppc32.h"
-#include "mips/bearch_mips.h"
-
+#include "bearch_t.h"
#include "be_t.h"
-#include "benumb_t.h"
+#include "bemodule.h"
#include "beutil.h"
#include "benode_t.h"
#include "beirgmod.h"
#include "beschedmris.h"
#include "bestat.h"
#include "beverify.h"
+#include "beprofile.h"
+#include "be_dbgout.h"
+
+#ifdef WITH_ILP
+#include "beilpsched.h"
+#endif /* WITH_ILP */
/* options visible for anyone */
static be_options_t be_options = {
- DUMP_NONE, /* dump options */
+ DUMP_NONE, /* dump flags */
BE_TIME_OFF, /* no timing */
- BE_SCHED_SELECT_HEUR, /* heuristic selector */
- 0, /* disable mris */
+ 0, /* no opt profile */
+ 1, /* try to omit frame pointer */
+ 0, /* no stabs debugging output */
+ BE_VRFY_WARN, /* verification level: warn */
+ BE_SCHED_LIST, /* scheduler: list scheduler */
"i44pc52.info.uni-karlsruhe.de", /* ilp server */
- "cplex" /* ilp solver */
+ "cplex", /* ilp solver */
+ "", /* filename for statistic output */
};
-/* dump flags */
-static unsigned dump_flags = 0;
-
-/* verify options */
-static int vrfy_option = BE_VRFY_WARN;
-
-/* register allocator to use. */
-static const be_ra_t *ra = &be_ra_chordal_allocator;
+/* config file. */
+static char config_file[256] = { 0 };
/* back end instruction set architecture to use */
-static const arch_isa_if_t *isa_if = &ia32_isa_if;
-
-#ifdef WITH_LIBCORE
-
-static lc_opt_entry_t *be_grp_root = NULL;
+static const arch_isa_if_t *isa_if = NULL;
/* possible dumping options */
static const lc_opt_enum_mask_items_t dump_items[] = {
{ NULL, 0 }
};
-/* register allocators */
-static const lc_opt_enum_const_ptr_items_t ra_items[] = {
- { "chordal", &be_ra_chordal_allocator },
- { "external", &be_ra_external_allocator },
- { NULL, NULL }
-};
-
-/* instruction set architectures. */
-static const lc_opt_enum_const_ptr_items_t isa_items[] = {
- { "ia32", &ia32_isa_if },
-#if 0
- { "arm", &arm_isa_if },
- { "ppc32", &ppc32_isa_if },
- { "mips", &mips_isa_if },
-#endif
- { NULL, NULL }
-};
-
/* verify options. */
static const lc_opt_enum_int_items_t vrfy_items[] = {
{ "off", BE_VRFY_OFF },
{ NULL, 0 }
};
-/* schedule selector options. */
-static const lc_opt_enum_int_items_t sched_select_items[] = {
- { "isa", BE_SCHED_SELECT_ISA },
- { "heur", BE_SCHED_SELECT_HEUR },
- { NULL, 0 }
+/* scheduling options. */
+static const lc_opt_enum_int_items_t sched_items[] = {
+ { "list", BE_SCHED_LIST },
+#ifdef WITH_ILP
+ { "ilp", BE_SCHED_ILP },
+#endif /* WITH_ILP */
+ { NULL, 0 }
};
static lc_opt_enum_mask_var_t dump_var = {
- &dump_flags, dump_items
-};
-
-static lc_opt_enum_const_ptr_var_t ra_var = {
- (const void **) &ra, ra_items
-};
-
-static lc_opt_enum_const_ptr_var_t isa_var = {
- (const void **) &isa_if, isa_items
+ &be_options.dump_flags, dump_items
};
static lc_opt_enum_int_var_t vrfy_var = {
- &vrfy_option, vrfy_items
+ &be_options.vrfy_option, vrfy_items
};
-static lc_opt_enum_int_var_t sched_select_var = {
- &be_options.sched_select, sched_select_items
+static lc_opt_enum_int_var_t sched_var = {
+ &be_options.scheduler, sched_items
};
static const lc_opt_table_entry_t be_main_options[] = {
- LC_OPT_ENT_ENUM_MASK("dump", "dump irg on several occasions", &dump_var),
- LC_OPT_ENT_ENUM_PTR ("ra", "register allocator", &ra_var),
- LC_OPT_ENT_ENUM_PTR ("isa", "the instruction set architecture", &isa_var),
- LC_OPT_ENT_NEGBOOL ("noomitfp", "do not omit frame pointer", &be_omit_fp),
- LC_OPT_ENT_ENUM_PTR ("vrfy", "verify the backend irg (off, warn, assert)", &vrfy_var),
- LC_OPT_ENT_BOOL ("time", "get backend timing statistics", &be_options.timing),
- LC_OPT_ENT_BOOL ("sched.mris", "enable mris schedule preparation", &be_options.mris),
- LC_OPT_ENT_ENUM_PTR ("sched.select", "schedule node selector (heur, isa)",&sched_select_var),
+ LC_OPT_ENT_STR ("config", "read another config file containing backend options", config_file, sizeof(config_file)),
+ LC_OPT_ENT_ENUM_MASK("dump", "dump irg on several occasions", &dump_var),
+ LC_OPT_ENT_NEGBOOL ("noomitfp", "do not omit frame pointer", &be_options.omit_fp),
+ LC_OPT_ENT_BOOL ("stabs", "enable stabs debug support", &be_options.stabs_debug_support),
+ LC_OPT_ENT_ENUM_PTR ("vrfy", "verify the backend irg", &vrfy_var),
+ LC_OPT_ENT_BOOL ("time", "get backend timing statistics", &be_options.timing),
+ LC_OPT_ENT_BOOL ("profile", "instrument the code for execution count profiling", &be_options.opt_profile),
+ LC_OPT_ENT_ENUM_PTR ("sched", "select a scheduler", &sched_var),
+ LC_OPT_ENT_STR ("statfile", "append statistics to file statfile", &be_options.stat_file_name, sizeof(be_options.stat_file_name)),
#ifdef WITH_ILP
LC_OPT_ENT_STR ("ilp.server", "the ilp server name", be_options.ilp_server, sizeof(be_options.ilp_server)),
{ NULL }
};
-#endif /* WITH_LIBCORE */
+static be_module_list_entry_t *isa_ifs = NULL;
+
+void be_register_isa_if(const char *name, const arch_isa_if_t *isa)
+{
+ if(isa_if == NULL)
+ isa_if = isa;
+
+ be_add_module_to_list(&isa_ifs, name, (void*) isa);
+}
void be_opt_register(void)
{
-#ifdef WITH_LIBCORE
- int i;
- lc_opt_entry_t *be_grp_ra;
+ lc_opt_entry_t *be_grp;
static int run_once = 0;
- if (! run_once) {
- run_once = 1;
- be_grp_root = lc_opt_get_grp(firm_opt_get_root(), "be");
- be_grp_ra = lc_opt_get_grp(be_grp_root, "ra");
+ if (run_once) {
+ return;
+ }
+ run_once = 1;
- lc_opt_add_table(be_grp_root, be_main_options);
+ be_init_modules();
- /* register allocator options */
- for(i = 0; ra_items[i].name != NULL; ++i) {
- const be_ra_t *ra = ra_items[i].value;
- ra->register_options(be_grp_ra);
- }
+ be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
+ lc_opt_add_table(be_grp, be_main_options);
- /* register isa options */
- for(i = 0; isa_items[i].name != NULL; ++i) {
- const arch_isa_if_t *isa = isa_items[i].value;
- isa->register_options(be_grp_root);
- }
- }
-#endif /* WITH_LIBCORE */
+ be_add_module_list_opt(be_grp, "isa", "the instruction set architecture",
+ &isa_ifs, (void**) &isa_if);
}
/* Parse one argument. */
int be_parse_arg(const char *arg) {
-#ifdef WITH_LIBCORE
+ lc_opt_entry_t *be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
if (strcmp(arg, "help") == 0 || (arg[0] == '?' && arg[1] == '\0')) {
- lc_opt_print_help(be_grp_root, stdout);
+ lc_opt_print_help(be_grp, stdout);
return -1;
}
- return lc_opt_from_single_arg(be_grp_root, NULL, arg, NULL);
-#else
- return 0;
-#endif /* WITH_LIBCORE */
+ return lc_opt_from_single_arg(be_grp, NULL, arg, NULL);
}
/** The be parameters returned by default, all off. */
};
/* Perform schedule verification if requested. */
-static void be_sched_vrfy(ir_graph *irg, int vrfy_opt) {
+static void be_sched_vrfy(be_irg_t *birg, int vrfy_opt) {
if (vrfy_opt == BE_VRFY_WARN) {
- be_verify_schedule(irg);
+ be_verify_schedule(birg);
}
else if (vrfy_opt == BE_VRFY_ASSERT) {
- assert(be_verify_schedule(irg) && "Schedule verification failed.");
+ assert(be_verify_schedule(birg) && "Schedule verification failed.");
}
}
const backend_params *be_init(void)
{
be_opt_register();
-
- be_sched_init();
- be_numbering_init();
- be_copy_opt_init();
- copystat_init();
- phi_class_init();
+ be_init_modules();
if (isa_if->get_params)
return isa_if->get_params();
obstack_init(&env->obst);
env->arch_env = obstack_alloc(&env->obst, sizeof(env->arch_env[0]));
env->options = &be_options;
- env->options->dump_flags = dump_flags;
- FIRM_DBG_REGISTER(env->dbg, "be.main");
- arch_env_init(env->arch_env, isa_if, file_handle);
+ arch_env_init(env->arch_env, isa_if, file_handle, env);
/* Register the irn handler of the architecture */
if (arch_isa_get_irn_handler(env->arch_env->isa))
env->phi_handler = be_phi_handler_new(env->arch_env);
arch_env_push_irn_handler(env->arch_env, env->phi_handler);
+ env->db_handle = be_options.stabs_debug_support ? be_stabs_open(file_handle) : be_nulldbg_open();
return env;
}
static void be_done_env(be_main_env_t *env)
{
env->arch_env->isa->impl->done(env->arch_env->isa);
+ be_dbg_close(env->db_handle);
be_phi_handler_free(env->phi_handler);
obstack_free(&env->obst, NULL);
}
static void dump(int mask, ir_graph *irg, const char *suffix,
void (*dumper)(ir_graph *, const char *))
{
- if(dump_flags & mask)
+ if(be_options.dump_flags & mask)
be_dump(irg, suffix, dumper);
}
/**
- * Prepare a backend graph for code generation.
+ * Prepare a backend graph for code generation and initialize its birg
*/
-static void prepare_graph(be_irg_t *birg)
+static void initialize_birg(be_irg_t *birg, ir_graph *irg, be_main_env_t *env)
{
- ir_graph *irg = birg->irg;
+ memset(birg, 0, sizeof(*birg));
+ birg->irg = irg;
+ birg->main_env = env;
+
+ edges_deactivate_kind(irg, EDGE_KIND_DEP);
+ edges_activate_kind(irg, EDGE_KIND_DEP);
+
+ dump(DUMP_INITIAL, irg, "-begin", dump_ir_block_graph);
+
+ be_stat_init_irg(env->arch_env, irg);
+ be_do_stat_nodes(irg, "01 Begin");
+
+ /* set the current graph (this is important for several firm functions) */
+ current_ir_graph = irg;
/* Normalize proj nodes. */
normalize_proj_nodes(irg);
/* Remove critical edges */
remove_critical_cf_edges(irg);
- /* Compute the dominance information. */
- free_dom(irg);
- compute_doms(irg);
-
/* Ensure, that the ir_edges are computed. */
- edges_activate(irg);
-
- /* check, if the dominance property is fulfilled. */
- be_check_dominance(irg);
+ edges_assure(irg);
/* reset the phi handler. */
- be_phi_handler_reset(birg->main_env->phi_handler);
+ be_phi_handler_reset(env->phi_handler);
+
+ set_irg_phase_state(irg, phase_backend);
}
+#define BE_TIMER_PUSH(timer) \
+ if (be_options.timing == BE_TIME_ON) { \
+ int res = lc_timer_push(timer); \
+ if (be_options.vrfy_option == BE_VRFY_ASSERT) \
+ assert(res && "Timer already on stack, cannot be pushed twice."); \
+ else if (be_options.vrfy_option == BE_VRFY_WARN && ! res) \
+ fprintf(stderr, "Timer %s already on stack, cannot be pushed twice.\n", \
+ lc_timer_get_name(timer)); \
+ }
+#define BE_TIMER_POP(timer) \
+ if (be_options.timing == BE_TIME_ON) { \
+ lc_timer_t *tmp = lc_timer_pop(); \
+ if (be_options.vrfy_option == BE_VRFY_ASSERT) \
+ assert(tmp == timer && "Attempt to pop wrong timer."); \
+ else if (be_options.vrfy_option == BE_VRFY_WARN && tmp != timer) \
+ fprintf(stderr, "Attempt to pop wrong timer. %s is on stack, trying to pop %s.\n", \
+ lc_timer_get_name(tmp), lc_timer_get_name(timer)); \
+ timer = tmp; \
+ }
+
+#define BE_TIMER_ONLY(code) do { if (be_options.timing == BE_TIME_ON) { code; } } while(0)
+
/**
* The Firm backend main loop.
* Do architecture specific lowering for all graphs
* and call the architecture specific code generator.
*
* @param file_handle the file handle the output will be written to
+ * @param cup_name name of the compilation unit
*/
-static void be_main_loop(FILE *file_handle)
+static void be_main_loop(FILE *file_handle, const char *cup_name)
{
- int i, n;
+ int i;
arch_isa_t *isa;
be_main_env_t env;
unsigned num_nodes_b = 0;
unsigned num_nodes_a = 0;
unsigned num_nodes_r = 0;
- lc_timer_t *t_prolog, *t_abi, *t_codegen, *t_sched, *t_constr, *t_regalloc, *t_finish, *t_emit, *t_other, *t_verify;
- be_ra_timer_t *ra_timer;
+ char prof_filename[256];
+ static const char suffix[] = ".prof";
+ be_irg_t *birgs;
+ unsigned num_birgs;
+ ir_graph **irg_list, **backend_irg_list;
+
+ lc_timer_t *t_abi = NULL;
+ lc_timer_t *t_codegen = NULL;
+ lc_timer_t *t_sched = NULL;
+ lc_timer_t *t_constr = NULL;
+ lc_timer_t *t_regalloc = NULL;
+ lc_timer_t *t_finish = NULL;
+ lc_timer_t *t_emit = NULL;
+ lc_timer_t *t_other = NULL;
+ lc_timer_t *t_verify = NULL;
if (be_options.timing == BE_TIME_ON) {
- t_prolog = lc_timer_register("prolog", "prolog");
t_abi = lc_timer_register("beabi", "be abi introduction");
t_codegen = lc_timer_register("codegen", "codegeneration");
t_sched = lc_timer_register("sched", "scheduling");
isa = arch_env_get_isa(env.arch_env);
- /* for debugging, anchors helps */
- // dump_all_anchors(1);
+ be_dbg_so(env.db_handle, cup_name);
+ be_dbg_types(env.db_handle);
-#define BE_TIMER_PUSH(timer) \
- if (be_options.timing == BE_TIME_ON) { \
- int res = lc_timer_push(timer); \
- if (vrfy_option == BE_VRFY_ASSERT) \
- assert(res && "Timer already on stack, cannot be pushed twice."); \
- else if (vrfy_option == BE_VRFY_WARN && ! res) \
- fprintf(stderr, "Timer %s already on stack, cannot be pushed twice.\n", \
- lc_timer_get_name(timer)); \
- }
-#define BE_TIMER_POP(timer) \
- if (be_options.timing == BE_TIME_ON) { \
- lc_timer_t *tmp = lc_timer_pop(); \
- if (vrfy_option == BE_VRFY_ASSERT) \
- assert(tmp == timer && "Attempt to pop wrong timer."); \
- else if (vrfy_option == BE_VRFY_WARN && tmp != timer) \
- fprintf(stderr, "Attempt to pop wrong timer. %s is on stack, trying to pop %s.\n", \
- lc_timer_get_name(tmp), lc_timer_get_name(timer)); \
- timer = tmp; \
+ /* backend may provide an ordered list of irgs where code should be generated for */
+ irg_list = NEW_ARR_F(ir_graph *, 0);
+ backend_irg_list = arch_isa_get_backend_irg_list(isa, &irg_list);
+
+ /* we might need 1 birg more for instrumentation constructor */
+ num_birgs = backend_irg_list ? ARR_LEN(backend_irg_list) : get_irp_n_irgs();
+ birgs = alloca(sizeof(birgs[0]) * (num_birgs + 1));
+
+ /* First: initialize all birgs */
+ for(i = 0; i < num_birgs; ++i) {
+ ir_graph *irg = backend_irg_list ? backend_irg_list[i] : get_irp_irg(i);
+ initialize_birg(&birgs[i], irg, &env);
}
+ DEL_ARR_F(irg_list);
+
+ /*
+ Get the filename for the profiling data.
+ Beware: '\0' is already included in sizeof(suffix)
+ */
+ memset(prof_filename, 0, sizeof(prof_filename));
+ strncpy(prof_filename, cup_name, sizeof(prof_filename) - sizeof(suffix));
+ strcat(prof_filename, suffix);
-#define BE_TIMER_ONLY(code) if (be_options.timing == BE_TIME_ON) do { code; } while(0)
+ /*
+ Next: Either instruments all irgs with profiling code
+ or try to read in profile data for current translation unit.
+ */
+ if (be_options.opt_profile) {
+ ir_graph *prof_init_irg = be_profile_instrument(prof_filename, profile_default);
+ initialize_birg(&birgs[num_birgs], prof_init_irg, &env);
+ num_birgs++;
+ set_method_img_section(get_irg_entity(prof_init_irg), section_constructors);
+ } else {
+ be_profile_read(prof_filename);
+ }
/* For all graphs */
- for (i = 0, n = get_irp_n_irgs(); i < n; ++i) {
- ir_graph *irg = get_irp_irg(i);
- const arch_code_generator_if_t *cg_if;
- be_irg_t birg;
+ for (i = 0; i < num_birgs; ++i) {
+ be_irg_t *birg = &birgs[i];
+ ir_graph *irg = birg->irg;
optimization_state_t state;
+ const arch_code_generator_if_t *cg_if;
+ char irg_name[128];
+
+ /* set the current graph (this is important for several firm functions) */
+ current_ir_graph = irg;
+
+#ifdef FIRM_STATISTICS
+ if(be_stat_ev_is_active()) {
+ ir_snprintf(irg_name, sizeof(irg_name), "%F", irg);
+ be_stat_tags[STAT_TAG_CLS] = "<all>";
+ be_stat_tags[STAT_TAG_IRG] = irg_name;
+ be_stat_ev_push(be_stat_tags, STAT_TAG_LAST, be_stat_file);
+ }
+#endif
/* stop and reset timers */
- if (be_options.timing == BE_TIME_ON) {
- LC_STOP_AND_RESET_TIMER(t_prolog);
+ BE_TIMER_ONLY(
LC_STOP_AND_RESET_TIMER(t_abi);
LC_STOP_AND_RESET_TIMER(t_codegen);
LC_STOP_AND_RESET_TIMER(t_sched);
LC_STOP_AND_RESET_TIMER(t_emit);
LC_STOP_AND_RESET_TIMER(t_verify);
LC_STOP_AND_RESET_TIMER(t_other);
- }
+ );
BE_TIMER_PUSH(t_other); /* t_other */
- BE_TIMER_ONLY(num_nodes_b = get_num_reachable_nodes(irg));
-
- birg.irg = irg;
- birg.main_env = &env;
-
- DBG((env.dbg, LEVEL_2, "====> IRG: %F\n", irg));
- dump(DUMP_INITIAL, irg, "-begin", dump_ir_block_graph);
-
- BE_TIMER_PUSH(t_prolog);
-
- be_stat_init_irg(env.arch_env, irg);
- be_do_stat_nodes(irg, "01 Begin");
+ /* Verify the initial graph */
+ BE_TIMER_PUSH(t_verify);
+ if (be_options.vrfy_option == BE_VRFY_WARN) {
+ irg_verify(irg, VRFY_ENFORCE_SSA);
+ be_check_dominance(irg);
+ } else if (be_options.vrfy_option == BE_VRFY_ASSERT) {
+ assert(irg_verify(irg, VRFY_ENFORCE_SSA) && "irg verification failed");
+ assert(be_check_dominance(irg) && "Dominance verification failed");
+ }
+ BE_TIMER_POP(t_verify);
- /* set the current graph (this is important for several firm functions) */
- current_ir_graph = birg.irg;
+ BE_TIMER_ONLY(num_nodes_b = get_num_reachable_nodes(irg));
/* Get the code generator interface. */
cg_if = isa->impl->get_code_generator_if(isa);
/* get a code generator for this graph. */
- birg.cg = cg_if->init(&birg);
-
- /* create the code generator and generate code. */
- prepare_graph(&birg);
-
- BE_TIMER_POP(t_prolog);
+ birg->cg = cg_if->init(birg);
/* some transformations need to be done before abi introduce */
- BE_TIMER_PUSH(t_codegen);
- arch_code_generator_before_abi(birg.cg);
- BE_TIMER_POP(t_codegen);
+ arch_code_generator_before_abi(birg->cg);
+
+ /* reset the phi handler. */
+ be_phi_handler_reset(env.phi_handler);
/* implement the ABI conventions. */
BE_TIMER_PUSH(t_abi);
- birg.abi = be_abi_introduce(&birg);
+ birg->abi = be_abi_introduce(birg);
BE_TIMER_POP(t_abi);
dump(DUMP_ABI, irg, "-abi", dump_ir_block_graph);
be_do_stat_nodes(irg, "02 Abi");
+ if (be_options.vrfy_option == BE_VRFY_WARN) {
+ be_check_dominance(irg);
+ be_verify_out_edges(irg);
+ } else if (be_options.vrfy_option == BE_VRFY_ASSERT) {
+ assert(be_verify_out_edges(irg));
+ assert(be_check_dominance(irg) && "Dominance verification failed");
+ }
+
/* generate code */
BE_TIMER_PUSH(t_codegen);
- arch_code_generator_prepare_graph(birg.cg);
+ arch_code_generator_prepare_graph(birg->cg);
BE_TIMER_POP(t_codegen);
be_do_stat_nodes(irg, "03 Prepare");
- /*
- * Since the code generator made a lot of new nodes and skipped
- * a lot of old ones, we should do dead node elimination here.
- * Note that this requires disabling the edges here.
- */
- edges_deactivate(irg);
- //dead_node_elimination(irg);
- edges_activate(irg);
-
- /* Compute loop nesting information (for weighting copies) */
- construct_cf_backedges(irg);
dump(DUMP_PREPARED, irg, "-prepared", dump_ir_block_graph);
BE_TIMER_ONLY(num_nodes_r = get_num_reachable_nodes(irg));
+ if (be_options.vrfy_option == BE_VRFY_WARN) {
+ be_check_dominance(irg);
+ be_verify_out_edges(irg);
+ } else if (be_options.vrfy_option == BE_VRFY_ASSERT) {
+ assert(be_verify_out_edges(irg));
+ assert(be_check_dominance(irg) && "Dominance verification failed");
+ }
+
+ /**
+ * Create execution frequencies from profile data or estimate some
+ */
+ if (be_profile_has_data()) {
+ birg->exec_freq = be_create_execfreqs_from_profile(irg);
+ } else {
+ birg->exec_freq = compute_execfreq(irg, 10);
+ }
+
/* let backend prepare scheduling */
BE_TIMER_PUSH(t_codegen);
- arch_code_generator_before_sched(birg.cg);
+ arch_code_generator_before_sched(birg->cg);
BE_TIMER_POP(t_codegen);
/* schedule the irg */
BE_TIMER_PUSH(t_sched);
- list_sched(&birg, &be_options);
+ switch (be_options.scheduler) {
+ default:
+ fprintf(stderr, "Warning: invalid scheduler (%d) selected, falling back to list scheduler.\n", be_options.scheduler);
+ case BE_SCHED_LIST:
+ list_sched(birg, &be_options);
+ break;
+#ifdef WITH_ILP
+ case BE_SCHED_ILP:
+ be_ilp_sched(birg, &be_options);
+ break;
+#endif /* WITH_ILP */
+ };
BE_TIMER_POP(t_sched);
dump(DUMP_SCHED, irg, "-sched", dump_ir_block_graph_sched);
/* check schedule */
BE_TIMER_PUSH(t_verify);
- be_sched_vrfy(birg.irg, vrfy_option);
+ be_sched_vrfy(birg, be_options.vrfy_option);
BE_TIMER_POP(t_verify);
be_do_stat_nodes(irg, "04 Schedule");
/* add Keeps for should_be_different constrained nodes */
/* beware: needs schedule due to usage of be_ssa_constr */
- assure_constraints(&birg);
+ assure_constraints(birg);
BE_TIMER_POP(t_constr);
dump(DUMP_SCHED, irg, "-assured", dump_ir_block_graph_sched);
be_do_stat_nodes(irg, "05 Constraints");
+ /* stuff needs to be done after scheduling but before register allocation */
+ BE_TIMER_PUSH(t_codegen);
+ arch_code_generator_before_ra(birg->cg);
+ BE_TIMER_POP(t_codegen);
+
/* connect all stack modifying nodes together (see beabi.c) */
BE_TIMER_PUSH(t_abi);
- be_abi_fix_stack_nodes(birg.abi, NULL);
+ be_abi_fix_stack_nodes(birg->abi);
BE_TIMER_POP(t_abi);
dump(DUMP_SCHED, irg, "-fix_stack", dump_ir_block_graph_sched);
/* check schedule */
BE_TIMER_PUSH(t_verify);
- be_sched_vrfy(birg.irg, vrfy_option);
+ be_sched_vrfy(birg, be_options.vrfy_option);
BE_TIMER_POP(t_verify);
/* do some statistics */
- be_do_stat_reg_pressure(&birg);
+ be_do_stat_reg_pressure(birg);
- /* stuff needs to be done after scheduling but before register allocation */
- BE_TIMER_PUSH(t_codegen);
- arch_code_generator_before_ra(birg.cg);
- BE_TIMER_POP(t_codegen);
+#ifdef FIRM_STATISTICS
+ if(be_stat_ev_is_active()) {
+ be_stat_ev_l("costs_before_ra",
+ (long) be_estimate_irg_costs(irg, env.arch_env, birg->exec_freq));
+ }
+#endif
/* Do register allocation */
- BE_TIMER_ONLY(lc_timer_start(t_regalloc));
- ra_timer = ra->allocate(&birg);
- BE_TIMER_ONLY(lc_timer_stop(t_regalloc));
+ BE_TIMER_PUSH(t_regalloc);
+ be_allocate_registers(birg);
+ BE_TIMER_POP(t_regalloc);
+
+#ifdef FIRM_STATISTICS
+ if(be_stat_ev_is_active()) {
+ be_stat_ev_l("costs_after_ra",
+ (long) be_estimate_irg_costs(irg, env.arch_env, birg->exec_freq));
+ }
+#endif
dump(DUMP_RA, irg, "-ra", dump_ir_block_graph_sched);
be_do_stat_nodes(irg, "06 Register Allocation");
- /* let the codegenerator prepare the graph for emitter */
+ /* let the code generator prepare the graph for emitter */
BE_TIMER_PUSH(t_finish);
- arch_code_generator_after_ra(birg.cg);
+ arch_code_generator_after_ra(birg->cg);
BE_TIMER_POP(t_finish);
/* fix stack offsets */
BE_TIMER_PUSH(t_abi);
- be_abi_fix_stack_bias(birg.abi);
+ be_abi_fix_stack_nodes(birg->abi);
+ be_remove_dead_nodes_from_schedule(irg);
+ be_abi_fix_stack_bias(birg->abi);
BE_TIMER_POP(t_abi);
+ dump(DUMP_SCHED, irg, "-fix_stack_after_ra", dump_ir_block_graph_sched);
+
BE_TIMER_PUSH(t_finish);
- arch_code_generator_finish(birg.cg);
+ arch_code_generator_finish(birg->cg);
BE_TIMER_POP(t_finish);
dump(DUMP_FINAL, irg, "-finish", dump_ir_block_graph_sched);
/* check schedule and register allocation */
BE_TIMER_PUSH(t_verify);
- be_sched_vrfy(birg.irg, vrfy_option);
- be_verify_register_allocation(env.arch_env, birg.irg);
+ if (be_options.vrfy_option == BE_VRFY_WARN) {
+ irg_verify(irg, VRFY_ENFORCE_SSA);
+ be_check_dominance(irg);
+ be_verify_out_edges(irg);
+ be_verify_schedule(birg);
+ be_verify_register_allocation(env.arch_env, irg);
+ } else if (be_options.vrfy_option == BE_VRFY_ASSERT) {
+ assert(irg_verify(irg, VRFY_ENFORCE_SSA) && "irg verification failed");
+ assert(be_verify_out_edges(irg) && "out edge verification failed");
+ assert(be_check_dominance(irg) && "Dominance verification failed");
+ assert(be_verify_schedule(birg) && "Schedule verification failed");
+ assert(be_verify_register_allocation(env.arch_env, irg)
+ && "register allocation verification failed");
+
+ }
BE_TIMER_POP(t_verify);
/* emit assembler code */
BE_TIMER_PUSH(t_emit);
- arch_code_generator_done(birg.cg);
+ arch_code_generator_done(birg->cg);
BE_TIMER_POP(t_emit);
- dump(DUMP_FINAL, irg, "-end", dump_ir_extblock_graph_sched);
+ dump(DUMP_FINAL, irg, "-end", dump_ir_block_graph_sched);
BE_TIMER_PUSH(t_abi);
- be_abi_free(birg.abi);
+ be_abi_free(birg->abi);
BE_TIMER_POP(t_abi);
be_do_stat_nodes(irg, "07 Final");
BE_TIMER_ONLY(num_nodes_a = get_num_reachable_nodes(irg));
BE_TIMER_POP(t_other);
-#define LC_EMIT(timer) printf("%-20s: %.3lf msec\n", lc_timer_get_description(timer), (double)lc_timer_elapsed_usec(timer) / 1000.0)
-#define LC_EMIT_RA(timer) printf("\t%-20s: %.3lf msec\n", lc_timer_get_description(timer), (double)lc_timer_elapsed_usec(timer) / 1000.0)
- if (be_options.timing == BE_TIME_ON) {
- printf("==>> IRG %s <<==\n", get_entity_name(get_irg_entity(irg)));
- printf("# nodes at begin: %u\n", num_nodes_b);
- printf("# nodes before ra: %u\n", num_nodes_r);
- printf("# nodes at end: %u\n\n", num_nodes_a);
- LC_EMIT(t_prolog);
+#define LC_EMIT(timer) \
+ if(!be_stat_ev_is_active()) { \
+ printf("%-20s: %.3lf msec\n", lc_timer_get_description(timer), (double)lc_timer_elapsed_usec(timer) / 1000.0); \
+ } else { \
+ be_stat_ev_l(lc_timer_get_name(timer), lc_timer_elapsed_msec(timer)); \
+ }
+#define LC_EMIT_RA(timer) \
+ if(!be_stat_ev_is_active()) { \
+ printf("\t%-20s: %.3lf msec\n", lc_timer_get_description(timer), (double)lc_timer_elapsed_usec(timer) / 1000.0); \
+ } else { \
+ be_stat_ev_l(lc_timer_get_name(timer), lc_timer_elapsed_msec(timer)); \
+ }
+ BE_TIMER_ONLY(
+ if(!be_stat_ev_is_active()) {
+ printf("==>> IRG %s <<==\n", get_entity_name(get_irg_entity(irg)));
+ printf("# nodes at begin: %u\n", num_nodes_b);
+ printf("# nodes before ra: %u\n", num_nodes_r);
+ printf("# nodes at end: %u\n\n", num_nodes_a);
+ }
LC_EMIT(t_abi);
LC_EMIT(t_codegen);
LC_EMIT(t_sched);
LC_EMIT(t_constr);
LC_EMIT(t_regalloc);
- LC_EMIT_RA(ra_timer->t_prolog);
- LC_EMIT_RA(ra_timer->t_live);
- LC_EMIT_RA(ra_timer->t_spill);
- LC_EMIT_RA(ra_timer->t_spillslots);
- LC_EMIT_RA(ra_timer->t_color);
- LC_EMIT_RA(ra_timer->t_ifg);
- LC_EMIT_RA(ra_timer->t_copymin);
- LC_EMIT_RA(ra_timer->t_ssa);
- LC_EMIT_RA(ra_timer->t_epilog);
- LC_EMIT_RA(ra_timer->t_verify);
- LC_EMIT_RA(ra_timer->t_other);
+ if(global_ra_timer != NULL) {
+ LC_EMIT_RA(global_ra_timer->t_prolog);
+ LC_EMIT_RA(global_ra_timer->t_live);
+ LC_EMIT_RA(global_ra_timer->t_spill);
+ LC_EMIT_RA(global_ra_timer->t_spillslots);
+ LC_EMIT_RA(global_ra_timer->t_color);
+ LC_EMIT_RA(global_ra_timer->t_ifg);
+ LC_EMIT_RA(global_ra_timer->t_copymin);
+ LC_EMIT_RA(global_ra_timer->t_ssa);
+ LC_EMIT_RA(global_ra_timer->t_epilog);
+ LC_EMIT_RA(global_ra_timer->t_verify);
+ LC_EMIT_RA(global_ra_timer->t_other);
+ }
LC_EMIT(t_finish);
LC_EMIT(t_emit);
LC_EMIT(t_verify);
LC_EMIT(t_other);
- }
+ );
+#undef LC_EMIT_RA
#undef LC_EMIT
+ be_free_birg(birg);
+
/* switched off due to statistics (statistic module needs all irgs) */
+#if 0 /* STA needs irgs */
+#ifdef FIRM_STATISTICS
if (! stat_is_active())
+#endif /* FIRM_STATISTICS */
free_ir_graph(irg);
-
+#endif /* if 0 */
+ if(be_stat_ev_is_active()) {
+ be_stat_ev_pop();
+ }
}
+ be_profile_free();
be_done_env(&env);
#undef BE_TIMER_POP
}
/* Main interface to the frontend. */
-void be_main(FILE *file_handle)
+void be_main(FILE *file_handle, const char *cup_name)
{
-#ifdef WITH_LIBCORE
- lc_timer_t *t;
+ lc_timer_t *t = NULL;
+
+ /* The user specified another config file to read. do that now. */
+ if(strlen(config_file) > 0) {
+ FILE *f;
+
+ if((f = fopen(config_file, "rt")) != NULL) {
+ lc_opt_from_file(config_file, f, NULL);
+ fclose(f);
+ }
+ }
if (be_options.timing == BE_TIME_ON) {
t = lc_timer_register("bemain", "measure complete bemain loop");
lc_timer_reset_and_start(t);
}
-#endif /* WITH_LIBCORE */
+
+#ifdef FIRM_STATISTICS
+ be_init_stat_file(be_options.stat_file_name, cup_name);
+#endif
/* never build code for pseudo irgs */
set_visit_pseudo_irgs(0);
- be_node_init();
- be_main_loop(file_handle);
+ be_node_init();
+
+ be_main_loop(file_handle, cup_name);
-#ifdef WITH_LIBCORE
if (be_options.timing == BE_TIME_ON) {
lc_timer_stop(t);
lc_timer_leave_high_priority();
- printf("%-20s: %lu msec\n", "BEMAINLOOP", lc_timer_elapsed_msec(t));
+ if(be_stat_ev_is_active()) {
+ be_stat_ev_l("backend_time", lc_timer_elapsed_msec(t));
+ } else {
+ printf("%-20s: %lu msec\n", "BEMAINLOOP", lc_timer_elapsed_msec(t));
+ }
}
-#endif /* WITH_LIBCORE */
+
+#ifdef FIRM_STATISTICS
+ be_close_stat_file();
+#endif
}
/** The debug info retriever function. */
const char *be_retrieve_dbg_info(const dbg_info *dbg, unsigned *line) {
if (retrieve_dbg)
return retrieve_dbg(dbg, line);
+
*line = 0;
return NULL;
}
+
+int be_put_ignore_regs(const be_irg_t *birg, const arch_register_class_t *cls, bitset_t *bs)
+{
+ if(bs == NULL)
+ bs = bitset_alloca(cls->n_regs);
+ else
+ bitset_clear_all(bs);
+
+ assert(bitset_size(bs) == (unsigned) cls->n_regs);
+ arch_put_non_ignore_regs(birg->main_env->arch_env, cls, bs);
+ bitset_flip_all(bs);
+ be_abi_put_ignore_regs(birg->abi, cls, bs);
+
+ return bitset_popcnt(bs);
+}
projects / libfirm / blobdiff