#include "config.h"
#endif
+#include <stdlib.h>
+
+#include "ircons.h"
+#include "debug.h"
+
#include "bearch.h"
#include "belower.h"
#include "benode_t.h"
#include "bechordal_t.h"
-#include "besched.h"
+#include "besched_t.h"
#include "irgmod.h"
#include "iredges_t.h"
#include "irgwalk.h"
+#ifdef _WIN32
+#include <malloc.h>
+#else
+#include <alloca.h>
+#endif
+
#undef is_Perm
#define is_Perm(arch_env, irn) (arch_irn_classify(arch_env, irn) == arch_irn_class_perm)
+#undef is_Call
+#define is_Call(arch_env, irn) (arch_irn_classify(arch_env, irn) == arch_irn_class_call)
+
/* lowering walker environment */
typedef struct _lower_env_t {
be_chordal_env_t *chord_env;
int head = pairs[start].in_reg->index;
int cur_idx = pairs[start].out_reg->index;
int cur_pair_idx = start;
- int n_pairs_done = get_n_checked_pairs(pairs, n) + 1;
+ int n_pairs_done = get_n_checked_pairs(pairs, n);
int idx;
+ perm_type_t cycle_tp = PERM_CYCLE;
+
+ /* We could be right in the middle of a chain, so we need to find the start */
+ while (head != cur_idx) {
+ /* goto previous register in cycle or chain */
+ cur_pair_idx = get_pairidx_for_regidx(pairs, n, head, 1);
+
+ if (cur_pair_idx < 0) {
+ cycle_tp = PERM_CHAIN;
+ break;
+ }
+ else {
+ head = pairs[cur_pair_idx].in_reg->index;
+ start = cur_pair_idx;
+ }
+ }
/* assume worst case: all remaining pairs build a cycle or chain */
- cycle->elems = calloc(n - n_pairs_done, sizeof(cycle->elems[0]));
+ cycle->elems = xcalloc((n - n_pairs_done) * 2, sizeof(cycle->elems[0]));
cycle->n_elems = 2; /* initial number of elements is 2 */
cycle->elems[0] = pairs[start].in_reg;
cycle->elems[1] = pairs[start].out_reg;
- cycle->type = PERM_CHAIN; /* default is CHAIN, only changed when we found a cycle */
-
- /* mark the first pair as checked */
- pairs[start].checked = 1;
+ cycle->type = cycle_tp;
+ cur_idx = pairs[start].out_reg->index;
idx = 2;
/* check for cycle or end of a chain */
- while (cur_idx != head && n_pairs_done < n) {
+ while (cur_idx != head) {
/* goto next register in cycle or chain */
cur_pair_idx = get_pairidx_for_regidx(pairs, n, cur_idx, 0);
if (cur_idx != head) {
cycle->elems[idx++] = pairs[cur_pair_idx].out_reg;
cycle->n_elems++;
-
- n_pairs_done++;
}
else {
/* we are there where we started -> CYCLE */
cycle->type = PERM_CYCLE;
}
+ }
+
+ /* mark all pairs having one in/out register with cycle in common as checked */
+ for (idx = 0; idx < cycle->n_elems; idx++) {
+ cur_pair_idx = get_pairidx_for_regidx(pairs, n, cycle->elems[idx]->index, 0);
+
+ if (cur_pair_idx >= 0)
+ pairs[cur_pair_idx].checked = 1;
- /* mark the pair as checked */
- pairs[cur_pair_idx].checked = 1;
+ cur_pair_idx = get_pairidx_for_regidx(pairs, n, cycle->elems[idx]->index, 1);
+
+ if (cur_pair_idx >= 0)
+ pairs[cur_pair_idx].checked = 1;
}
return cycle;
/**
* Lowers a perm node. Resolves cycles and creates a bunch of
* copy and swap operations to permute registers.
+ * Note: The caller of this function has to make sure, that irn
+ * is a Perm node.
*
* @param irn The perm node
* @param block The block the perm node belongs to
reg_pair_t *pairs;
const ir_edge_t *edge;
perm_cycle_t *cycle;
- int n, i, pn, do_copy;
+ int n, i, pn, do_copy, j;
ir_node *sched_point, *block, *in[2];
ir_node *arg1, *arg2, *res1, *res2;
ir_node *cpyxchg = NULL;
- if (is_Block(irn))
- return;
-
arch_env = env->chord_env->main_env->arch_env;
do_copy = env->do_copy;
mod = env->dbg_module;
block = get_nodes_block(irn);
- /* check if perm
- Note: A Proj on a Perm will cause is_Perm()
- also to return true */
- if (is_Proj(irn) || ! is_Perm(arch_env, irn))
- return;
-
/*
Get the schedule predecessor node to the perm
NOTE: This works with auto-magic. If we insert the
assert(n == get_irn_n_edges(irn) && "perm's in and out numbers different");
reg_class = arch_get_irn_register(arch_env, get_irn_n(irn, 0))->reg_class;
- pairs = calloc(n, sizeof(pairs[0]));
+ pairs = alloca(n * sizeof(pairs[0]));
/* build the list of register pairs (in, out) */
i = 0;
/* go to the first not-checked pair */
while (pairs[i].checked) i++;
- cycle = calloc(1, sizeof(*cycle));
+ cycle = xcalloc(1, sizeof(*cycle));
cycle = get_perm_cycle(cycle, pairs, n, i);
+ DB((mod, LEVEL_1, "%+F: following %s created:\n ", irn, cycle->type == PERM_CHAIN ? "chain" : "cycle"));
+ for (j = 0; j < cycle->n_elems; j++) {
+ DB((mod, LEVEL_1, " %s", cycle->elems[j]->name));
+ }
+ DB((mod, LEVEL_1, "\n"));
+
/* We don't need to do anything if we have a Perm with two
elements which represents a cycle, because those nodes
already represent exchange nodes */
//TODO: - iff PERM_CYCLE && do_copy -> determine free temp reg and insert copy to/from it before/after
// the copy cascade (this reduces the cycle into a chain)
- /* build copy/swap nodes from back to front */
- for (i = cycle->n_elems - 2; i >= 0; i--) {
+ /* build copy/swap nodes */
+ for (i = 0; i < cycle->n_elems - 1; i++) {
arg1 = get_node_for_register(pairs, n, cycle->elems[i], 0);
arg2 = get_node_for_register(pairs, n, cycle->elems[i + 1], 0);
DBG((mod, LEVEL_1, "replacing %+F with %+F, placed new node after %+F\n", irn, cpyxchg, sched_point));
}
-// free(cycle->elems);
+ free(cycle->elems);
free(cycle);
}
sched_remove(irn);
}
+
+
/**
- * Walks over all blocks in an irg and performs perm lowering.
+ * Adds Projs to keep nodes for each register class, which eats the
+ * caller saved registers.
+ * Note: The caller has to make sure, that call is a Call
+ *
+ * @param call The Call node
+ * @param walk_env The walker environment
+ */
+static void lower_call_node(ir_node *call, const void *walk_env) {
+ const arch_env_t *arch_env = walk_env;
+ int bitset_idx = 0;
+ int set_size = 0;
+ arch_isa_t *isa = arch_env_get_isa(arch_env);
+ const ir_node *proj_T = NULL;
+ ir_node *block = get_nodes_block(call);
+ const arch_register_class_t *reg_class;
+ int i, j, pn, keep_arity;
+ ir_node **in_keep;
+ bitset_t *proj_set;
+ const ir_edge_t *edge;
+ const arch_register_t *reg;
+
+ /* Prepare the bitset where we store the projnums which are already in use*/
+ for (i = 0; i < arch_isa_get_n_reg_class(isa); i++) {
+ reg_class = arch_isa_get_reg_class(isa, i);
+ set_size += arch_register_class_n_regs(reg_class);
+ }
+
+ in_keep = xmalloc(set_size * sizeof(ir_node *));
+
+ proj_set = bitset_malloc(set_size);
+ bitset_clear_all(proj_set);
+
+ /* check if there is a ProjT node and which arguments are used */
+ foreach_out_edge(call, edge) {
+ if (get_irn_mode(get_edge_src_irn(edge)) == mode_T)
+ proj_T = get_edge_src_irn(edge);
+ }
+
+ /* set all used arguments */
+ if (proj_T) {
+ foreach_out_edge(proj_T, edge) {
+ ir_node *proj = get_edge_src_irn(edge);
+
+ assert(is_Proj(proj));
+ pn = isa->impl->handle_call_proj(isa, proj, 0);
+ bitset_set(proj_set, pn);
+ }
+ }
+ else {
+ proj_T = new_r_Proj(current_ir_graph, block, call, mode_T, pn_Call_T_result);
+ }
+
+ /* Create for each caller save register a proj (keep node argument) */
+ /* if this proj is not already present */
+ for (i = 0; i < arch_isa_get_n_reg_class(isa); i++) {
+
+ /* reset the keep input, as we need one keep for each register class */
+ memset(in_keep, 0, set_size * sizeof(ir_node *));
+ keep_arity = 0;
+ reg_class = arch_isa_get_reg_class(isa, i);
+
+ for (j = 0; j < arch_register_class_n_regs(reg_class); j++) {
+ reg = arch_register_for_index(reg_class, j);
+
+ /* only check caller save registers */
+ if (arch_register_type_is(reg, caller_saved)) {
+
+ /* Only create new proj, iff not already present */
+ if (!bitset_is_set(proj_set, bitset_idx)) {
+ ir_node *proj = new_r_Proj(current_ir_graph, block, (ir_node *)proj_T, mode_Is, bitset_idx);
+
+ pn = isa->impl->handle_call_proj(isa, proj, 1);
+ in_keep[keep_arity++] = proj;
+ }
+
+ bitset_idx++;
+ }
+ }
+
+ /* ok, we found some caller save register which are not in use but must be saved */
+ if (keep_arity) {
+ be_new_Keep(reg_class, current_ir_graph, block, keep_arity, in_keep);
+ }
+ }
+
+ bitset_free(proj_set);
+ return;
+}
+
+
+
+/**
+ * Calls the backend code generator functions to lower Spill and
+ * Reload nodes into Store and Load. The backend is fully responsible
+ * for creating the new nodes and setting their input correct.
+ * Note: The caller of this has to make sure that irn is a Spill
+ * or Reload!
+ *
+ * @param irn The Spill/Reload node
+ * @param walk_env The walker environment
+ */
+static void lower_spill_reload(ir_node *irn, void *walk_env) {
+ lower_env_t *env = walk_env;
+ arch_code_generator_t *cg = env->chord_env->main_env->cg;
+ const arch_env_t *aenv = env->chord_env->main_env->arch_env;
+ ir_node *res = NULL;
+ ir_node *sched_point;
+
+ if (be_is_Spill(irn) && cg->impl->lower_spill) {
+ res = cg->impl->lower_spill(cg, irn);
+ }
+ else if (be_is_Reload(irn) && cg->impl->lower_reload) {
+ res = cg->impl->lower_reload(cg, irn);
+ if (res && res != irn) {
+ /* copy the result register from the reload to the load */
+ arch_set_irn_register(aenv, res, arch_get_irn_register(aenv, irn));
+ }
+ }
+
+ if (res && res != irn) {
+ sched_point = sched_prev(irn);
+ sched_remove(irn);
+ exchange(irn, res);
+ sched_add_after(sched_point, res);
+ }
+ else {
+ DBG((env->dbg_module, LEVEL_1, "node %+F not lowered\n", irn));
+ }
+
+ return;
+}
+
+
+/**
+ * Calls the corresponding lowering function for the node.
+ *
+ * @param irn The node to be checked for lowering
+ * @param walk_env The walker environment
+ */
+static void lower_nodes_before_sched_walker(ir_node *irn, const void *walk_env) {
+ const arch_env_t *arch_env = walk_env;
+
+ if (!is_Block(irn) && !is_Proj(irn)) {
+ if (is_Call(arch_env, irn)) {
+ lower_call_node(irn, walk_env);
+ }
+ }
+
+ return;
+}
+
+
+/**
+ * Calls the corresponding lowering function for the node.
+ *
+ * @param irn The node to be checked for lowering
+ * @param walk_env The walker environment
+ */
+static void lower_nodes_after_ra_walker(ir_node *irn, void *walk_env) {
+ lower_env_t *env = walk_env;
+ const arch_env_t *arch_env = env->chord_env->main_env->arch_env;
+
+ if (!is_Block(irn) && !is_Proj(irn)) {
+ if (is_Perm(arch_env, irn)) {
+ lower_perm_node(irn, walk_env);
+ }
+ else if (be_is_Spill(irn) || be_is_Reload(irn)) {
+ lower_spill_reload(irn, walk_env);
+ }
+ }
+
+ return;
+}
+
+
+
+/**
+ * Walks over all blocks in an irg and performs lowering need
+ * to be done before scheduling (e.g. call lowering).
+ *
+ * @param chord_env The chordal environment containing the irg
+ * @param do_copy 1 == resolve cycles with a free reg if available
+ */
+void lower_nodes_before_sched(ir_graph *irg, const void *env) {
+ irg_walk_blkwise_graph(irg, NULL, lower_nodes_before_sched_walker, (void *)env);
+}
+
+
+
+/**
+ * Walks over all blocks in an irg and performs lowering need to be
+ * done after register allocation (e.g. perm and spill/reload lowering).
*
* @param chord_env The chordal environment containing the irg
* @param do_copy 1 == resolve cycles with a free reg if available
*/
-void lower_perms(be_chordal_env_t *chord_env, int do_copy) {
+void lower_nodes_after_ra(be_chordal_env_t *chord_env, int do_copy) {
lower_env_t env;
env.chord_env = chord_env;
env.do_copy = do_copy;
- env.dbg_module = firm_dbg_register("ir.be.lower");
+ env.dbg_module = firm_dbg_register("firm.be.lower");
- irg_walk_blkwise_graph(chord_env->irg, NULL, lower_perm_node, &env);
+ irg_walk_blkwise_graph(chord_env->irg, NULL, lower_nodes_after_ra_walker, &env);
}
+
+#undef is_Perm
+#undef is_Call
projects / libfirm / blobdiff