#include "iredges_t.h"
#include "irgwalk.h"
-#ifdef _WIN32
-#include <malloc.h>
-#else
-#include <alloca.h>
+#ifdef HAVE_MALLOC_H
+ #include <malloc.h>
+#endif
+#ifdef HAVE_ALLOCA_H
+ #include <alloca.h>
#endif
#undef is_Perm
#define is_Perm(arch_env, irn) (arch_irn_classify(arch_env, irn) == arch_irn_class_perm)
-#undef is_Call
-#define is_Call(arch_env, irn) (arch_irn_classify(arch_env, irn) == arch_irn_class_call)
+/* collect static data about perms */
+typedef struct _perm_stat_t {
+ const arch_register_class_t *cls; /**< the current register class */
+ int *perm_size_ar; /**< the sizes of all perms in an irg */
+ int *real_perm_size_ar; /**< the sizes of all perms in an irg */
+ int *chain_len_ar; /**< the sizes of all chains for all perms */
+ int *cycle_len_ar; /**< the siyes of all cycles for all perms */
+ int num_perms; /**< number of all perms */
+ int num_real_perms; /**< number of all perms */
+ int num_chains; /**< the number of all chains */
+ int num_cycles; /**< the number of all cycles */
+} perm_stat_t;
/* lowering walker environment */
typedef struct _lower_env_t {
be_chordal_env_t *chord_env;
- int do_copy;
- firm_dbg_module_t *dbg_module;
+ unsigned do_copy:1;
+ unsigned do_stat:1;
+ unsigned pstat_n:30;
+ perm_stat_t **pstat;
+ DEBUG_ONLY(firm_dbg_module_t *dbg_module;)
} lower_env_t;
/* holds a perm register pair */
static void lower_perm_node(ir_node *irn, void *walk_env) {
const arch_register_class_t *reg_class;
const arch_env_t *arch_env;
- firm_dbg_module_t *mod;
- lower_env_t *env = walk_env;
+ lower_env_t *env = walk_env;
+ perm_stat_t **pstat = env->pstat;
reg_pair_t *pairs;
const ir_edge_t *edge;
perm_cycle_t *cycle;
- int n, i, pn, do_copy, j;
+ int n, i, pn, do_copy, j, pstat_idx = -1;
ir_node *sched_point, *block, *in[2];
ir_node *arg1, *arg2, *res1, *res2;
ir_node *cpyxchg = NULL;
+ DEBUG_ONLY(firm_dbg_module_t *mod;)
arch_env = env->chord_env->birg->main_env->arch_env;
do_copy = env->do_copy;
- mod = env->dbg_module;
+ DEBUG_ONLY(mod = env->dbg_module;)
block = get_nodes_block(irn);
/*
reg_class = arch_get_irn_register(arch_env, get_irn_n(irn, 0))->reg_class;
pairs = alloca(n * sizeof(pairs[0]));
+ if (env->do_stat) {
+ /* determine index in statistics */
+ for (i = 0; i < env->pstat_n; i++) {
+ if (strcmp(pstat[i]->cls->name, reg_class->name) == 0) {
+ pstat_idx = i;
+ break;
+ }
+ }
+ assert(pstat_idx >= 0 && "could not determine class index for statistics");
+
+ pstat[pstat_idx]->num_perms++;
+ pstat[pstat_idx]->perm_size_ar[n - 1]++;
+ }
+
/* build the list of register pairs (in, out) */
i = 0;
foreach_out_edge(irn, edge) {
do_copy = 0;
}
+ if (env->do_stat && get_n_checked_pairs(pairs, n) < n) {
+ pstat[pstat_idx]->num_real_perms++;
+ pstat[pstat_idx]->real_perm_size_ar[n - 1]++;
+ }
+
/* check for cycles and chains */
while (get_n_checked_pairs(pairs, n) < n) {
i = 0;
}
DB((mod, LEVEL_1, "\n"));
+ /* statistics */
+ if (env->do_stat) {
+ int n_idx = cycle->n_elems - 1;
+ if (cycle->type == PERM_CHAIN) {
+ pstat[pstat_idx]->num_chains++;
+ pstat[pstat_idx]->chain_len_ar[n_idx]++;
+ }
+ else {
+ pstat[pstat_idx]->num_cycles++;
+ pstat[pstat_idx]->cycle_len_ar[n_idx]++;
+ }
+ }
+
/* We don't need to do anything if we have a Perm with two
elements which represents a cycle, because those nodes
already represent exchange nodes */
int pidx = get_pairidx_for_regidx(pairs, n, cycle->elems[i]->index, 0);
/* create intermediate proj */
- res2 = new_r_Proj(get_irn_irg(irn), block, cpyxchg, get_irn_mode(res1), 0);
+ res1 = new_r_Proj(get_irn_irg(irn), block, cpyxchg, get_irn_mode(res1), 0);
/* set as in for next Perm */
- pairs[pidx].in_node = res2;
+ pairs[pidx].in_node = res1;
}
else {
- sched_remove(res2);
+ sched_remove(res1);
}
- sched_remove(res1);
+ sched_remove(res2);
set_Proj_pred(res2, cpyxchg);
set_Proj_proj(res2, 0);
arch_set_irn_register(arch_env, res2, cycle->elems[i + 1]);
arch_set_irn_register(arch_env, res1, cycle->elems[i]);
+
+ /* insert the copy/exchange node in schedule after the magic schedule node (see above) */
+ sched_add_after(sched_point, cpyxchg);
+
+ DBG((mod, LEVEL_1, "replacing %+F with %+F, placed new node after %+F\n", irn, cpyxchg, sched_point));
+
+ /* set the new scheduling point */
+ sched_point = res1;
}
else {
DBG((mod, LEVEL_1, "%+F creating copy node (%+F, %s) -> (%+F, %s)\n",
/* exchange copy node and proj */
exchange(res2, cpyxchg);
- }
- /* insert the copy/exchange node in schedule after the magic schedule node (see above) */
- sched_add_after(sched_point, cpyxchg);
- /* set the new scheduling point */
- sched_point = cpyxchg;
+ /* insert the copy/exchange node in schedule after the magic schedule node (see above) */
+ sched_add_after(sched_point, cpyxchg);
- DBG((mod, LEVEL_1, "replacing %+F with %+F, placed new node after %+F\n", irn, cpyxchg, sched_point));
+ /* set the new scheduling point */
+ sched_point = cpyxchg;
+ }
}
free((void *) cycle->elems);
+static int get_n_out_edges(const ir_node *irn) {
+ const ir_edge_t *edge;
+ int cnt = 0;
+
+ foreach_out_edge(irn, edge) {
+ cnt++;
+ }
+
+ return cnt;
+}
+
+static ir_node *belower_skip_proj(ir_node *irn) {
+ while(is_Proj(irn))
+ irn = get_Proj_pred(irn);
+ return irn;
+}
+
+static void fix_in(ir_node *irn, ir_node *old, ir_node *nw) {
+ int i, n;
+
+ irn = belower_skip_proj(irn);
+ n = get_irn_arity(irn);
+
+ for (i = 0; i < n; i++) {
+ if (get_irn_n(irn, i) == old) {
+ set_irn_n(irn, i, nw);
+ break;
+ }
+ }
+}
+
+static void gen_assure_different_pattern(ir_node *irn, be_irg_t *birg, ir_node *other_different) {
+ const arch_env_t *arch_env = birg->main_env->arch_env;
+ ir_node *in[2], *keep, *cpy, *temp;
+ ir_node *block = get_nodes_block(irn);
+ const arch_register_class_t *cls = arch_get_irn_reg_class(arch_env, other_different, -1);
+ FIRM_DBG_REGISTER(firm_dbg_module_t *mod, "firm.be.lower");
+
+ if (arch_irn_is(arch_env, other_different, ignore) || ! mode_is_datab(get_irn_mode(other_different))) {
+ DBG((mod, LEVEL_1, "ignore constraint for %+F because other_irn is ignore or not a datab node\n", irn));
+ return;
+ }
+
+ /* Make a not spillable copy of the different node */
+ /* this is needed because the different irn could be */
+ /* in block far far away */
+ /* The copy is optimized later if not needed */
+
+ temp = new_rd_Unknown(birg->irg, get_irn_mode(other_different));
+ cpy = be_new_Copy(cls, birg->irg, block, temp);
+ be_node_set_flags(cpy, BE_OUT_POS(0), arch_irn_flags_dont_spill);
+
+ in[0] = irn;
+ in[1] = cpy;
+
+ /* Let the irn use the copy instead of the old other_different */
+ fix_in(irn, other_different, cpy);
+
+ /* Add the Keep resp. CopyKeep and reroute the users */
+ /* of the other_different irn in case of CopyKeep. */
+ if (get_n_out_edges(other_different) == 0) {
+ keep = be_new_Keep(cls, birg->irg, block, 2, in);
+ }
+ else {
+ keep = be_new_CopyKeep_single(cls, birg->irg, block, cpy, irn, get_irn_mode(other_different));
+ be_node_set_reg_class(keep, 1, cls);
+ edges_reroute(other_different, keep, birg->irg);
+ }
+
+ /* after rerouting: let the copy point to the other_different irn */
+ set_irn_n(cpy, 0, other_different);
+
+ DBG((mod, LEVEL_1, "created %+F for %+F to assure should_be_different\n", keep, irn));
+}
+
+/**
+ * Checks if node has a should_be_different constraint in output
+ * and adds a Keep then to assure the constraint.
+ */
+static void assure_different_constraints(ir_node *irn, be_irg_t *birg) {
+ const arch_env_t *arch_env = birg->main_env->arch_env;
+ const arch_register_req_t *req;
+ arch_register_req_t req_temp;
+ int i, n;
+
+ req = arch_get_register_req(arch_env, &req_temp, irn, -1);
+
+ if (req) {
+ if (arch_register_req_is(req, should_be_different)) {
+ gen_assure_different_pattern(irn, birg, req->other_different);
+ }
+ else if (arch_register_req_is(req, should_be_different_from_all)) {
+ n = get_irn_arity(belower_skip_proj(irn));
+ for (i = 0; i < n; i++) {
+ gen_assure_different_pattern(irn, birg, get_irn_n(belower_skip_proj(irn), i));
+ }
+ }
+ }
+}
+
+
+
+/**
+ * Calls the functions to assure register constraints.
+ *
+ * @param irn The node to be checked for lowering
+ * @param walk_env The walker environment
+ */
+static void assure_constraints_walker(ir_node *irn, void *walk_env) {
+ if (is_Block(irn))
+ return;
+
+ if (mode_is_datab(get_irn_mode(irn)))
+ assure_different_constraints(irn, walk_env);
+
+ return;
+}
+
+
+
+/**
+ * Walks over all nodes to assure register constraints.
+ *
+ * @param birg The birg structure containing the irg
+ */
+void assure_constraints(be_irg_t *birg) {
+ irg_walk_blkwise_graph(birg->irg, NULL, assure_constraints_walker, birg);
+}
+
+
+
/**
* Calls the corresponding lowering function for the node.
*
return;
}
+static void lower_print_perm_stat(lower_env_t *env) {
+ int i, j, total_len_chain, total_len_cycle, total_size_perm, total_size_real_perm;
+
+ printf("=== IRG: %s ===\n", get_entity_name(get_irg_entity(env->chord_env->irg)));
+ for (i = 0; i < env->pstat_n; i++) {
+ if (env->pstat[i]->num_perms == 0)
+ continue;
+
+ printf("CLASS: %s\n", env->pstat[i]->cls->name);
+ printf("# total perms: %d (size:num -> 1:%d", env->pstat[i]->num_perms, env->pstat[i]->perm_size_ar[0]);
+
+ total_size_perm = env->pstat[i]->perm_size_ar[0];
+ for (j = 1; j < env->pstat[i]->cls->n_regs; j++) {
+ total_size_perm += (j + 1) * env->pstat[i]->perm_size_ar[j];
+ printf(", %d:%d", j + 1, env->pstat[i]->perm_size_ar[j]);
+ }
+ printf(")\n");
+ printf("avg perm size: %.2f\n", env->pstat[i]->num_perms ? (float)total_size_perm / (float)env->pstat[i]->num_perms : 0);
+
+ printf("# real perms: %d (size:num -> 1:%d", env->pstat[i]->num_real_perms, env->pstat[i]->real_perm_size_ar[0]);
+
+ total_size_real_perm = env->pstat[i]->real_perm_size_ar[0];
+ for (j = 1; j < env->pstat[i]->cls->n_regs; j++) {
+ total_size_real_perm += (j + 1) * env->pstat[i]->real_perm_size_ar[j];
+ printf(", %d:%d", j + 1, env->pstat[i]->real_perm_size_ar[j]);
+ }
+ printf(")\n");
+ printf("avg real perm size: %.2f\n", env->pstat[i]->num_real_perms ? (float)total_size_real_perm / (float)env->pstat[i]->num_real_perms : 0);
+ printf("# total chains: %d (lenght:num -> 1:%d", env->pstat[i]->num_chains, env->pstat[i]->chain_len_ar[0]);
+
+ total_len_chain = env->pstat[i]->chain_len_ar[0];
+
+ for (j = 1; j < env->pstat[i]->cls->n_regs; j++) {
+ total_len_chain += (j + 1) * env->pstat[i]->chain_len_ar[j];
+ printf(", %d:%d", j + 1, env->pstat[i]->chain_len_ar[j]);
+ }
+ printf(")\n");
+ printf("avg chain length: %.2f\n", env->pstat[i]->num_chains ? (float)total_len_chain / (float)env->pstat[i]->num_chains : 0);
+ printf("avg chains/perm: %.2f\n", env->pstat[i]->num_real_perms ? (float)env->pstat[i]->num_chains / (float)env->pstat[i]->num_real_perms : 0);
+
+ printf("# total cycles: %d (length:num -> 1:%d", env->pstat[i]->num_cycles, env->pstat[i]->cycle_len_ar[0]);
+
+ total_len_cycle = env->pstat[i]->cycle_len_ar[0];
+ for (j = 1; j < env->pstat[i]->cls->n_regs; j++) {
+ total_len_cycle += (j + 1) * env->pstat[i]->cycle_len_ar[j];
+ printf(", %d:%d", j + 1, env->pstat[i]->cycle_len_ar[j]);
+ }
+ printf(")\n");
+ printf("avg cycle length: %.2f\n", env->pstat[i]->num_cycles ? (float)total_len_cycle / (float)env->pstat[i]->num_cycles : 0);
+ printf("avg cycles/perm: %.2f\n", env->pstat[i]->num_real_perms ? (float)env->pstat[i]->num_cycles / (float)env->pstat[i]->num_real_perms : 0);
+ }
+}
/**
* Walks over all blocks in an irg and performs lowering need to be
- * done after register allocation (e.g. perm and spill/reload lowering).
+ * done after register allocation (e.g. perm lowering).
*
* @param chord_env The chordal environment containing the irg
* @param do_copy 1 == resolve cycles with a free reg if available
*/
-void lower_nodes_after_ra(be_chordal_env_t *chord_env, int do_copy) {
+void lower_nodes_after_ra(be_chordal_env_t *chord_env, int do_copy, int do_stat) {
lower_env_t env;
env.chord_env = chord_env;
env.do_copy = do_copy;
- env.dbg_module = firm_dbg_register("firm.be.lower");
+ env.do_stat = do_stat;
+ FIRM_DBG_REGISTER(env.dbg_module, "firm.be.lower");
+
+ /* if we want statistics: allocate memory for the data and initialize with 0 */
+ if (do_stat) {
+ const arch_isa_t *isa = chord_env->birg->main_env->arch_env->isa;
+ int i, n = arch_isa_get_n_reg_class(isa);
+
+ env.pstat = alloca(n * sizeof(env.pstat[0]));
+ env.pstat_n = n;
+
+ for (i = 0; i < n; i++) {
+ const arch_register_class_t *cls = arch_isa_get_reg_class(isa, i);
+ int n_regs = cls->n_regs;
+
+ env.pstat[i] = alloca(sizeof(*(env.pstat[0])));
+ memset(env.pstat[i], 0, sizeof(*(env.pstat[0])));
+
+ env.pstat[i]->perm_size_ar = alloca(n_regs * sizeof(env.pstat[i]->perm_size_ar[0]));
+ env.pstat[i]->real_perm_size_ar = alloca(n_regs * sizeof(env.pstat[i]->real_perm_size_ar[0]));
+ env.pstat[i]->chain_len_ar = alloca(n_regs * sizeof(env.pstat[i]->chain_len_ar[0]));
+ env.pstat[i]->cycle_len_ar = alloca(n_regs * sizeof(env.pstat[i]->cycle_len_ar[0]));
+
+ memset(env.pstat[i]->perm_size_ar, 0, n_regs * sizeof(env.pstat[i]->perm_size_ar[0]));
+ memset(env.pstat[i]->real_perm_size_ar, 0, n_regs * sizeof(env.pstat[i]->real_perm_size_ar[0]));
+ memset(env.pstat[i]->chain_len_ar, 0, n_regs * sizeof(env.pstat[i]->chain_len_ar[0]));
+ memset(env.pstat[i]->cycle_len_ar, 0, n_regs * sizeof(env.pstat[i]->cycle_len_ar[0]));
+
+ env.pstat[i]->cls = cls;
+ }
+ }
irg_walk_blkwise_graph(chord_env->irg, NULL, lower_nodes_after_ra_walker, &env);
+
+ if (do_stat) {
+ lower_print_perm_stat(&env);
+ }
}
#undef is_Perm
-#undef is_Call
projects / libfirm / blobdiff