sparc: mostly implement reg+reg address mode

[libfirm] / ir / be / beloopana.c

diff --git a/ir/be/beloopana.c b/ir/be/beloopana.c
index bd3c867..713ce40 100644 (file)
--- a/ir/be/beloopana.c
+++ b/ir/be/beloopana.c
@@ -44,13 +44,13 @@ DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL);
 
 #define HASH_LOOP_INFO(info) (HASH_PTR((info)->loop) ^ HASH_PTR((info)->cls))
 
-typedef struct _be_loop_info_t {
+typedef struct be_loop_info_t {
        ir_loop                     *loop;
        const arch_register_class_t *cls;
        unsigned                    max_pressure;
 } be_loop_info_t;
 
-struct _be_loopana_t {
+struct be_loopana_t {
        set      *data;
        ir_graph *irg;
 };
@@ -177,8 +177,8 @@ be_loopana_t *be_new_loop_pressure_cls(ir_graph *irg,
 }
 
 /**
- * Compute the register pressure for all classes of all loops in the birg.
- * @param birg  The backend irg object
+ * Compute the register pressure for all classes of all loops in the irg.
+ * @param irg  The graph
  * @return The loop analysis object.
  */
 be_loopana_t *be_new_loop_pressure(ir_graph *irg,