static INLINE int must_appear_in_schedule(const list_sched_selector_t *sel, void *block_env, const ir_node *irn)
{
- int res = 0;
+ int res = -1;
if(sel->to_appear_in_schedule)
res = sel->to_appear_in_schedule(block_env, irn);
- return res || to_appear_in_schedule(irn) || be_is_Keep(irn) || be_is_RegParams(irn);
+ return res >= 0 ? res : (to_appear_in_schedule(irn) || be_is_Keep(irn) || be_is_RegParams(irn));
}
static const list_sched_selector_t trivial_selector_struct = {
static char _mark;
#define MARK &_mark
+static firm_dbg_module_t *xxxdbg;
+
/**
* descent into a dag and create a pre-order list.
*/
for (i = get_irn_arity(root) - 1; i >= 0; --i) {
ir_node *pred = get_irn_n(root, i);
+ DBG((xxxdbg, LEVEL_3, " node %+F\n", pred));
/* Blocks may happen as predecessors of End nodes */
if (is_Block(pred))
continue;
if (get_nodes_block(pred) != block)
continue;
+ // set_irn_link(pred, NULL);
+
descent(pred, block, list);
}
}
be.selector = selector;
be.sched_env = env;
FIRM_DBG_REGISTER(be.dbg, "firm.be.sched");
+ FIRM_DBG_REGISTER(xxxdbg, "firm.be.sched");
// firm_dbg_set_mask(be.dbg, SET_LEVEL_3);
preord = NULL;
for (curr = root; curr; curr = irn) {
irn = get_irn_link(curr);
+ DBG((be.dbg, LEVEL_2, " DAG root %+F\n", curr));
descent(curr, block, &preord);
}
root = preord;