/*
- * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
+ * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
*
* This file is part of libFirm.
*
* by Daniel Kaestner and Sebastian Winkel
* extended with register pressure constraints by Christian Wuerdig
*/
-#ifdef HAVE_CONFIG_H
#include "config.h"
-#endif
#ifdef WITH_ILP
#include "irprintf.h"
#include "plist.h"
#include "irprintf.h"
+#include "timing.h"
#include <lpp/lpp.h>
#include <lpp/lpp_net.h>
-#include <libcore/lc_opts.h>
-#include <libcore/lc_opts_enum.h>
-#include <libcore/lc_timing.h>
+#include "lc_opts.h"
+#include "lc_opts_enum.h"
#include "be.h"
-#include "benode_t.h"
-#include "besched_t.h"
+#include "benode.h"
+#include "besched.h"
#include "beilpsched.h"
#include "beutil.h"
#include "bestat.h"
-#include "beirg_t.h"
-#include "benodesets.h"
+#include "beirg.h"
+#include "bemachine.h"
+#include "belistsched.h"
typedef struct _ilpsched_options_t {
unsigned regpress;
/* A irn for the phase and it's attributes (either node or block) */
typedef struct {
- ir_node *irn;
+ const ir_node *irn;
ilpsched_attr_t attr;
} be_ilpsched_irn_t;
void *irg_env; /**< An environment for the irg scheduling, provided by the backend */
void *block_env; /**< An environment for scheduling a block, provided by the backend */
const arch_env_t *arch_env;
- const arch_isa_t *isa; /**< The ISA */
const be_main_env_t *main_env;
const be_machine_t *cpu; /**< the current abstract machine */
ilpsched_options_t *opts; /**< the ilp options for current irg */
#define get_ilpsched_node_attr(node) (&(node)->attr.node_attr)
/* check if node is considered for ILP scheduling */
-#define consider_for_sched(isa, irn) \
+#define consider_for_sched(env, irn) \
(! (is_Block(irn) || \
- is_normal_Proj(isa, irn) || \
+ is_normal_Proj(env, irn) || \
is_Phi(irn) || \
is_NoMem(irn) || \
is_Unknown(irn) || \
/* check if a double value is within an epsilon environment of 0 */
#define LPP_VALUE_IS_0(dbl) (fabs((dbl)) <= 1e-10)
-#define ilp_timer_push(t) lc_timer_push((t))
-#define ilp_timer_pop() lc_timer_pop()
-#define ilp_timer_elapsed_usec(t) lc_timer_elapsed_usec((t))
-
/* option variable */
static ilpsched_options_t ilp_opts = {
1, /* default is with register pressure constraints */
* Check if irn is a Proj, which has no execution units assigned.
* @return 1 if irn is a Proj having no execution units assigned, 0 otherwise
*/
-static INLINE int is_normal_Proj(const arch_isa_t *isa, const ir_node *irn) {
- return is_Proj(irn) && (arch_isa_get_allowed_execution_units(isa, irn) == NULL);
+static inline int is_normal_Proj(const arch_env_t *env, const ir_node *irn) {
+ return is_Proj(irn) && (arch_env_get_allowed_execution_units(env, irn) == NULL);
}
/**
* Skips normal Projs.
* @return predecessor if irn is a normal Proj, otherwise irn.
*/
-static INLINE ir_node *skip_normal_Proj(const arch_isa_t *isa, ir_node *irn) {
- if (is_normal_Proj(isa, irn))
+static inline ir_node *skip_normal_Proj(const arch_env_t *env, ir_node *irn) {
+ if (is_normal_Proj(env, irn))
return get_Proj_pred(irn);
return irn;
}
-static INLINE int fixed_latency(const ilp_sched_selector_t *sel, ir_node *irn, void *env) {
+static inline int fixed_latency(const ilp_sched_selector_t *sel, ir_node *irn, void *env) {
unsigned lat = be_ilp_sched_latency(sel, irn, env);
if (lat == 0 && ! is_Proj(irn) && ! be_is_Keep(irn))
lat = 1;
ilpsched_node_attr_t *n2_a = get_ilpsched_node_attr(n2);
if (n1_a->sched_point == n2_a->sched_point) {
- ir_node *irn_a = n1->irn;
- ir_node *irn_b = n2->irn;
+ const ir_node *irn_a = n1->irn;
+ const ir_node *irn_b = n2->irn;
if (heights_reachable_in_block(glob_heights, irn_a, irn_b))
return 1;
/**
* In case there is no phase information for irn, initialize it.
*/
-static void *init_ilpsched_irn(ir_phase *ph, ir_node *irn, void *old) {
+static void *init_ilpsched_irn(ir_phase *ph, const ir_node *irn, void *old) {
be_ilpsched_irn_t *res = old ? old : phase_alloc(ph, sizeof(res[0]));
if (res == old) {
ilpsched_block_attr_t *ba;
set_irn_link(irn, NULL);
- if (! consider_for_sched(env->arch_env->isa, irn))
+ if (! consider_for_sched(env->arch_env, irn))
return;
node = get_ilpsched_irn(env, irn);
ir_node **consumer;
unsigned idx;
- if (! consider_for_sched(env->arch_env->isa, irn))
+ if (! consider_for_sched(env->arch_env, irn))
return;
block = get_nodes_block(irn);
foreach_out_edge_kind(irn, edge, ekind[i]) {
ir_node *user = get_edge_src_irn(edge);
- if (is_normal_Proj(env->arch_env->isa, user)) {
+ if (is_normal_Proj(env->arch_env, user)) {
const ir_edge_t *user_edge;
if (get_irn_mode(user) == mode_X)
ilpsched_block_attr_t *ba;
/* These nodes are handled separate */
- if (! consider_for_sched(env->arch_env->isa, irn))
+ if (! consider_for_sched(env->arch_env, irn))
return;
DBG((env->dbg, LEVEL_2, "Calculating ASAP of node %+F ... ", irn));
na->asap = 1;
for (i = get_irn_ins_or_deps(irn) - 1; i >= 0; --i) {
- ir_node *pred = skip_normal_Proj(env->arch_env->isa, get_irn_in_or_dep(irn, i));
+ ir_node *pred = skip_normal_Proj(env->arch_env, get_irn_in_or_dep(irn, i));
/* check for greatest distance to top */
if (! is_Phi(pred) && ! is_NoMem(pred) && get_nodes_block(pred) == block) {
/* set the alap's of all predecessors */
for (i = get_irn_ins_or_deps(cur_irn) - 1; i >= 0; --i) {
- ir_node *pred = skip_normal_Proj(env->arch_env->isa, get_irn_in_or_dep(cur_irn, i));
+ ir_node *pred = skip_normal_Proj(env->arch_env, get_irn_in_or_dep(cur_irn, i));
/* check for greatest distance to bottom */
if (! is_Phi(pred) && ! is_NoMem(pred) && get_nodes_block(pred) == block) {
be_ilpsched_irn_t *node, *pred_node;
ilpsched_node_attr_t *na, *pna;
- if (! consider_for_sched(env->arch_env->isa, irn))
+ if (! consider_for_sched(env->arch_env, irn))
return;
if (! is_Proj(irn) && ! be_is_Keep(irn))
*
*******************************************/
-static INLINE void check_for_keeps(waitq *keeps, ir_node *block, ir_node *irn) {
+static inline void check_for_keeps(waitq *keeps, const ir_node *block, const ir_node *irn) {
const ir_edge_t *edge;
+ (void) block;
foreach_out_edge(irn, edge) {
ir_node *user = get_edge_src_irn(edge);
/**
* Inserts @p irn before @p before into schedule and notifies backend.
*/
-static INLINE void notified_sched_add_before(be_ilpsched_env_t *env,
- ir_node *before, ir_node *irn, unsigned cycle)
+static inline void notified_sched_add_before(be_ilpsched_env_t *env,
+ const ir_node *before, const ir_node *irn, unsigned cycle)
{
be_ilp_sched_node_scheduled(env->sel, irn, cycle, env->block_env);
- sched_add_before(before, irn);
+ sched_add_before((ir_node*) before, (ir_node*) irn);
}
/**
* Adds a node, it's Projs (in case of mode_T nodes) and
* it's Keeps to schedule.
*/
-static void add_to_sched(be_ilpsched_env_t *env, ir_node *block, ir_node *irn, unsigned cycle) {
+static void add_to_sched(be_ilpsched_env_t *env, const ir_node *block, const ir_node *irn, unsigned cycle) {
const ir_edge_t *edge;
waitq *keeps = new_waitq();
static void apply_solution(be_ilpsched_env_t *env, lpp_t *lpp, ir_node *block) {
be_ilpsched_irn_t *block_node = get_ilpsched_irn(env, block);
ilpsched_block_attr_t *ba = get_ilpsched_block_attr(block_node);
- sched_info_t *info = get_irn_sched_info(block);
be_ilpsched_irn_t **sched_nodes;
unsigned i, l;
ir_node *cfop, *irn;
const ir_edge_t *edge;
/* init block schedule list */
- INIT_LIST_HEAD(&info->list);
- info->scheduled = 1;
+ sched_init_block(block);
/* collect nodes and their scheduling time step */
sched_nodes = NEW_ARR_F(be_ilpsched_irn_t *, 0);
case iro_Phi:
add_to_sched(env, block, irn, 0);
break;
- case iro_Start:
+ case beo_Start:
case iro_End:
case iro_Proj:
case iro_Bad:
/**
* Check if node can be executed on given unit type.
*/
-static INLINE int is_valid_unit_type_for_node(const be_execution_unit_type_t *tp, be_ilpsched_irn_t *node) {
+static inline int is_valid_unit_type_for_node(const be_execution_unit_type_t *tp, be_ilpsched_irn_t *node) {
int i;
ilpsched_node_attr_t *na = get_ilpsched_node_attr(node);
************************************************/
static int be_ilpsched_set_type_info(be_ilpsched_env_t *env, ir_node *irn, struct obstack *obst) {
- const be_execution_unit_t ***execunits = arch_isa_get_allowed_execution_units(env->arch_env->isa, irn);
+ const be_execution_unit_t ***execunits = arch_env_get_allowed_execution_units(env->arch_env, irn);
unsigned n_unit_types = 0;
be_ilpsched_irn_t *node;
ilpsched_node_attr_t *na;
* Returns the largest alap time of a user of @p irn.
* The user must be in block @p block.
*/
-static unsigned be_ilpsched_get_max_alap_user(be_ilpsched_env_t *env, ir_node *irn, ir_node *block) {
+static unsigned be_ilpsched_get_max_alap_user(be_ilpsched_env_t *env, const ir_node *irn, const ir_node *block) {
const ir_edge_t *edge;
unsigned max_alap = 0;
ilp_livein_node_t *livein;
ilpsched_block_attr_t *ba = get_ilpsched_block_attr(block_node);
unsigned weigth_y = ba->n_interesting_nodes * ba->n_interesting_nodes;
- lc_timer_t *t_var = lc_timer_register("beilpsched_var", "create ilp variables");
- ilp_timer_push(t_var);
+ stat_ev_tim_push();
+
num_block_var = num_nodes = 0;
foreach_linked_irns(ba->head_ilp_nodes, irn) {
be_ilpsched_irn_t *node;
for (i = get_irn_arity(irn) - 1; i >= 0; --i) {
ir_node *pred = get_irn_n(irn, i);
- if (get_nodes_block(pred) != block_node->irn && consider_for_sched(env->arch_env->isa, pred)) {
+ if (get_nodes_block(pred) != block_node->irn && consider_for_sched(env->arch_env, pred)) {
be_ilpsched_set_type_info(env, pred, var_obst);
if (! na->is_dummy_node) {
- ilp_livein_node_t *entry = obstack_alloc(var_obst, sizeof(*entry));
+ ilp_livein_node_t *entry = OALLOC(var_obst, ilp_livein_node_t);
entry->irn = pred;
entry->a = NULL;
pset_insert(ba->livein_nodes, entry, (unsigned)get_irn_idx(pred));
}
}
- ilp_timer_pop();
- DBG((env->dbg, LEVEL_1, "... %u variables for %u nodes created (%g sec)\n",
- num_block_var, num_nodes, ilp_timer_elapsed_usec(t_var) / 1000000.0));
+ stat_ev_tim_pop("beilpsched_var");
}
/*******************************************************
* Collect all operands and nodes @p irn depends on.
* If there is a Proj within the dependencies, all other Projs of the parent node are added as well.
*/
-static nodeset *sta_collect_in_deps(ir_node *irn, nodeset *deps) {
+static void sta_collect_in_deps(ir_node *irn, ir_nodeset_t *deps) {
int i;
for (i = get_irn_ins_or_deps(irn) - 1; i >= 0; --i) {
p = get_Proj_pred(p);
foreach_out_edge(p, edge) {
ir_node *src = get_edge_src_irn(edge);
- nodeset_insert(deps, src);
+ ir_nodeset_insert(deps, src);
}
}
else {
- nodeset_insert(deps, p);
+ ir_nodeset_insert(deps, p);
}
}
-
- return deps;
}
/**
ir_node *irn;
ilpsched_block_attr_t *ba = get_ilpsched_block_attr(block_node);
bitset_t *bs_block_irns = bitset_alloca(ba->block_last_idx);
- lc_timer_t *t_cst_assign = lc_timer_register("beilpsched_cst_assign", "create assignment constraints");
- lc_timer_t *t_cst_prec = lc_timer_register("beilpsched_cst_prec", "create precedence constraints");
num_cst_assign = num_cst_prec = num_cst_dead = 0;
foreach_linked_irns(ba->head_ilp_nodes, irn) {
be_ilpsched_irn_t *node;
ilpsched_node_attr_t *na;
ir_node *pred;
- nodeset *deps = new_nodeset(16);
+ ir_nodeset_t deps;
+ ir_nodeset_iterator_t iter;
+
+ ir_nodeset_init(&deps);
node = get_ilpsched_irn(env, irn);
na = get_ilpsched_node_attr(node);
cur_var = 0;
/* the assignment constraint */
- ilp_timer_push(t_cst_assign);
+ stat_ev_tim_push();
snprintf(buf, sizeof(buf), "assignment_cst_n%u", get_irn_idx(irn));
cst = lpp_add_cst_uniq(lpp, buf, lpp_equal, 1.0);
DBG((env->dbg, LEVEL_2, "added constraint %s\n", buf));
num_cst_assign++;
lpp_set_factor_fast_bulk(lpp, cst, na->ilp_vars.x, ARR_LEN(na->ilp_vars.x), 1.0);
- ilp_timer_pop();
+ stat_ev_tim_pop("beilpsched_cst_assign");
/* We have separate constraints for Projs and Keeps */
// ILP becomes infeasible ?!?
// continue;
/* the precedence constraints */
- ilp_timer_push(t_cst_prec);
+ stat_ev_tim_push();
bs_block_irns = bitset_clear_all(bs_block_irns);
- deps = sta_collect_in_deps(irn, deps);
- foreach_nodeset(deps, pred) {
+ sta_collect_in_deps(irn, &deps);
+ foreach_ir_nodeset(&deps, pred, iter) {
unsigned t_low, t_high, t;
be_ilpsched_irn_t *pred_node;
ilpsched_node_attr_t *pna;
unsigned delay;
- pred = skip_normal_Proj(env->arch_env->isa, pred);
+ pred = skip_normal_Proj(env->arch_env, pred);
if (is_Phi(pred) || block_node->irn != get_nodes_block(pred) || is_NoMem(pred))
continue;
DEL_ARR_F(tmp_var_idx);
}
}
- del_nodeset(deps);
- ilp_timer_pop();
+ ir_nodeset_destroy(&deps);
+ stat_ev_tim_pop("beilpsched_cst_prec");
}
- DBG((env->dbg, LEVEL_1, "\t%u assignement constraints (%g sec)\n",
- num_cst_assign, ilp_timer_elapsed_usec(t_cst_assign) / 1000000.0));
- DBG((env->dbg, LEVEL_1, "\t%u precedence constraints (%g sec)\n",
- num_cst_prec, ilp_timer_elapsed_usec(t_cst_prec) / 1000000.0));
}
/**
char buf[1024];
unsigned num_cst_resrc = 0;
ilpsched_block_attr_t *ba = get_ilpsched_block_attr(block_node);
- lc_timer_t *t_cst_rsrc = lc_timer_register("beilpsched_cst_rsrc", "create resource constraints");
- ilp_timer_push(t_cst_rsrc);
+ stat_ev_tim_push();
for (glob_type_idx = env->cpu->n_unit_types - 1; glob_type_idx >= 0; --glob_type_idx) {
unsigned t;
be_execution_unit_type_t *cur_tp = &env->cpu->unit_types[glob_type_idx];
DEL_ARR_F(tmp_var_idx);
}
}
- ilp_timer_pop();
- DBG((env->dbg, LEVEL_1, "\t%u resource constraints (%g sec)\n",
- num_cst_resrc, ilp_timer_elapsed_usec(t_cst_rsrc) / 1000000.0));
+ stat_ev_tim_pop("beilpsched_cst_rsrc");
}
/**
unsigned num_cst_bundle = 0;
unsigned n_instr_max = env->cpu->bundle_size * env->cpu->bundels_per_cycle;
ilpsched_block_attr_t *ba = get_ilpsched_block_attr(block_node);
- lc_timer_t *t_cst_bundle = lc_timer_register("beilpsched_cst_bundle", "create bundle constraints");
- ilp_timer_push(t_cst_bundle);
+ stat_ev_tim_push();
for (t = 0; t < ba->max_steps; ++t) {
ir_node *irn;
int cst;
DEL_ARR_F(tmp_var_idx);
}
- ilp_timer_pop();
- DBG((env->dbg, LEVEL_1, "\t%u bundle constraints (%g sec)\n",
- num_cst_bundle, ilp_timer_elapsed_usec(t_cst_bundle) / 1000000.0));
+ stat_ev_tim_pop("beilpsched_cst_bundle");
}
/**
ir_node *irn;
unsigned num_cst = 0;
ilpsched_block_attr_t *ba = get_ilpsched_block_attr(block_node);
- lc_timer_t *t_cst = lc_timer_register("beilpsched_cst_alive_nodes", "create alive nodes constraints");
- ilp_timer_push(t_cst);
+ stat_ev_tim_push();
/* for each node */
foreach_linked_irns(ba->head_ilp_nodes, irn) {
be_ilpsched_irn_t *node = get_ilpsched_irn(env, irn);
}
}
}
- ilp_timer_pop();
- DBG((env->dbg, LEVEL_1, "\t%u alive nodes constraints (%g sec)\n",
- num_cst, ilp_timer_elapsed_usec(t_cst) / 1000000.0));
+ stat_ev_tim_pop("beilpsched_cst_alive_nodes");
}
/**
ilp_livein_node_t *livein;
unsigned num_cst = 0;
ilpsched_block_attr_t *ba = get_ilpsched_block_attr(block_node);
- lc_timer_t *t_cst = lc_timer_register("beilpsched_cst_alive_livein_nodes", "create alive livein nodes constraints");
- ilp_timer_push(t_cst);
+ stat_ev_tim_push();
/* for each node */
foreach_pset(ba->livein_nodes, livein) {
ir_node *irn = livein->irn;
}
}
}
- ilp_timer_pop();
- DBG((env->dbg, LEVEL_1, "\t%u alive livein nodes constraints (%g sec)\n",
- num_cst, ilp_timer_elapsed_usec(t_cst) / 1000000.0));
+ stat_ev_tim_pop("beilpsched_cst_alive_livein_nodes");
}
/**
ir_node *cur_irn;
unsigned num_cst = 0;
ilpsched_block_attr_t *ba = get_ilpsched_block_attr(block_node);
- lc_timer_t *t_cst = lc_timer_register("beilpsched_cst_pressure", "create pressure constraints");
- ilp_timer_push(t_cst);
+ stat_ev_tim_push();
/* y_{nt}^k is set for each node and timestep and unit type */
foreach_linked_irns(ba->head_ilp_nodes, cur_irn) {
unsigned cur_idx = get_irn_idx(cur_irn);
}
}
}
- ilp_timer_pop();
- DBG((env->dbg, LEVEL_1, "\t%u pressure constraints (%g sec)\n",
- num_cst, ilp_timer_elapsed_usec(t_cst) / 1000000.0));
+ stat_ev_tim_pop("beilpsched_cst_pressure");
}
/**
unsigned num_cst = 0;
unsigned num_non_branches = 0;
ilpsched_block_attr_t *ba = get_ilpsched_block_attr(block_node);
- lc_timer_t *t_cst = lc_timer_register("beilpsched_cst_branch", "create branch constraints");
- ilp_timer_push(t_cst);
+ stat_ev_tim_push();
cfop = NULL;
/* determine number of non-branch nodes and the one and only branch node */
foreach_linked_irns(ba->head_ilp_nodes, cur_irn) {
switch (get_irn_opcode(cur_irn)) {
case iro_Phi:
- case iro_Start:
+ case beo_Start:
case iro_End:
case iro_Proj:
case iro_Bad:
DEL_ARR_F(non_branch_vars);
}
}
- ilp_timer_pop();
- DBG((env->dbg, LEVEL_1, "\t%u branch constraints (%g sec)\n",
- num_cst, ilp_timer_elapsed_usec(t_cst) / 1000000.0));
+ stat_ev_tim_pop("beilpsched_cst_branch");
}
#if 0
ir_node *irn;
unsigned num_cst = 0;
ilpsched_block_attr_t *ba = get_ilpsched_block_attr(block_node);
- lc_timer_t *t_cst = lc_timer_register("beilpsched_cst_projkeep", "create proj and keep constraints");
- ilp_timer_push(t_cst);
+ stat_ev_tim_push();
/* check all nodes */
foreach_linked_irns(ba->head_ilp_nodes, irn) {
be_ilpsched_irn_t *node;
}
}
}
- ilp_timer_pop();
- DBG((env->dbg, LEVEL_1, "\t%u Proj and Keep constraints (%g sec)\n",
- num_cst, ilp_timer_elapsed_usec(t_cst) / 1000000.0));
+ stat_ev_tim_pop("beilpsched_cst_projkeep");
}
#endif /* if 0 */
DBG((env->dbg, LEVEL_1, "Creating LPP with estimated numbers: %d vars, %d cst\n",
estimated_n_var, estimated_n_cst));
+ (void) estimated_n_var;
/* set up the LPP object */
snprintf(name, sizeof(name), "ilp scheduling IRG %s", get_entity_ld_name(get_irg_entity(env->irg)));
DBG((env->dbg, LEVEL_1, "ILP to solve: %u variables, %u constraints\n", lpp->var_next, lpp->cst_next));
/* debug stuff, dump lpp when debugging is on */
- DEBUG_ONLY_NICE {
+ DEBUG_ONLY({
if (firm_dbg_get_mask(env->dbg) > 1) {
char buf[1024];
FILE *f;
snprintf(buf, sizeof(buf), "lpp_block_%lu.mps", get_irn_node_nr(block));
lpp_dump(lpp, buf);
}
- }
+ })
/* set solve time limit */
lpp_set_time_limit(lpp, env->opts->time_limit);
/* check for valid solution */
if (! lpp_is_sol_valid(lpp)) {
- char buf[1024];
- FILE *f;
-
- DEBUG_ONLY_NICE {
- if (firm_dbg_get_mask(env->dbg) >= 2) {
- snprintf(buf, sizeof(buf), "lpp_block_%lu.infeasible.txt", get_irn_node_nr(block));
- f = fopen(buf, "w");
- lpp_dump_plain(lpp, f);
- fclose(f);
- snprintf(buf, sizeof(buf), "lpp_block_%lu.infeasible.mps", get_irn_node_nr(block));
- lpp_dump(lpp, buf);
- dump_ir_block_graph(env->irg, "-infeasible");
- }
- }
+ DEBUG_ONLY({
+ char buf[1024];
+ FILE *f;
+
+ if (firm_dbg_get_mask(env->dbg) >= 2) {
+ snprintf(buf, sizeof(buf), "lpp_block_%lu.infeasible.txt", get_irn_node_nr(block));
+ f = fopen(buf, "w");
+ lpp_dump_plain(lpp, f);
+ fclose(f);
+ snprintf(buf, sizeof(buf), "lpp_block_%lu.infeasible.mps", get_irn_node_nr(block));
+ lpp_dump(lpp, buf);
+ dump_ir_block_graph(env->irg, "-infeasible");
+ }
+ })
ir_fprintf(stderr, "ILP found no solution within time (%+F, %+F), falling back to heuristics.\n", block, env->irg);
need_heur = 1;
const char *name = "be ilp scheduling";
ir_graph *irg = be_get_birg_irg(birg);
const arch_env_t *arch_env = be_get_birg_arch_env(birg);
- const arch_isa_t *isa = arch_env->isa;
- const ilp_sched_selector_t *sel = isa->impl->get_ilp_sched_selector(isa);
+ const ilp_sched_selector_t *sel = arch_env->impl->get_ilp_sched_selector(arch_env);
FIRM_DBG_REGISTER(env.dbg, "firm.be.sched.ilp");
- stat_ev_ctx_push("phase", "ilpsched");
+ stat_ev_ctx_push("ilpsched");
// firm_dbg_set_mask(env.dbg, 1);
env.height = heights_new(irg);
env.main_env = birg->main_env;
env.arch_env = arch_env;
- env.cpu = arch_isa_get_machine(arch_env->isa);
+ env.cpu = arch_env_get_machine(arch_env);
env.opts = &ilp_opts;
env.birg = birg;
env.be_opts = be_opts;
/* notify backend */
be_ilp_sched_finish_irg_ilp_schedule(sel, birg->irg, env.irg_env);
- stat_ev_ctx_pop();
+ stat_ev_ctx_pop("ilpsched");
}
/**
#else /* WITH_ILP */
-static INLINE void some_picky_compiler_do_not_allow_empty_files(void)
+static inline void some_picky_compiler_do_not_allow_empty_files(void)
{}
#endif /* WITH_ILP */
projects / libfirm / blobdiff