* - Register-constrained nodes
* - Two-address code instructions
*/
-#ifdef HAVE_CONFIG_H
#include "config.h"
-#endif
#include "execfreq.h"
#include "xmalloc.h"
co = XMALLOCZ(copy_opt_t);
co->cenv = chordal_env;
- co->aenv = chordal_env->birg->main_env->arch_env;
co->irg = chordal_env->irg;
co->cls = chordal_env->cls;
co->get_costs = get_costs;
free(co);
}
-int co_is_optimizable_root(const copy_opt_t *co, ir_node *irn) {
+/**
+ * Checks if a node is optimizable, viz. has something to do with coalescing
+ * @param irn The irn to check
+ */
+static int co_is_optimizable_root(ir_node *irn)
+{
const arch_register_req_t *req;
const arch_register_t *reg;
- if (arch_irn_is(co->aenv, irn, ignore))
+ if (arch_irn_is(irn, ignore))
return 0;
- reg = arch_get_irn_register(co->aenv, irn);
+ reg = arch_get_irn_register(irn);
if (arch_register_type_is(reg, ignore))
return 0;
req = arch_get_register_req(irn, -1);
- if (is_Reg_Phi(irn) || is_Perm_Proj(co->aenv, irn) || is_2addr_code(req))
+ if (is_Reg_Phi(irn) || is_Perm_Proj(irn) || is_2addr_code(req))
return 1;
return 0;
if (!is_curr_reg_class(co, irn))
return;
- if (!co_is_optimizable_root(co, irn))
+ if (!co_is_optimizable_root(irn))
return;
/* Init a new unit */
/* Else insert the argument of the phi to the members of this ou */
DBG((dbg, LEVEL_1, "\t Member: %+F\n", arg));
- if (! arch_irn_is(co->aenv, arg, ignore)) {
+ if (!arch_irn_is(arg, ignore)) {
/* Check if arg has occurred at a prior position in the arg/list */
arg_pos = 0;
for (o=1; o<unit->node_count; ++o) {
}
unit->nodes = XREALLOC(unit->nodes, ir_node*, unit->node_count);
unit->costs = XREALLOC(unit->costs, int, unit->node_count);
- } else if (is_Perm_Proj(co->aenv, irn)) {
+ } else if (is_Perm_Proj(irn)) {
/* Proj of a perm with corresponding arg */
assert(!nodes_interfere(co->cenv, irn, get_Perm_src(irn)));
unit->nodes = XMALLOCN(ir_node*, 2);
for (i = 0; (1U << i) <= other; ++i) {
if (other & (1U << i)) {
ir_node *o = get_irn_n(skip_Proj(irn), i);
- if (!arch_irn_is(co->aenv, o, ignore) &&
+ if (!arch_irn_is(o, ignore) &&
!nodes_interfere(co->cenv, irn, o)) {
++count;
}
for (i = 0; 1U << i <= other; ++i) {
if (other & (1U << i)) {
ir_node *o = get_irn_n(skip_Proj(irn), i);
- if (!arch_irn_is(co->aenv, o, ignore) &&
+ if (!arch_irn_is(o, ignore) &&
!nodes_interfere(co->cenv, irn, o)) {
unit->nodes[k] = o;
unit->costs[k] = co->get_costs(co, irn, o, -1);
ASSERT_OU_AVAIL(co);
list_for_each_entry(unit_t, curr, &co->units, units) {
- int root_col = get_irn_col(co, curr->nodes[0]);
+ int root_col = get_irn_col(curr->nodes[0]);
DBG((dbg, LEVEL_1, " %3d costs for root %+F color %d\n", curr->inevitable_costs, curr->nodes[0], root_col));
res += curr->inevitable_costs;
for (i=1; i<curr->node_count; ++i) {
- int arg_col = get_irn_col(co, curr->nodes[i]);
+ int arg_col = get_irn_col(curr->nodes[i]);
if (root_col != arg_col) {
DBG((dbg, LEVEL_1, " %3d for arg %+F color %d\n", curr->costs[i], curr->nodes[i], arg_col));
res += curr->costs[i];
stat->aff_edges += 1;
stat->max_costs += neigh->costs;
- if(get_irn_col(co, an->irn) != get_irn_col(co, neigh->irn)) {
+ if (get_irn_col(an->irn) != get_irn_col(neigh->irn)) {
stat->costs += neigh->costs;
stat->unsatisfied_edges += 1;
}
nbr->costs += costs;
}
-static INLINE void add_edges(copy_opt_t *co, ir_node *n1, ir_node *n2, int costs) {
+static inline void add_edges(copy_opt_t *co, ir_node *n1, ir_node *n2, int costs) {
if (! be_ifg_connected(co->cenv->ifg, n1, n2)) {
add_edge(co, n1, n2, costs);
add_edge(co, n2, n1, costs);
int pos, max;
const arch_register_t *reg;
- if (!is_curr_reg_class(co, irn) || arch_irn_is(co->aenv, irn, ignore))
+ if (!is_curr_reg_class(co, irn) || arch_irn_is(irn, ignore))
return;
- reg = arch_get_irn_register(co->aenv, irn);
+ reg = arch_get_irn_register(irn);
if (arch_register_type_is(reg, ignore))
return;
ir_node *arg = get_irn_n(irn, pos);
add_edges(co, irn, arg, co->get_costs(co, irn, arg, pos));
}
- }
- else if (is_Perm_Proj(co->aenv, irn)) { /* Perms */
+ } else if (is_Perm_Proj(irn)) { /* Perms */
ir_node *arg = get_Perm_src(irn);
add_edges(co, irn, arg, co->get_costs(co, irn, arg, 0));
}
for (i = 0; 1U << i <= other; ++i) {
if (other & (1U << i)) {
ir_node *other = get_irn_n(skip_Proj(irn), i);
- if (! arch_irn_is(co->aenv, other, ignore))
+ if (!arch_irn_is(other, ignore))
add_edges(co, irn, other, co->get_costs(co, irn, other, 0));
}
}
n = n_regs;
be_ifg_foreach_node(ifg, it, irn) {
- if(!arch_irn_is(co->aenv, irn, ignore))
+ if (!arch_irn_is(irn, ignore))
node_map[get_irn_idx(irn)] = n++;
}
fprintf(f, "%d %d\n", n, n_regs);
be_ifg_foreach_node(ifg, it, irn) {
- if(!arch_irn_is(co->aenv, irn, ignore)) {
+ if (!arch_irn_is(irn, ignore)) {
int idx = node_map[get_irn_idx(irn)];
affinity_node_t *a = get_affinity_info(co, irn);
}
be_ifg_foreach_neighbour(ifg, nit, irn, adj) {
- if(!arch_irn_is(co->aenv, adj, ignore) && !co_dump_appel_disjoint_constraints(co, irn, adj)) {
+ if (!arch_irn_is(adj, ignore) &&
+ !co_dump_appel_disjoint_constraints(co, irn, adj)) {
int adj_idx = node_map[get_irn_idx(adj)];
if(idx < adj_idx)
fprintf(f, "%d %d -1\n", idx, adj_idx);
neighb_t *n;
co_gs_foreach_neighb(a, n) {
- if(!arch_irn_is(co->aenv, n->irn, ignore)) {
+ if (!arch_irn_is(n->irn, ignore)) {
int n_idx = node_map[get_irn_idx(n->irn)];
if(idx < n_idx)
fprintf(f, "%d %d %d\n", idx, n_idx, (int) n->costs);
static int ifg_is_dump_node(void *self, ir_node *irn)
{
- co_ifg_dump_t *cod = self;
- return !arch_irn_is(cod->co->aenv, irn, ignore);
+ (void)self;
+ return !arch_irn_is(irn, ignore);
}
static void ifg_dump_node_attr(FILE *f, void *self, ir_node *irn)
{
co_ifg_dump_t *env = self;
- const arch_register_t *reg = arch_get_irn_register(env->co->aenv, irn);
+ const arch_register_t *reg = arch_get_irn_register(irn);
const arch_register_req_t *req;
int limited;
affinity_node_t *a;
co_gs_foreach_aff_node(env->co, a) {
- const arch_register_t *ar = arch_get_irn_register(env->co->aenv, a->irn);
+ const arch_register_t *ar = arch_get_irn_register(a->irn);
unsigned aidx = get_irn_idx(a->irn);
neighb_t *n;
co_gs_foreach_neighb(a, n) {
- const arch_register_t *nr = arch_get_irn_register(env->co->aenv, n->irn);
+ const arch_register_t *nr = arch_get_irn_register(n->irn);
unsigned nidx = get_irn_idx(n->irn);
if(aidx < nidx) {
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