if (arch_register_type_is(reg, ignore))
return 0;
- req = arch_get_register_req(irn, -1);
- if (is_Reg_Phi(irn) || is_Perm_Proj(irn) || is_2addr_code(req))
+ if (is_Reg_Phi(irn) || is_Perm_Proj(irn))
+ return 1;
+
+ req = arch_get_register_req_out(irn);
+ if (is_2addr_code(req))
return 1;
return 0;
return safe_costs+best_weight;
}
-static void co_collect_units(ir_node *irn, void *env) {
- copy_opt_t *co = env;
+static void co_collect_units(ir_node *irn, void *env)
+{
+ const arch_register_req_t *req = arch_get_register_req_out(irn);
+ copy_opt_t *co = env;
unit_t *unit;
- if (!is_curr_reg_class(co, irn))
+ if (req->cls != co->cls)
return;
if (!co_is_optimizable_root(irn))
return;
int o, arg_pos;
ir_node *arg = get_irn_n(irn, i);
- assert(is_curr_reg_class(co, arg) && "Argument not in same register class.");
+ assert(arch_get_irn_reg_class(arg, -1) == co->cls && "Argument not in same register class.");
if (arg == irn)
continue;
if (nodes_interfere(co->cenv, irn, arg)) {
unit->nodes[1] = get_Perm_src(irn);
unit->costs[1] = co->get_costs(co, irn, unit->nodes[1], -1);
} else {
- const arch_register_req_t *req = arch_get_register_req(irn, -1);
-
/* Src == Tgt of a 2-addr-code instruction */
if (is_2addr_code(req)) {
const unsigned other = req->other_same;
/* Units with constraints come first */
u1_has_constr = 0;
for (i=0; i<u1->node_count; ++i) {
- arch_get_register_req(&req, u1->nodes[i], -1);
+ arch_get_register_req_out(&req, u1->nodes[i]);
if (arch_register_req_is(&req, limited)) {
u1_has_constr = 1;
break;
u2_has_constr = 0;
for (i=0; i<u2->node_count; ++i) {
- arch_get_register_req(&req, u2->nodes[i], -1);
+ arch_get_register_req_out(&req, u2->nodes[i]);
if (arch_register_req_is(&req, limited)) {
u2_has_constr = 1;
break;
}
static void build_graph_walker(ir_node *irn, void *env) {
- copy_opt_t *co = env;
+ const arch_register_req_t *req = arch_get_register_req_out(irn);
+ copy_opt_t *co = env;
int pos, max;
const arch_register_t *reg;
- if (!is_curr_reg_class(co, irn) || arch_irn_is(irn, ignore))
+ if (req->cls != co->cls || arch_irn_is(irn, ignore))
return;
reg = arch_get_irn_register(irn);
} else if (is_Perm_Proj(irn)) { /* Perms */
ir_node *arg = get_Perm_src(irn);
add_edges(co, irn, arg, co->get_costs(co, irn, arg, 0));
- }
- else { /* 2-address code */
- const arch_register_req_t *req = arch_get_register_req(irn, -1);
+ } else { /* 2-address code */
if (is_2addr_code(req)) {
const unsigned other = req->other_same;
int i;
{
ir_node *nodes[] = { a, b };
bitset_t *constr[] = { NULL, NULL };
- const arch_register_req_t *req;
int j;
constr[0] = bitset_alloca(co->cls->n_regs);
constr[1] = bitset_alloca(co->cls->n_regs);
for (j = 0; j < 2; ++j) {
- req = arch_get_register_req(nodes[j], BE_OUT_POS(0));
+ const arch_register_req_t *req = arch_get_register_req_out(nodes[j]);
if(arch_register_req_is(req, limited))
rbitset_copy_to_bitset(req->limited, constr[j]);
else
be_ifg_foreach_node(ifg, it, irn) {
if (!arch_irn_is(irn, ignore)) {
- int idx = node_map[get_irn_idx(irn)];
- affinity_node_t *a = get_affinity_info(co, irn);
-
- const arch_register_req_t *req;
- ir_node *adj;
+ int idx = node_map[get_irn_idx(irn)];
+ affinity_node_t *a = get_affinity_info(co, irn);
+ const arch_register_req_t *req = arch_get_register_req_out(irn);
+ ir_node *adj;
- req = arch_get_register_req(irn, BE_OUT_POS(0));
if(arch_register_req_is(req, limited)) {
for(i = 0; i < co->cls->n_regs; ++i) {
if(!rbitset_is_set(req->limited, i) && color_map[i] >= 0)
static void ifg_dump_node_attr(FILE *f, void *self, ir_node *irn)
{
- co_ifg_dump_t *env = self;
- const arch_register_t *reg = arch_get_irn_register(irn);
- const arch_register_req_t *req;
- int limited;
-
- req = arch_get_register_req(irn, BE_OUT_POS(0));
- limited = arch_register_req_is(req, limited);
+ co_ifg_dump_t *env = self;
+ const arch_register_t *reg = arch_get_irn_register(irn);
+ const arch_register_req_t *req = arch_get_register_req_out(irn);
+ int limited = arch_register_req_is(req, limited);
if(env->flags & CO_IFG_DUMP_LABELS) {
ir_fprintf(f, "label=\"%+F", irn);