arch_register_req_t req;
unsigned n_regs = co->cls->n_regs;
+ // ir_printf("%+F\n", irn);
arch_get_register_req(co->aenv, &req, irn, BE_OUT_POS(0));
if(arch_register_req_is(&req, limited)) {
bitset_t *adm = bitset_alloca(n_regs);
req.limited(req.limited_env, adm);
for(i = 0; i < n_regs; ++i)
- if(!bitset_is_set(adm, i) && col_map[i] >= 0)
+ if(!bitset_is_set(adm, i) && col_map[i] >= 0) {
+ // printf("\tforbidding color: %d\n", i);
be_java_coal_forbid_color(coal, t_idx, col_map[i]);
+ }
}
}
bitset_t *nodes = bitset_malloc(get_irg_last_idx(co->irg));
unsigned n_regs = co->cenv->cls->n_regs;
+ char dbg[256];
unsigned i, j, curr_idx;
int *col_map;
int *inv_col_map;
col_map = alloca(n_regs * sizeof(col_map[0]));
inv_col_map = alloca(n_regs * sizeof(inv_col_map[0]));
- memset(inv_col_map, 0, sizeof(inv_col_map[0]) * n_regs);
+ memset(inv_col_map, -1, sizeof(inv_col_map[0]) * n_regs);
for(i = 0, j = 0; i < n_regs; ++i) {
const arch_register_t *reg = &co->cls->regs[i];
- col_map[i] = i;
- inv_col_map[i] = i;
+ col_map[i] = -1;
if(!arch_register_type_is(reg, ignore)) {
- //col_map[i] = j;
- //inv_col_map[j] = i;
+ col_map[i] = j;
+ inv_col_map[j] = i;
++j;
}
}
if(bitset_is_set(nodes, n_idx)) {
affinity_node_t *an = get_affinity_info(co, n);
+ ir_snprintf(dbg, sizeof(dbg), "%+F", n);
+ be_java_coal_set_debug(coal, t_idx, dbg);
be_java_coal_set_color(coal, t_idx, col_map[arch_get_irn_register(co->aenv, n)->index]);
set_admissible_regs(coal, co, n, t_idx, col_map);
be_ifg_foreach_neighbour(ifg, neigh_it, n, m) {