* Driver for the chordal register allocator.
*/
#ifdef HAVE_CONFIG_H
-#include "config.h"
+#include <config.h>
#endif
#include <time.h>
#include "iterator.h"
#include "firm_config.h"
-#ifdef WITH_LIBCORE
#include <libcore/lc_opts.h>
#include <libcore/lc_opts_enum.h>
#include <libcore/lc_timing.h>
-#endif /* WITH_LIBCORE */
#include "ircons_t.h"
#include "irmode_t.h"
if (get_irn_n_edges(irn) == 0) {
sched_remove(irn);
set_irn_n(irn, be_pos_Reload_mem, new_Bad());
+ set_irn_n(irn, be_pos_Reload_frame, new_Bad());
}
}
return cnt;
}
-#ifdef WITH_LIBCORE
/**
* Initialize all timers.
*/
LC_STOP_AND_RESET_TIMER(ra_timer.t_ssa);
LC_STOP_AND_RESET_TIMER(ra_timer.t_verify);
LC_STOP_AND_RESET_TIMER(ra_timer.t_other);
+
+ global_ra_timer = &ra_timer;
}
}
lc_timer_get_name(tmp), lc_timer_get_name(timer)); \
timer = tmp; \
}
-#else
-
-#define BE_TIMER_INIT(main_opts)
-#define BE_TIMER_PUSH(timer)
-#define BE_TIMER_POP(timer)
-
-#endif /* WITH_LIBCORE */
/**
* Perform things which need to be done per register class before spilling.
if (be_stat_ev_is_active()) {
pse->pre_spill_cost = be_estimate_irg_costs(birg->irg,
birg->main_env->arch_env, birg->exec_freq);
+ be_stat_ev_pop();
}
#endif /* FIRM_STATISTICS */
}
/**
* Perform things which need to be done per register class after spilling.
*/
-static void post_spill(post_spill_env_t *pse) {
+static void post_spill(post_spill_env_t *pse, int iteration) {
be_chordal_env_t *chordal_env = &pse->cenv;
be_irg_t *birg = pse->birg;
ir_graph *irg = birg->irg;
if (be_stat_ev_is_active()) {
double spillcosts = be_estimate_irg_costs(irg, main_env->arch_env, birg->exec_freq) - pse->pre_spill_cost;
+ be_stat_tags[STAT_TAG_CLS] = pse->cls->name;
+ be_stat_ev_push(be_stat_tags, STAT_TAG_LAST, be_stat_file);
+
be_stat_ev_l("spillcosts", (long) spillcosts);
node_stats(birg, pse->cls, &node_stat);
}
#endif /* FIRM_STATISTICS */
- check_for_memory_operands(chordal_env);
-
- be_abi_fix_stack_nodes(birg->abi, birg->lv);
+ /*
+ If we have a backend provided spiller, post spill is
+ called in a loop after spilling for each register class.
+ But we only need to fix stack nodes once in this case.
+ */
+ if (iteration == 0) {
+ check_for_memory_operands(chordal_env);
+ be_abi_fix_stack_nodes(birg->abi, birg->lv);
+ }
BE_TIMER_PUSH(ra_timer.t_verify);
pre_spill(isa, j, &pse);
BE_TIMER_PUSH(ra_timer.t_spill);
- be_do_spill(&pse.cenv);
+ be_do_spill(birg, pse.cls);
BE_TIMER_POP(ra_timer.t_spill);
dump(BE_CH_DUMP_SPILL, irg, pse.cls, "-spill", dump_ir_block_graph_sched);
- post_spill(&pse);
+ post_spill(&pse, 0);
}
- }
- else {
+ } else {
post_spill_env_t *pse;
/* the backend has it's own spiller */
dump(BE_CH_DUMP_SPILL, irg, NULL, "-spill", dump_ir_block_graph_sched);
for (j = 0; j < m; ++j) {
- post_spill(&pse[j]);
+ post_spill(&pse[j], j);
}
}
- BE_TIMER_PUSH(ra_timer.t_spillslots);
-
- be_coalesce_spillslots(&chordal_env);
- dump(BE_CH_DUMP_SPILLSLOTS, irg, NULL, "-spillslots", dump_ir_block_graph_sched);
-
- BE_TIMER_POP(ra_timer.t_spillslots);
-
- BE_TIMER_PUSH(ra_timer.t_verify);
- /* verify spillslots */
- if (options.vrfy_option == BE_CH_VRFY_WARN) {
- be_verify_spillslots(main_env->arch_env, irg);
- }
- else if (options.vrfy_option == BE_CH_VRFY_ASSERT) {
- assert(be_verify_spillslots(main_env->arch_env, irg) && "Spillslot verification failed");
- }
- BE_TIMER_POP(ra_timer.t_verify);
-
BE_TIMER_PUSH(ra_timer.t_epilog);
- dump(BE_CH_DUMP_LOWER, irg, NULL, "-spilloff", dump_ir_block_graph_sched);
-
lower_nodes_after_ra(birg, options.lower_perm_opt & BE_CH_LOWER_PERM_COPY ? 1 : 0);
dump(BE_CH_DUMP_LOWER, irg, NULL, "-belower-after-ra", dump_ir_block_graph_sched);
obstack_free(&chordal_env.obst, NULL);
+ be_invalidate_liveness(birg);
BE_TIMER_POP(ra_timer.t_epilog);
BE_TIMER_POP(ra_timer.t_other);